[PATCH v7] xtensa: Eliminate the use of callee-saved register that saves and restores only once

In the case of the CALL0 ABI, values that must be retained before and after function calls are placed in the callee-saved registers (A12 through A15) and referenced later. However, it is often the case that the save and the reference are each only once and a simple register- register move (with tw

Re: [PATCH] PR tree-optimization/108697 - Create a lazy ssa_cache

On Thu, Feb 16, 2023 at 3:34 PM Andrew MacLeod wrote: > > > On 2/16/23 02:55, Richard Biener wrote: > > On Wed, Feb 15, 2023 at 6:07 PM Andrew MacLeod via Gcc-patches > > wrote: > >> This patch implements the suggestion that we have an alternative > >> ssa-cache which does not zero memory, and in

Re: [PATCH] -Wdangling-pointer: don't mark SSA lhs sets as stores

On Fri, Feb 17, 2023 at 8:09 AM Alexandre Oliva via Gcc-patches wrote: > > > check_dangling_stores has some weirdnesses that causes its behavior to > change when the target ABI requires C++ ctors to return this: while > scanning stmts backwards in e.g. the AS ctor on a target that returns > this i

[PATCH] [PR77760] [libstdc++] encode __time_get_state in tm

On platforms that fail the ptrtomemfn-cast-to-pfn hack, such as arm-*-vxworks*, time_get fails with %I and %p because the state is not preserved across do_get calls. This patch introduces an alternate hack, that encodes the state in unused bits of struct tm before calling do_get, extracts them i

[PATCH] [libstdc++] ensure mutex_pool survives _Safe_sequence_base

On vxworks, after destroying the semaphore used to implement a mutex, __gthread_mutex_lock fails and __gnu_cxx::__mutex::lock calls __throw_concurrence_lock_error. Nothing ensures the mutex_pool mutexes survive init-once objects containing _Safe_sequence_base. If such an object completes constr

[PATCH] [arm] [vxworks] xfail fp-double-convert-float-1.c

Even with vcvt.f32.f64, the FE_UPWARD test rounds down and fails. I'm not sure whether this opcode disregards the rounding mode (it looks like it should take it into account) or it is a qemu bug, but it does not look like GCC is doing anything wrong, and the test fails, so I'm marking the fail a

[PATCH] [libstdc++] xfail noreplace tests on vxworks

vxworks ignores O_EXCL in open, so noreplace open succeeds when it is expected to fail. xfail the tests. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to install? for libstdc++-v3/ChangeLog * testsuite/27_io/basic_ofstream/open/char/norepl

[PATCH] [PR104882] [arm] require mve hw for mve run test

The pr104882.c test is an execution test, but arm_v8_1m_mve_ok only tests for compile-time support. Add a requirement for mve hardware. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to install? for gcc/testsuite/ChangeLog PR target/104882

Re: [PATCH] simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805]

On Thu, 16 Feb 2023, Uros Bizjak wrote: > simplify_subreg can return VOIDmode const_int operand and will > cause ICE in simplify_gen_subreg when this operand is passed to it. > > The patch prevents VOIDmode temporary from entering simplify_gen_subreg. > We can't process const_int operand any furt

[PATCH] [arm] complete vmsr/vmrs blank and case adjustments

Back in September last year, some of the vmsr and vmrs patterns had an extraneous blank removed, and the case of register names lowered, but another instance remained, and so did a few testcases. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to instal

Re: [PATCH] RISC-V: Bugfix for rvv bool mode precision adjustment

On Thu, 16 Feb 2023, juzhe.zhong wrote: > Thanks for the great work to fix this issue for rvv.Hi，richard. This is the > patch to differentiate mask mode of same bytesize. Adjust the precision > correctly according to rvv isa. Would you mind helping us with this patch ？ > Since it‘s very important

[PATCH] [arm] adjust expectations for armv8_2-fp16-move-[12].c

Commit 3a7ba8fd0cda387809e4902328af2473662b6a4a, a patch for tree-ssa-sink, enabled the removal of basic blocks in ways that affected the generated code for both of these tests, deviating from the expectations of the tests. The simplest case is that of -2, in which the edge unsplitting ends up e

[PATCH] [PR51534] [arm] split out pr51534 test for softfp

The test uses arm_hard_ok and arm_softfp_ok as if they were mutually exclusive, but they test whether the corresponding -mfloat-abi= flag is usable, not whether it is in effect, so it is possible for both to pass, and then the test comes out with incorrect expectations whichever the default float

[PATCH] [arm] adjust tests for quotes around +cdecp

Back when quotes were added around "+cdecp" in the "coproc must be a constant immediate" error in arm-builtins.cc, tests for that message lagged behind. Fixed thusly. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to install? for gcc/testsuite/Chang

RE: [PATCH] RISC-V: Bugfix for rvv bool mode precision adjustment

Thank you all. Hi Richard, Could you please help to review the precision adjustment related change when you free? I am looking forward your option of this issue from the expert’s perspective, 😉! Pan From: juzhe.zhong Sent: Thursday, February 16, 2023 11:23 PM To: incarnation.p@outlook.co

[PATCH] -Wdangling-pointer: don't mark SSA lhs sets as stores

check_dangling_stores has some weirdnesses that causes its behavior to change when the target ABI requires C++ ctors to return this: while scanning stmts backwards in e.g. the AS ctor on a target that returns this in ctors, the scan first encounters a copy of this to the SSA name used to hold the

[PATCH] [arm] disable aes-1742098 mitigation for a72 combine tests

The expected asm output for aes-fuse-[12].c does not correspond to that which is generated when -mfix-cortex-a57-aes-1742098 is enabled. It was introduced after the test, and enabled by default for the selected processor. Disabling the option restores the circumstance that was tested for. Regst

[PATCH] [vxworks] make wint_t and wchar_t the same distinct type

We used to define WINT_TYPE to WCHAR_TYPE, so that both wint_t and wchar_t mapped to the same underlying type, but this caused a glitch in Wstringop-overflow-6.C: on vxworks, wint_t is typedef'ed to wchar_t, headers got included in the test that declared functions that take wint_t parameters, and

[PATCH] Accept pmf-vbit-in-delta extra warning

cp_build_binary_op, that issues -Waddress warnings, issues an extra warning on arm targets, that g++.dg/warn/Waddress-5.C does not expect when comparing a pointer-to-member-function literal with null. The reason for the extra warning is that, on arm targets, TARGET_PTRMEMFUNC_VBIT_LOCATION == pt

[PATCH] Drop need for constant I in ctf test

Though I is supposed to be a constant expression, this is not the case on vxworks, but this is not what this debug information format test is testing for, so use real constants to initialize complex variables. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk).

[PATCH] Skip module_cmi_p and related unsupported module test

When a multi-source module is found to be unsupported, we fail module_cmi_p and subsequent sources. Override proc unsupported to mark the result in module_do, and test it to skip module_cmp_p and subsequent related tests. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-

[PR100127] Test for coroutine header in clang-compatible tests

The test is compatible with clang as well as gcc, but ISTM that testing for the __clang__ macro is just as potentially error-prone as macros that used to be GCC-specific are now defined in compilers that aim for GCC compatibility. Use a __has_include feature test instead. Regstrapped on x86_64-

[libstdc++] Use __gthread_join in jthread/95989

Ref: https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570617.html Bernd Edlinger reported that the 95989.cc test fails without pthread_join at the end of main, but pthread_join is no good for a test that doesn't require pthreads. This patch adds a __gthread_join call instead. Regstrapped on

[PATCH] [arm] xfail fp-uint64-convert-double-* on all arm targets

It wasn't long ago that I xfailed these tests on arm-*-eabi, but the fail is expected on all other arm targets: even when hard float is available, conversions between 64-bit integers and double are always emulated on ARM, and the emulation disregards rounding modes. So, bump the xfail to all of

[libstdc++] [testsuite] intro/names.cc: undef func on vxw7krn

The '#define func' added in 2021, to test that system headers don't violate the user namespace, exposes such a bug in the vxworks sysLib.h header, so add yet another such annotated workaround. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to install?

[arm] [testsuite] asm-flag-4.c: match quotes in expected message

Quotes were added around the "asm" keyword in the message expected by the test, so the test needs adjusting. Regstrapped on x86_64-linux-gnu. Tested on arm-vxworks7 (gcc-12) and arm-eabi (trunk). Ok to install? for gcc/testsuite/ChangeLog * gcc.target/arm/asm-flag-4.c: Match quotes a

Re: C++ modules and AAPCS/ARM EABI clash on inline key methods

On Apr 5, 2022, Alexandre Oliva wrote: > Would something like this be acceptable/desirable? It's overreaching, > in that not all arm platforms are expected to fail, but the result on > them will be an unexpected pass, which is not quite as bad as the > unexpected fail we get on most arm variant

Re: [PING 2] [PATCH] swap: Fix incorrect lane extraction by vec_extract() [PR106770]

Ping. Please review the patch. On 12/01/23 10:21 pm, Surya Kumari Jangala via Gcc-patches wrote: > Ping > > On 04/01/23 1:58 pm, Surya Kumari Jangala via Gcc-patches wrote: >> swap: Fix incorrect lane extraction by vec_extract() [PR106770] >> >> In the routine rs6000_analyze_swaps(), special hand

Re: [PATCH v6] xtensa: Eliminate the use of callee-saved register that saves and restores only once

On 2023/02/16 7:18, Max Filippov wrote: > Hi Suwa-san, Hi! > > On Thu, Jan 26, 2023 at 7:17 PM Takayuki 'January June' Suwa > wrote: >> >> In the case of the CALL0 ABI, values that must be retained before and >> after function calls are placed in the callee-saved registers (A12 >> through A15)

[PATCHES, Committed] As obvious

Committed as obvious: commit 061b13ed014ba0b6891800a5c7f852bf58e4d856 Author: Jerry DeLisle Date: Thu Feb 16 18:13:56 2023 -0800 Fortran Tests: Allow passing on mingw. gcc/testsuite/ChangeLog: * gfortran.dg/bind_c_array_params_2.f90: Add *-*-ming* to dg-final. and co

Re: [PATCH] rs6000: Fix vector parity support [PR108699]

Hi Segher, Thanks for the comments! on 2023/2/16 23:10, Segher Boessenkool wrote: > Hi! > > On Thu, Feb 16, 2023 at 08:06:02PM +0800, Kewen.Lin wrote: >> on 2023/2/16 19:14, Segher Boessenkool wrote: >>> On Thu, Feb 16, 2023 at 05:23:40PM +0800, Kewen.Lin wrote: This patch is to fix the han

Re: Re: [PATCH V2 0/5] RISC-V: Implement Scalar Cryptography Extension

OK, I will send another one which remove riscv_scalar_crypto.h and update testcases with __builtin_riscv_XX > -原始邮件- > 发件人: "Kito Cheng" > 发送时间: 2023-02-16 21:28:34 (星期四) > 收件人: "Liao Shihua" > 抄送: gcc-patches@gcc.gnu.org, jia...@iscas.ac.cn, m...@iki.fi, pal...@dabbelt.com, shiyul...

Re: [PATCH] LoongArch: Fix multiarch tuple canonization

Hi, 在 2023/2/15 下午6:42, WANG Xuerui 写道: Hi, On 2023/2/13 18:38, Xi Ruoyao wrote: Multiarch tuple will be coded in file or directory names in multiarch-aware distros, so one ABI should have only one multiarch tuple.  For example, "--target=loongarch64-linux-gnu --with-abi=lp64s" and "--target=l

[PATCH] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd

Hi, Compare with previous version: https://gcc.gnu.org/pipermail/gcc-patches/2023-February/611823.html This patch does not define new insn for mtvsrws, but use exit one. As mentioned in PR108338, on p9, we could use mtvsrws to implement the bitcast from SI#0 to SF (or lowpart DI to SF). For code

[wwwdocs] testing: Tweak the link to upstream FTensor (was: Anyone using FTensor to test GCC (or otherwise)?)

On Tue, 14 Feb 2023, NightStrike wrote: >> Alas http://www.wlandry.net/Projects/FTensor has been down for a while, >> and there does not appear to be a new location? > https://wlandry.net/Projects/FTensor/ works Ah, indeed. Thank you! Somehow that must have been the one combination I did not try.

[pushed] doc: Reword how to get possible values of a parameter (was: Document all param values and remove defaults (PR middle-end/86078))

On Mon, 24 Sep 2018, Martin Liška wrote: > As mentioned in the PR we miss defaults for quite some param option. > I agreed with Richi that easiest way how to fix that would be to remove > that from documentation and use rather --help=param. It's done in the > patch. And here is a little follow-up

[pushed] analyzer: respect some conditions from bit masks [PR108806]

PR analyzer/108806 reports false +ves seen from -fanalyzer on code like this in qemu-7.2.0's hw/intc/omap_intc.c: [...snip...] struct omap_intr_handler_bank_s* bank = NULL; if ((offset & 0xf80) == 0x80) { [...set "bank" to non-NULL...] } switch (offset) { [...snip various cases t

[og12] Attempt to register OpenMP pinned memory using a device instead of 'mlock' (was: [PATCH] libgomp, openmp: pinned memory)

Hi! On 2023-02-16T16:17:32+, "Stubbs, Andrew via Gcc-patches" wrote: >> On 2022-06-09T11:38:22+0200, I wrote: >> > [...] >> > *register* your standard 'malloc'ed etc. memory via 'cuMemHostRegister', >> >

Re: [og12] In 'libgomp/allocator.c:omp_realloc', route 'free' through 'MEMSPACE_FREE' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator)

Hi! On 2023-02-14T15:11:14+, Andrew Stubbs wrote: > On 14/02/2023 12:54, Thomas Schwinge wrote: >> On 2022-01-13T11:13:51+, Andrew Stubbs wrote: >>> Updated patch: this version fixes some missed cases of malloc in the >>> realloc implementation. >> >> Right, and as it seems I've run into

[og12] Clarify/verify OpenMP 'omp_calloc' zero-initialization for pinned memory (was: [PATCH] libgomp, openmp: pinned memory)

Hi! On 2022-01-13T13:53:03+, Andrew Stubbs wrote: > Pinned memory is allocated via mmap > --- /dev/null > +++ b/libgomp/config/linux/allocator.c > +static void * > +linux_memspace_calloc (omp_memspace_handle_t memspace, size_t size, int pin) > +{ > + if (pin) > +return linux_memspace_a

[og12] Miscellaneous clean-up re OpenMP 'ompx_unified_shared_mem_space', 'ompx_host_mem_space' (was: [PATCH 3/5] openmp, nvptx: ompx_unified_shared_mem_alloc)

Hi! On 2023-02-10T15:31:47+, Andrew Stubbs wrote: > On 10/02/2023 14:21, Thomas Schwinge wrote: >> Is the correct fix the following [...] > > Yes, [...] >>> --- a/libgomp/config/nvptx/allocator.c >>> +++ b/libgomp/config/nvptx/allocator.c >>> @@ -125,6 +125,8 @@ nvptx_memspace_alloc (omp_mem

[og12] Un-break nvptx libgomp build (was: [OG12][committed] amdgcn: OpenMP low-latency allocator)

Hi! On 2023-02-16T18:06:41+, Andrew Stubbs wrote: > 1. 230216-basic-allocator.patch > > Separate the allocator from NVPTX so the code can be shared. Yay! > nvptx, libgomp: Move the low-latency allocator code > > There shouldn't be a functionality change; this is just so AMD can share > the

[og12] 'libgomp.c/usm-{1,2,3,4}.c': Re-enable non-GCN offloading compilation (was: [OG12 commit] amdgcn, libgomp: USM allocation update)

Hi! On 2022-10-24T17:26:44+0100, Andrew Stubbs wrote: > I've committed this patch to the devel/omp/gcc-12 branch. > --- a/libgomp/testsuite/libgomp.c/usm-1.c > +++ b/libgomp/testsuite/libgomp.c/usm-1.c > --- a/libgomp/testsuite/libgomp.c/usm-2.c > +++ b/libgomp/testsuite/libgomp.c/usm-2.c > --

[PATCH] testsuite: Tweak gcc.dg/attr-aligned.c for CRIS

Asking for the lines outside the "#if __CRIS__" part. Ok to commit? -- >8 -- tm.texi says for BIGGEST_ALIGNMENT (from which __BIGGEST_ALIGNMENT__ is derived): "Biggest alignment that any data type can require on this machine, in bits." That is, using that value might be too strict for alignment o

[OG12][committed] amdgcn: OpenMP low-latency allocator

These patches implement an LDS memory allocator for OpenMP on AMD. 1. 230216-basic-allocator.patch Separate the allocator from NVPTX so the code can be shared. 2. 230216-amd-low-lat.patch Allocate the memory, adjust the default address space, and hook up the allocator. They will need to be

[PATCH] simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805]

simplify_subreg can return VOIDmode const_int operand and will cause ICE in simplify_gen_subreg when this operand is passed to it. The patch prevents VOIDmode temporary from entering simplify_gen_subreg. We can't process const_int operand any further, since outermode is not an integer mode here.

[pushed] testsuite, objective-c: Cater for Windows intptr type.

Tested by nightstrike on Windows, and on x86_64 Linux and Darwin and i686-darwin, pushed to trunk, thanks Iain --- 8< --- This adjusts the diagnostic output matches to cater for the differences in intptr types on Windows. Patch from 'nightstrike'. Signed-off-by: Iain Sandoe gcc/testsuite/Chan

RE: Attempt to register OpenMP pinned memory using a device instead of 'mlock' (was: [PATCH] libgomp, openmp: pinned memory)

> -Original Message- > From: Thomas Schwinge > Sent: 16 February 2023 15:33 > To: Andrew Stubbs ; Jakub Jelinek ; > Tobias Burnus ; gcc-patches@gcc.gnu.org > Subject: Attempt to register OpenMP pinned memory using a device instead of > 'mlock' (was: [PATCH] libgomp, openmp: pinned memory)

[PATCH] gcc: Remove size limit of PCH for *-*-mingw32 hosts

-- Best regards, LIU Hao From a4d5e161fbaa5b9994077ffb474e2b55c6c3b3cb Mon Sep 17 00:00:00 2001 From: LIU Hao Date: Tue, 10 May 2022 13:19:07 +0800 Subject: [PATCH] gcc: Remove size limit of PCH for *-*-mingw32 hosts PCHs can now be relocated, so the size limit makes no sense any more. This pa

[PATCH][ARM] MVE: Implementing auto-vectorized array * scalar instructions

Hi all, The back-end pattern for mapping the auto-vectorized representation of vector * scalar to to machine instruction VMUL was missing, and multiple instructions were needed to reproduce this behavior as a result of failed RTL pattern match in combine pass. RTL patterns were introduced to repr

Attempt to register OpenMP pinned memory using a device instead of 'mlock' (was: [PATCH] libgomp, openmp: pinned memory)

Hi! On 2022-06-09T11:38:22+0200, I wrote: > On 2022-06-07T13:28:33+0100, Andrew Stubbs wrote: >> On 07/06/2022 13:10, Jakub Jelinek wrote: >>> On Tue, Jun 07, 2022 at 12:05:40PM +0100, Andrew Stubbs wrote: Following some feedback from users of the OG11 branch I think I need to withdraw

Re: [PATCH] RISC-V: Bugfix for mode tieable of the rvv bool types

Hi all, Thank you for your patience. Just file another PR like "Bugfix for rvv bool mode precision adjustment" for the mode precision adjustment only. Feel free to comment if any questions or concerns. Pan From: 盼 李 Sent: Wednesday, February 15, 2023 23:57 To:

[PATCH] RISC-V: Bugfix for rvv bool mode precision adjustment

From: Pan Li Fix the bug of the rvv bool mode precision with the adjustment. The bits size of vbool*_t will be adjusted to [1, 2, 4, 8, 16, 32, 64] according to the rvv spec 1.0 isa. The adjusted mode precison of vbool*_t will help underlying pass to make t

Re: [PATCH] rs6000: Fix vector parity support [PR108699]

Hi! On Thu, Feb 16, 2023 at 08:06:02PM +0800, Kewen.Lin wrote: > on 2023/2/16 19:14, Segher Boessenkool wrote: > > On Thu, Feb 16, 2023 at 05:23:40PM +0800, Kewen.Lin wrote: > >> This patch is to fix the handling with one more pre-insn > >> vpopcntb. It also fixes an oversight having V8HI in VEC_

[committed] libstdc++: Replace non-ascii character in test

Tested x86_64-linux. Pushed to trunk. -- >8 -- This ensures the test will work with -fexec-charset=ascii. libstdc++-v3/ChangeLog: * testsuite/std/format/arguments/lwg3810.cc: Replace UTF-8 ellipsis character. --- libstdc++-v3/testsuite/std/format/arguments/lwg3810.cc | 2 +- 1

'libgomp.fortran/target-nowait-array-section.f90' (was: [committed] libgomp: Fix comment typo)

Hi! On 2023-02-16T12:20:17+0100, Jakub Jelinek via Gcc-patches wrote: > I saw > FAIL: libgomp.fortran/target-nowait-array-section.f90 -O execution test > in my last x86_64-linux bootstrap. From quick skimming, it might be just > unreliable test, which assumes that asynchronous execution woul

[committed] libstdc++: Implement (P0290)

Tested x86_64-linux. Pushed to trunk. -- >8 -- This was approved for the Concurrency TS v2 in Issaquah. Although the TS is based on C++20, this enables the new header for C++17 as well. This will make it available to more users, and I hope that will get more feedback on the feature. libstdc++-v

[committed] libstdc++: Implement P2255R2 dangling checks for std::pair

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- This uses the new __reference_constructs_from_temporary built-in to identify when a std::pair constructor will bind a reference to a temporary that goes out of scope at the end of the constructor. For example, std::pair p(1, 2); will call the p

[committed] libstdc++: Fix name of in comment

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * include/experimental/optional: Fix header name in comment. --- libstdc++-v3/include/experimental/optional | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libstdc++-v3/include/experimental/o

[committed] libstdc++: Enable CTAD for std::basic_format_args (LWG 3810)

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- This was just approved in Issaquah. libstdc++-v3/ChangeLog: * include/std/format (__format::_Arg_store): New class template. (basic_format_args): Remove nested type _Store and add deduction guide from _Arg_store.

Re: [PING 2] [PATCH 0/3] RISC-V: optimize stack manipulation in save-restore

On 2/16/23 00:17, Fei Gao wrote: ping. We are in stage4 of our development cycle -- meaning that the focus is on regression bugfixing, not new features, optimizations and the like. This patch is in the queue and will be looked at once we move back into stage1 development for gcc-14. jeff

Re: [PATCH] PR tree-optimization/108697 - Create a lazy ssa_cache

On 2/16/23 02:55, Richard Biener wrote: On Wed, Feb 15, 2023 at 6:07 PM Andrew MacLeod via Gcc-patches wrote: This patch implements the suggestion that we have an alternative ssa-cache which does not zero memory, and instead uses a bitmap to track whether a value is currently set or not. It

Re: [PATCH] tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657]

On Thu, Feb 16, 2023 at 02:21:04PM +, Richard Biener wrote: > > That said, while this patch fixes the regression by allowing DSE of > > IFN_DEFERRED_INIT again, I think we probably have some latent bug in FRE > > where without this patch it seems to be fre5 that sees one unconditional > > c = 1

[PATCH] constraint: fix relaxed memory and repeated constraint handling

The function `constrain_operands' lacked the logic to consider relaxed memory constraints when "traditional" memory constraints were not satisfied, creating potential issues as observed during the reload compilation pass. In addition, it was observed that while `constrain_operands' chooses to disr

Re: [PATCH] tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657]

On Thu, 16 Feb 2023, Jakub Jelinek wrote: > Hi! > > The r13-1778 PR106378 tree-ssa-dse change didn't just add special support > for IFN_LEN_STORE and IFN_MASK_STORE internal function calls as I believe > was intended, but given that the function was > if (is builtin) { ... } > else if (lhs presen

Re: [PATCH 4/7] libstdc++: Use a PCH to speed up check-simd

On Wed, 15 Feb 2023 at 20:54, Matthias Kretz via Libstdc++ wrote: > > > Signed-off-by: Matthias Kretz > > libstdc++-v3/ChangeLog: > > * testsuite/experimental/simd/generate_makefile.sh: Generate and > pre-compile pch.h, which includes all headers that do not depend > on co

Re: [PATCH 2/7] libstdc++: Annotate most lambdas with always_inline

On Wed, 15 Feb 2023 at 20:50, Matthias Kretz via Libstdc++ wrote: > > > > All of the annotated lambdas are simply a necessary means for > implementing these functions and should never result in an actual > function call. Many of these lambdas would go away if C++ had better > language support for

Re: [PATCH V2 0/5] RISC-V: Implement Scalar Cryptography Extension

Hi Markku-Juhani: Scalar crypto is ratified I know, but the scalar crypto intrinsic part isn't standardized - and even the APIs listed in riscv_scalar_crypto.h are not documented anywhere yet. So what I mean is I am happy to accept this patch except the riscv_scalar_crypto.h header. Once the API

Re: [PATCH V2 0/5] RISC-V: Implement Scalar Cryptography Extension

On Thu, Feb 16, 2023, 13:29 Kito Cheng wrote: > Hi Shihua: > > Thanks for your patches! This patch set is generally in good shape, > but I would prefer to remove riscv_scalar_crypto.h at this moment > since it's NOT standardized yet. > Hi Kito, I'm not sure if you're referring to the scalar cry

Re: [PATCH] don't declare header-defined functions both static and inline

On Thu, Feb 16, 2023 at 08:37:34AM -0500, Patrick Palka wrote: > I can confirm that this patch only modifies headers that reside in > $prefix/lib/gcc/x86_64-pc-linux-gnu/13.0.1/plugin/include/ > (with --enable-languages=c,c++,fortran,objc,obj-c++ --enable-jit make install) > > Good point, I was ab

[PATCH] don't declare header-defined functions both static and inline, pt 2

This fixes some header-defined functions that are undesirably declared static and weren't caught by the "^static inline" pattern used in the previous patch. gcc/ChangeLog: * hash-table.h (gt_pch_nx): Remove static. * lra-int.h (lra_change_class): Likewise. * recog.h (which

Re: [PATCH V2 0/5] RISC-V: Implement Scalar Cryptography Extension

Hi Shihua: Thanks for your patches! This patch set is generally in good shape, but I would prefer to remove riscv_scalar_crypto.h at this moment since it's NOT standardized yet. Do you mind sending a new version of this patch set which does not include that and also update the testcases? On Th

[committed] libstdc++: Fix uses of non-reserved names in headers

Hi, instead of uglyfing all the libstdc++ code wouldn't it be simpler to just ignore all non-reserved macro expansions (+ some special ones like assert) inside system headers on compiler level? Regards, Maciej

Re: Re: [PATCH] RISC-V: Add vm* mask C api tests

TL;DR: I think most parts of the test could be added by generator instead of adding those test cases directly, we gonna stop putting all API testing testcase. RISC-V Vector intrinsic is not implement through the *.def file way, it's using same approach as SVE's intrinsic, create and register by C

[committed] libstdc++: Make names_pstl.cc require et tbb_backend

Sigh ... this test still isn't right, because it fails on systems without a bug-fix for TBB 2020.3. We could just add -fpermissive to the test options, but let's just require tbb_backend (which isn't matched on systems with the buggy headers). Separately, I'm going to backport the TBB fix to Fedora

Re: [PATCH] rs6000: Fix vector parity support [PR108699]

Hi Segher, Thanks for the review comments! on 2023/2/16 19:14, Segher Boessenkool wrote: > Hi! > > On Thu, Feb 16, 2023 at 05:23:40PM +0800, Kewen.Lin wrote: >> This patch is to fix the handling with one more pre-insn >> vpopcntb. It also fixes an oversight having V8HI in VEC_IP, >> replaces VP

Re: [committed] libstdc++: Fix uses of non-reserved names in headers

On Thu, 16 Feb 2023 at 11:45, Jakub Jelinek wrote: > > On Thu, Feb 16, 2023 at 11:47:54AM +0100, Jakub Jelinek via Gcc-patches wrote: > > On Thu, Feb 16, 2023 at 10:30:30AM +, Jonathan Wakely via Gcc-patches > > wrote: > > > Tested powerpc64le-linux. Pushed to trunk. > > > > > > These should

Re: [committed] libstdc++: Fix uses of non-reserved names in headers

On Thu, 16 Feb 2023 at 10:48, Jakub Jelinek wrote: > > On Thu, Feb 16, 2023 at 10:30:30AM +, Jonathan Wakely via Gcc-patches > wrote: > > Tested powerpc64le-linux. Pushed to trunk. > > > > These should be backported too. > > > > -- >8 -- > > > > The non-reserved names 'val' and 'dest' were be

[committed] libstdc++: Fix non-reserved names in

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * include/ext/throw_allocator.h: Use reserved names for parameters. --- libstdc++-v3/include/ext/throw_allocator.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libstdc++-v3

[committed] libstdc++: Add missing space after effective-target name in test

I only noticed this when sending the mail for he previous commit. Tested x86_64-linux and pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * testsuite/17_intro/names_pstl.cc: Add space after effective target name. --- libstdc++-v3/testsuite/17_intro/names_pstl.cc | 2 +- 1 fil

Re: [committed] libstdc++: Fix uses of non-reserved names in headers

On Thu, Feb 16, 2023 at 11:47:54AM +0100, Jakub Jelinek via Gcc-patches wrote: > On Thu, Feb 16, 2023 at 10:30:30AM +, Jonathan Wakely via Gcc-patches > wrote: > > Tested powerpc64le-linux. Pushed to trunk. > > > > These should be backported too. > > > > -- >8 -- > > > > The non-reserved na

[committed] libstdc++: Fix non-reserved names in PSTL headers

Tested x86_64-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * include/pstl/algorithm_fwd.h (__pattern_search_n) (__brick_unique_copy, __brick_adjacent_find) (__brick_generate_n, __pattern_generate_n): Use reserved names for parameters. * include

[committed] libgomp: Fix up some typos in libgomp.texi

Hi! I decided to check for repeated the the in libgomp and noticed there are several occurrences of a typo theads rather than threads in libgomp.texi. Tested on x86_64-linux, committed to trunk. 2023-02-16 Jakub Jelinek * libgomp.texi: Fix typos - theads -> threads. --- libgomp/libg

[committed] libgomp: Fix comment typo

Hi! I saw FAIL: libgomp.fortran/target-nowait-array-section.f90 -O execution test in my last x86_64-linux bootstrap. From quick skimming, it might be just unreliable test, which assumes that asynchronous execution wouldn't produce ordered sequence, but can't it happen even with asynchronous ex

Re: [PATCH] rs6000: Fix vector parity support [PR108699]

Hi! On Thu, Feb 16, 2023 at 05:23:40PM +0800, Kewen.Lin wrote: > This patch is to fix the handling with one more pre-insn > vpopcntb. It also fixes an oversight having V8HI in VEC_IP, > replaces VParity with VEC_IP, and adjusts the existing > UNSPEC_PARITY to a more meaningful name UNSPEC_PARITYB

Re: [committed] libstdc++: Fix uses of non-reserved names in headers

On Thu, Feb 16, 2023 at 10:30:30AM +, Jonathan Wakely via Gcc-patches wrote: > Tested powerpc64le-linux. Pushed to trunk. > > These should be backported too. > > -- >8 -- > > The non-reserved names 'val' and 'dest' were being used in our headers > but haven't been added to the 17_intro/names

Re: Re: [PATCH] RISC-V: Add vm* mask C api tests

Well, I think the best solution: 1. Remove all intrinsic test that I already commited. 2. Then, embed test-generator for this intrinsic unit-test. 3. Call test-generator during regression and test them. 4. Remove the testcases generated by the test-generator after regression. Not sure whether you

[committed] libstdc++: Fix uses of non-reserved names in headers

Tested powerpc64le-linux. Pushed to trunk. These should be backported too. -- >8 -- The non-reserved names 'val' and 'dest' were being used in our headers but haven't been added to the 17_intro/names.cc test. That's because they are used by and respecitvely on glibc-based systems. libstdc++-v

Re: Re: [PATCH] RISC-V: Add vm* mask C api tests

On Thu, Feb 16, 2023 at 05:53:48PM +0800, juzhe.zh...@rivai.ai wrote: > Thanks for reporting this. I think may be we can make reduce tests into 1/3. > For example: > We have: > * gcc.target/riscv/rvv/base/vmand_mm-1.c: New test. > * gcc.target/riscv/rvv/base/vmand_mm-2.c: New test. > * gcc.target/r

Re: Re: [PATCH] RISC-V: Add vm* mask C api tests

Thanks for reporting this. I think may be we can make reduce tests into 1/3. For example: We have: * gcc.target/riscv/rvv/base/vmand_mm-1.c: New test. * gcc.target/riscv/rvv/base/vmand_mm-2.c: New test. * gcc.target/riscv/rvv/base/vmand_mm-3.c: New test. Maybe we can reduce it into one test: vmand

Re: [PATCH] RISC-V: Add vm* mask C api tests

Hi! I see in the past few weeks you've added huge amounts of these tests du -shc *.target/riscv/*/ 34M gcc.target/riscv/rvv/ 28M g++.target/riscv/rvv/ 61M total and new are coming (nothing at all at this year's start). This is far larger than tests of any other architecture (i386 has 3

Re: [PATCH] PR tree-optimization/108697 - Create a lazy ssa_cache

On 2/16/23 08:55, Richard Biener wrote: On Wed, Feb 15, 2023 at 6:07 PM Andrew MacLeod via Gcc-patches wrote: This patch implements the suggestion that we have an alternative ssa-cache which does not zero memory, and instead uses a bitmap to track whether a value is currently set or not. I

[PATCH] rs6000: Fix vector parity support [PR108699]

Hi, The failures on the original failed case builtin-bitops-1.c and the associated test case pr108699.c here show that the current support of parity vector mode is wrong on Power. The hardware insns vprtyb[wdq] which operate on the least significant bit of each byte per element, they doesn't match

[PATCH] tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657]

Hi! The r13-1778 PR106378 tree-ssa-dse change didn't just add special support for IFN_LEN_STORE and IFN_MASK_STORE internal function calls as I believe was intended, but given that the function was if (is builtin) { ... } else if (lhs present and non-SSA_NAME) { ... } return false; and it added a

Re: [PATCH] reassoc: Fix up (ab) handling in eliminate_redundant_comparison [PR108783]

On Thu, 16 Feb 2023, Jakub Jelinek wrote: > Hi! > > The following testcase ICEs because eliminate_redundant_comparison sees > redundant comparisons in &&/|| where the comparison has (ab) SSA_NAME, > maybe_fold_{and,or}_comparisons optimizes them into a single comparison > and build_and_add_sum em

[PATCH] reassoc: Fix up (ab) handling in eliminate_redundant_comparison [PR108783]

Hi! The following testcase ICEs because eliminate_redundant_comparison sees redundant comparisons in &&/|| where the comparison has (ab) SSA_NAME, maybe_fold_{and,or}_comparisons optimizes them into a single comparison and build_and_add_sum emits a new comparison close to the definition operands,

Re: [PATCH] Fix PR target/90458

> This fixes dg.exp/stack-check-2.c, -7, 8, and -16.c, which is great! Try the attached patch. -- Eric Botcazoudiff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 227e3004077..d4f036a3f1e 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/te