On Mon, May 23, 2022 at 9:36 PM David Malcolm via Gcc-patches
wrote:
>
> gcc/ChangeLog:
> * tree-vect-slp-patterns.cc: Add "final" and "override" to
> vect_pattern::build impls as appropriate.
OK.
> Signed-off-by: David Malcolm
> ---
> gcc/tree-vect-slp-patterns.cc | 12 ++-
On Mon, May 23, 2022 at 8:34 PM H.J. Lu wrote:
>
> On Mon, May 23, 2022 at 12:38:06PM +0200, Richard Biener wrote:
> > On Sat, May 21, 2022 at 5:02 AM H.J. Lu via Gcc-patches
> > wrote:
> > >
> > > When recording store for RTL dead store elimination, check if the source
> > > register is set only
On 5/11/22 11:44 AM, David Faust wrote:
On 5/10/22 22:05, Yonghong Song wrote:
On 5/10/22 8:43 PM, Yonghong Song wrote:
On 5/6/22 2:18 PM, David Faust wrote:
On 5/5/22 16:00, Yonghong Song wrote:
On 5/4/22 10:03 AM, David Faust wrote:
On 5/3/22 15:32, Joseph Myers wrote:
On M
On Mon, 23 May 2022, Martin Sebor wrote:
> On 5/19/22 05:39, Richard Biener wrote:
> > On Wed, 18 May 2022, Martin Sebor wrote:
> >
> >> On 5/18/22 00:26, Richard Biener wrote:
> >>> On Tue, 17 May 2022, Martin Sebor wrote:
> >>>
> On 5/16/22 03:16, Richard Biener wrote:
> > The followin
On Mon, 23 May 2022, H.J. Lu wrote:
> PR target/104441
> * gcc.target/i386/pr104441-1a.c (load8bit_4x4_avx2): Initialize
> src23.
OK.
Thanks for fixing.
Richard.
> ---
> gcc/testsuite/gcc.target/i386/pr104441-1a.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> d
On Mon, 23 May 2022, H.J. Lu wrote:
> When -fcf-protection=branch is used, the compiler will generate jump
> tables for switch statements where the indirect jump is prefixed with
> the NOTRACK prefix, so it can jump to non-ENDBR targets. Since the
> indirect jump targets are generated by the comp
Hi,
Tested on powerpc64le-linux-gnu P8.
Pushed this as r13-721-g8fa8bca9f53fcfdedc2b4fa55093dbd1ab7abbd1.
BR,
Kewen
-
Commit r13-707 adjusts the below gimple:
iftmp.7_4 = _1 < _2 ? val2_7(D) : val1_8(D);
to
_3 = _1 >= _2;
iftmp.7_4 = _3 ? val1_8(D) : val2_7(D);
and result in one mo
When facing multiple PHI defs and one feeding the other we can
postpone processing uses of one and thus can proceed.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2022-05-20 Richard Biener
PR tree-optimization/100221
* tree-ssa-dse.cc (contains_phi_arg): New fun
On Mon, 23 May 2022, Qing Zhao wrote:
> Hi,
>
> I have added the patch to GCC11 and GCC12 in my local area and bootstrapped
> and regress tested on both x86 and aarch64, no any issues.
>
> Can I committed them to both GCC11 and GCC12 branches?
Yes.
Thanks,
Richard.
> Thanks.
>
>
>
>
> >
Hi,
Bootstrapped and regress-tested on powerpc64-linux-gnu P8 and
powerpc64le-linux-gnu P8, P9 and P10.
Pushed this as r13-720-g149d04ccbb908b3a251485b43faf204752942b9f.
---
As PR105627 exposes, pass analyze_swaps should skip debug
insn when doing unionfind_union. One debug insn can use
several
On 5/19/22 05:39, Richard Biener wrote:
On Wed, 18 May 2022, Martin Sebor wrote:
On 5/18/22 00:26, Richard Biener wrote:
On Tue, 17 May 2022, Martin Sebor wrote:
On 5/16/22 03:16, Richard Biener wrote:
The following tries to correct get_origin_and_offset_r not handling
non-constant sizes of
libiberty's ansidecl.h provides macros FINAL and OVERRIDE to allow
virtual functions to be labelled with the C++11 "final" and "override"
specifiers, but with empty implementations on pre-C++11 C++ compilers.
We've used the macros in many places in GCC, but as of as of GCC 11
onwards GCC has requi
On Mon, 23 May 2022 14:58:29 PDT (-0700), Vineet Gupta wrote:
Ping ! With commit restrictions relaxed now, can this be added to trunk
now ?
Committed, with some fixups to indentation and to handle the .c -> .cc
move (which git didn't figure out for this one, not exactly sure why).
Thx,
-Vi
Tested on x86_64-pc-linux-gnu.
Pushed to trunk as r13-716-g8473ef7be60443.
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/analyzer_gil_plugin.c: Replace uses of "FINAL" and
"OVERRIDE" with "final" and "override".
Signed-off-by: David Malcolm
---
.../gcc.dg/plugin/analyzer_gil_plugin.c
Ping ! With commit restrictions relaxed now, can this be added to trunk
now ?
Thx,
-Vineet
On 2/6/22 22:06, Vineet Gupta wrote:
This is at par with other major arches such as aarch64, i386, s390 ...
No testsuite regressions: same numbers w/ w/o
| === gcc Summary ===
|
|# of exp
On Mon, May 23, 2022 at 9:40 PM Roger Sayle wrote:
>
>
> It's not uncommon for GCC to convert between a (zero or one) Boolean
> value and a (zero or all ones) mask value, possibly of a wider type,
> using negation.
>
> Currently on x86_64, the following simple test case:
> __int128 foo(unsigned lo
On 5/18/22, Jason Merrill wrote:
> On 5/16/22 15:58, Patrick Palka wrote:
> > When processing a class template specialization, lookup_template_class
> > uses structural equality for the specialized type whenever one of its
> > template arguments uses structural equality. This the sensible thing to
On Mon, May 23, 2022 at 7:44 PM H.J. Lu wrote:
>
> PR target/104441
> * gcc.target/i386/pr104441-1a.c (load8bit_4x4_avx2): Initialize
> src23.
LGTM.
Thanks,
Uros.
> ---
> gcc/testsuite/gcc.target/i386/pr104441-1a.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
It's not uncommon for GCC to convert between a (zero or one) Boolean
value and a (zero or all ones) mask value, possibly of a wider type,
using negation.
Currently on x86_64, the following simple test case:
__int128 foo(unsigned long x) { return -(__int128)x; }
compiles with -O2 to:
mov
Good catch!
On Mon, 23 May 2022 at 20:12, Vineet Gupta wrote:
> Under extreme register pressure, compiler can use FP <--> int
> moves as a cheap alternate to spilling to memory.
> This was seen with SPEC2017 FP benchmark 507.cactu:
> ML_BSSN_Advect.cc:ML_BSSN_Advect_Body()
>
> | fmv.d.x fa
gcc/ChangeLog:
* adjust-alignment.cc: Add "final" and "override" to opt_pass
vfunc implementations, removing redundant "virtual" as
appropriate.
* asan.cc: Likewise.
* auto-inc-dec.cc: Likewise.
* auto-profile.cc: Likewise.
* bb-reorder.cc: Li
gcc/cp/ChangeLog:
* cxx-pretty-print.h: Add "final" and "override" to various vfunc
implementations, removing redundant "virtual" as appropriate.
* module.cc: Likewise.
gcc/ChangeLog:
* genmatch.cc: Add "final" and "override" to various vfunc
implementations
gcc/d/ChangeLog:
* decl.cc: Add "final" and "override" to all "visit" vfunc decls
as appropriate.
* expr.cc: Likewise.
* toir.cc: Likewise.
* typeinfo.cc: Likewise.
* types.cc: Likewise.
Signed-off-by: David Malcolm
---
gcc/d/decl.cc | 36 +
gcc/ChangeLog:
* tree-vect-slp-patterns.cc: Add "final" and "override" to
vect_pattern::build impls as appropriate.
Signed-off-by: David Malcolm
---
gcc/tree-vect-slp-patterns.cc | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/tree-vect-slp-pa
gcc/ChangeLog:
* config/i386/i386-features.h: Add "final" and "override" to
scalar_chain vfunc implementations as appropriate.
Signed-off-by: David Malcolm
---
gcc/config/i386/i386-features.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc
gcc/ChangeLog:
* ipa-cp.cc: Add "final" and "override" to call_summary_base vfunc
implementations, removing redundant "virtual" as appropriate.
* ipa-fnsummary.h: Likewise.
* ipa-modref.cc: Likewise.
* ipa-param-manipulation.cc: Likewise.
* ipa-profil
gcc/ChangeLog:
* value-relation.h: Add "final" and "override" to relation_oracle
vfunc implementations as appropriate.
Signed-off-by: David Malcolm
---
gcc/value-relation.h | 38 +-
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git
With C++11 we can add "final" and "override" to the decls of vfuncs
in derived classes, which documents to both human and automated readers
of the code that a decl is intended to override a vfunc in a base class,
and can help catch mistakes where we intended to override a vfunc, but
messed up the p
gcc/ChangeLog:
* compare-elim.cc: Add "final" and "override" to dom_walker vfunc
implementations, removing redundant "virtual" as appropriate.
* gimple-ssa-strength-reduction.cc: Likewise.
* ipa-prop.cc: Likewise.
* rtl-ssa/blocks.cc: Likewise.
* tree
gcc/ChangeLog:
* tree-switch-conversion.h: Add "final" and "override" to cluster
vfunc implementations as appropriate.
Signed-off-by: David Malcolm
---
gcc/tree-switch-conversion.h | 32 +---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --gi
gcc/ChangeLog:
* expr.cc: Add "final" and "override" to op_by_pieces_d vfunc
implementations as appropriate.
Signed-off-by: David Malcolm
---
gcc/expr.cc | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/gcc/expr.cc b/gcc/expr.cc
index 7197996cec7
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r13-715-g58c9c7407a1a99.
gcc/jit/ChangeLog:
* jit-recording.h: Add "final" and "override" to all vfunc
implementations that were missing them, as appropriate.
Signed-off-by: David Malcolm
---
gcc/j
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r13-714-g2ac1459f044ee5.
gcc/analyzer/ChangeLog:
* call-info.cc: Add "final" and "override" to all vfunc
implementations that were missing them, as appropriate.
* engine.cc: Likewise.
On Mon, May 23, 2022 at 12:38:06PM +0200, Richard Biener wrote:
> On Sat, May 21, 2022 at 5:02 AM H.J. Lu via Gcc-patches
> wrote:
> >
> > When recording store for RTL dead store elimination, check if the source
> > register is set only once to a constant. If yes, record the constant
> > as the s
On Linux/x86_64,
68e0063397ba820e71adc220b2da0581dce29ffa is the first bad commit
commit 68e0063397ba820e71adc220b2da0581dce29ffa
Author: Richard Biener
Date: Mon Apr 11 13:36:53 2022 +0200
Force the selection operand of a GIMPLE COND_EXPR to be a register
caused
FAIL: gcc.target/i386/pr
Under extreme register pressure, compiler can use FP <--> int
moves as a cheap alternate to spilling to memory.
This was seen with SPEC2017 FP benchmark 507.cactu:
ML_BSSN_Advect.cc:ML_BSSN_Advect_Body()
| fmv.d.x fa5,s9 # PDupwindNthSymm2Xt1, PDupwindNthSymm2Xt1
| .LVL325:
| ld
PR target/104441
* gcc.target/i386/pr104441-1a.c (load8bit_4x4_avx2): Initialize
src23.
---
gcc/testsuite/gcc.target/i386/pr104441-1a.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/i386/pr104441-1a.c
b/gcc/testsuite/gcc.targe
When -fcf-protection=branch is used, the compiler will generate jump
tables for switch statements where the indirect jump is prefixed with
the NOTRACK prefix, so it can jump to non-ENDBR targets. Since the
indirect jump targets are generated by the compiler and stored in
read-only memory, this doe
On Mon, 9 May 2022 at 21:21, Prathamesh Kulkarni
wrote:
>
> On Mon, 9 May 2022 at 19:22, Richard Sandiford
> wrote:
> >
> > Prathamesh Kulkarni writes:
> > > On Tue, 3 May 2022 at 18:25, Richard Sandiford
> > > wrote:
> > >>
> > >> Prathamesh Kulkarni writes:
> > >> > On Tue, 4 Jan 2022 at 19:
On Mon, May 23, 2022 at 12:53:37PM +0200, Richard Biener wrote:
> With the extra GENERIC folding we now do to
> (unsigned int) __v._M_value & 1 != (unsigned int) __v._M_value
> we end up with a sign-extending conversion to unsigned int
> rather than the sign-conversion to unsigned char we expect.
>
This patch introduces setmemsi insn pattern of two kinds, unrolled loop and
small loop, for fixed small length and constant initialization value.
gcc/ChangeLog:
* gcc/config/xtensa/xtensa-protos.h
(xtensa_expand_block_set_unrolled_loop,
xtensa_expand_block_set_small_loop)
Hi,
I have added the patch to GCC11 and GCC12 in my local area and bootstrapped and
regress tested on both x86 and aarch64, no any issues.
Can I committed them to both GCC11 and GCC12 branches?
Thanks.
> On May 10, 2022, at 8:38 AM, Qing Zhao via Gcc-patches
> wrote:
>
>
>
>> On May 10, 2
Hi Richard,
Currently for pr96912, we end up with:
W foo (W x, W y, V m)
{
W t;
vector(16) _1;
vector(16) signed char _2;
W _7;
vector(2) long long int _9;
vector(2) long long int _10;
[local count: 1073741824]:
_1 = m_3(D) < { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
On Mon, May 23, 2022 at 3:06 PM Roger Sayle wrote:
>
>
> Hi Richard,
> I was wondering what you think of the following patch as a solution to
> PR tree-optimization/96912, i.e. the ability to recognize pblendvb from
> regular code rather than as a target specific builtin?
>
> The obvious point of
This adds demangling support for C++ modules. A new 'W' component
along with augmented behaviour of 'S' components.
I guess I should go actually fix the ABI document itself now ...
include/
* demangle.h (enum demangle_component_type): Add module components.
libiberty/
Hi Richard,
I was wondering what you think of the following patch as a solution to
PR tree-optimization/96912, i.e. the ability to recognize pblendvb from
regular code rather than as a target specific builtin?
The obvious point of contention is that the current middle-end philosophy
around vector
Prathamesh Kulkarni writes:
> Hi Richard,
> The attached patch addresses formatting nits for affected targets.
> Tested with make all-gcc stage1 (except for gcn).
OK, thanks.
> Sorry if this sounds like a naive question, but what target triplet
> should I use to build gcn port ?
I think it's am
Prathamesh Kulkarni writes:
> On Wed, 18 May 2022 at 17:27, Richard Sandiford
> wrote:
>>
>> Prathamesh Kulkarni writes:
>> > Hi,
>> > The attached patch adds another parameter machine_mode op_mode to
>> > vec_perm_const
>> > hook to specify mode of input operands. The motivation for doing this
On Mon, May 23, 2022 at 8:44 AM Roger Sayle wrote:
>
>
> This resolves PR tree-optimization/105668, a P1 ice-on-valid regression
> triggered by my recent patch to add a vec_cmpeqv1tiv1ti define_expand
> to the i386 backend. The existence of this optab currently leads GCC
> to incorrectly assume t
On Mon, May 23, 2022 at 12:49 PM Roger Sayle wrote:
>
>
> Hi Uros,
> Hopefully, if I explain even more of the context, you'll better understand why
> this harmless (and at worse seemingly redundant) peephole2 is actually
> critical
> for addressing significant regressions in the compiler without
On 5/23/22 09:56, Iain Buclaw wrote:
> Excerpts from Martin Liška's message of Mai 11, 2022 10:17 am:
>> On 5/9/22 14:03, Richard Biener wrote:
>>> On Thu, May 5, 2022 at 4:30 PM Martin Liška wrote:
On 5/5/22 14:58, Iain Buclaw wrote:
> This D front-end change doesn't look right to m
On Mon, May 23, 2022 at 12:49 PM Roger Sayle wrote:
>
>
> Hi Uros,
> Hopefully, if I explain even more of the context, you'll better understand why
> this harmless (and at worse seemingly redundant) peephole2 is actually
> critical
> for addressing significant regressions in the compiler without
On Mon, 16 May 2022, Alexander Monakov wrote:
> On Mon, 9 May 2022, Jan Hubicka wrote:
>
> > > On second thought, it might be better to keep the assert, and place the
> > > loop
> > > under 'if (optimize)'?
> >
> > The problem is that at IPA level it does not make sense to check
> > optimize fl
This is a first cleanup opportunity from the COND_EXPR gimplification
which allows us to remove now redundant forward_propagate_into_cond.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2022-05-23 Richard Biener
* tree-ssa-forwprop.cc (forward_propagate_into_cond): Remov
With the extra GENERIC folding we now do to
(unsigned int) __v._M_value & 1 != (unsigned int) __v._M_value
we end up with a sign-extending conversion to unsigned int
rather than the sign-conversion to unsigned char we expect.
Relaxing that fixes the regression.
Bootstrapped and tested on x86_64-un
On Sat, May 21, 2022 at 5:31 PM Roger Sayle wrote:
>
>
> This patch simplifies vec_unpack_hi_expr/vec_unpack_lo_expr of a uniform
> constructor or vec_duplicate operand. The motivation is from PR 105621
> where after optimization, we're left with:
>
> vect_cst__21 = {c_8(D), c_8(D), c_8(D), c_8
Hi Uros,
Hopefully, if I explain even more of the context, you'll better understand why
this harmless (and at worse seemingly redundant) peephole2 is actually critical
for addressing significant regressions in the compiler without introducing new
testsuite failures. I wouldn't ask (again), if I
On Sat, May 21, 2022 at 5:02 AM H.J. Lu via Gcc-patches
wrote:
>
> When recording store for RTL dead store elimination, check if the source
> register is set only once to a constant. If yes, record the constant
> as the store source. It eliminates unrolled zero stores after memset 0
> in a loop
On Sat, May 21, 2022 at 12:28 AM Eugene Rozenfeld
wrote:
>
> Thank you for the feedback Richard. I attached a patch that saves/restores
> counts if the epilog doesn't use a scalar loop.
OK.
Thanks,
Richard.
> Eugene
>
> -Original Message-
> From: Richard Biener
> Sent: Thursday, May 1
On Mon, May 23, 2022 at 10:00 AM Uros Bizjak wrote:
>
> On Mon, May 23, 2022 at 9:16 AM Roger Sayle
> wrote:
> >
> >
> > This patch is an alternate/supplementary fix to PR tree-optimization/105668
> > that provides a vcond_mask_v1titi optab/define_expand to the i386 backend.
> > An undocumented
From: Jia-Wei Chen
Zfinx extension[1] had already finished public review. Here is the
implementation patch set that reuse floating point pattern and ban
the use of fpr when use zfinx as a target.
Current works can be find in follow links, will keep update zhinx
and zhinxmin soon after zfh/zfhmi
From: Jia-Wei Chen
Support 'TARGET_ZFINX' with float instruction pattern and builtin function.
Reuse 'TARGET_HADR_FLOAT' and 'TARGET_DOUBLE_FLOAT' patterns.
gcc/ChangeLog:
* config/riscv/riscv-builtins.cc (AVAIL): Add TARGET_ZFINX.
(riscv_atomic_assign_expand_fenv): Ditto.
From: Jia-Wei Chen
Limit zfinx abi support with 'ilp32','ilp32e','lp64' only.
Use GPR instead FPR when 'zfinx' enable, Only use even registers in RV32 when
'zdinx' enable.
gcc/ChangeLog:
* config/riscv/constraints.md (TARGET_HARD_FLOAT ? FP_REGS :
((TARGET_ZFINX || TARGET_ZDI
From: Jia-Wei Chen
Minimal support of zfinx extension, include 'zfinx' and 'zdinx'
corresponding to 'f' and 'd', the 'zdinx' will imply 'zfinx'
same as 'd' imply 'f'.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Add z[f/d]inx extension info.
* config/riscv/arch-canonica
From: Jia-Wei Chen
Zfinx extension[1] had already finished public review. Here is the
implementation patch set that reuse floating point pattern and ban
the use of fpr when use zfinx as a target.
Current works can be find in follow links, will keep update zhinx
and zhinxmin soon after zfh/zfhmi
On Mon, May 23, 2022 at 10:59 AM Roger Sayle wrote:
>
>
> Hi Uros,
>
> Thanks for the speedy review. The point of this patch is that (with
> pending changes to STV) the pand;pxor sequence isn't created until
> after combine, and hence doesn't/won't get caught by any of the
> current pre-reload/co
Hi Jakub,
On 19.05.22 15:59, Jakub Jelinek wrote:
I guess ok like this for now, but handling the further deep copy cases
(allocatable members of derived types) wouldn't be very nice, I think
generally we need a target hook to handle the stuff that is target specific
and express it say in further
Hi Uros,
Thanks for the speedy review. The point of this patch is that (with
pending changes to STV) the pand;pxor sequence isn't created until
after combine, and hence doesn't/won't get caught by any of the
current pre-reload/combine splitters.
> -Original Message-
> From: Uros Bizja
On Mon, May 23, 2022 at 10:44 AM Roger Sayle wrote:
>
>
> This is a ping of a patch from April (a dependency of another stage1 patch):
> https://gcc.gnu.org/pipermail/gcc-patches/2022-April/593123.html
>
> This patch has been refreshed/retested against gcc 13 trunk on
> x86_64-pc-linux-gnu with ma
Hi Richard,
The attached patch addresses formatting nits for affected targets.
Tested with make all-gcc stage1 (except for gcn).
Sorry if this sounds like a naive question, but what target triplet
should I use to build gcn port ?
Thanks,
Prathamesh
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/
On Wed, 18 May 2022 at 17:27, Richard Sandiford
wrote:
>
> Prathamesh Kulkarni writes:
> > Hi,
> > The attached patch adds another parameter machine_mode op_mode to
> > vec_perm_const
> > hook to specify mode of input operands. The motivation for doing this
> > is PR96463,
> > where we create ve
This is a ping of a patch from April (a dependency of another stage1 patch):
https://gcc.gnu.org/pipermail/gcc-patches/2022-April/593123.html
This patch has been refreshed/retested against gcc 13 trunk on
x86_64-pc-linux-gnu with make bootstrap and make -k check,
both with and without --target_bo
On Sun, May 22, 2022 at 11:03 AM Roger Sayle wrote:
>
>
> This simple patch implements Richard Biener's suggestion in comment #6
> of PR tree-optimization/52171 (from February 2013) that the insn-preds
> code generated by genpreds can avoid using strncmp when matching constant
> strings of length
On Mon, May 23, 2022 at 10:00 AM Uros Bizjak wrote:
>
> On Mon, May 23, 2022 at 9:16 AM Roger Sayle
> wrote:
> >
> >
> > This patch is an alternate/supplementary fix to PR tree-optimization/105668
> > that provides a vcond_mask_v1titi optab/define_expand to the i386 backend.
> > An undocumented
Joel Brobecker via Gcc-patches writes:
> Hello,
>
> Gentle ping on this patch.
>
> Thank you!
>
> On Mon, Apr 25, 2022 at 09:04:51AM -0700, Joel Brobecker wrote:
>> Hello,
>>
>> We have noticed that, when running the GCC testsuite on AArch64
>> RTEMS 6, we have about 150 tests failing due to a li
Dimitar Dimitrov writes:
> On Sun, May 08, 2022 at 10:31:04AM +0300, Dimitar Dimitrov wrote:
>> This patch fixes a spurious warning for pru-unknown-elf target:
>> gcc/testsuite/gcc.dg/mallign.c:12:27: warning: ignoring return value of
>> 'malloc' declared with attribute 'warn_unused_result' [-W
On Mon, May 23, 2022 at 9:16 AM Roger Sayle wrote:
>
>
> This patch is an alternate/supplementary fix to PR tree-optimization/105668
> that provides a vcond_mask_v1titi optab/define_expand to the i386 backend.
> An undocumented feature/bug of GCC's vectorization is that any target that
> provides
Excerpts from Martin Liška's message of Mai 11, 2022 10:17 am:
> On 5/9/22 14:03, Richard Biener wrote:
>> On Thu, May 5, 2022 at 4:30 PM Martin Liška wrote:
>>>
>>> On 5/5/22 14:58, Iain Buclaw wrote:
This D front-end change doesn't look right to me, besides the slight
>>>
>>> Hello.
>>>
>>>
This patch is an alternate/supplementary fix to PR tree-optimization/105668
that provides a vcond_mask_v1titi optab/define_expand to the i386 backend.
An undocumented feature/bug of GCC's vectorization is that any target that
provides a vec_cmpeq has to also provide a matching
vcond_mask. This ba
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