On Thu, 24 Jun 2021, Uros Bizjak wrote:
> On Thu, Jun 24, 2021 at 1:07 PM Richard Biener wrote:
>
> > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> > thus subtract, add alternating on lanes, start
On Mon, May 24, 2021 at 12:59 PM Hongtao Liu wrote:
>
> Hi:
> This patch is about to add define_insn_and_split to convert avx512
> mask mov back to pblendv instructions when mask operand is (lt: reg
> const0_rtx).
>
Hi:
Here's the patch I'm going to check in.
gcc/ChangeLog:
PR target
Hi:
Ater a second thought, I gave up on refactoring blendv's pattern, we
already have vec_mege with const_int mask, integer mask, and
introducing vector mask doesn't look very good.
Here is the final patch I'm going to check in.
Fold __builtin_ia32_pblendvb128 (a, b, c) as VEC_COND_EXPR (c < 0
On Fri, Jun 25, 2021 at 2:01 PM Hongtao Liu wrote:
>
> I didn't receive
> https://gcc.gnu.org/pipermail/gcc-patches/2021-June/572436.html in my
> gmail account, does anyone know why?
>
>
> >--- a/gcc/config/i386/i386-protos.h
> >+++ b/gcc/config/i386/i386-protos.h
> >@@ -260,6 +260,7 @@ extern voi
I didn't receive
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/572436.html in my
gmail account, does anyone know why?
>--- a/gcc/config/i386/i386-protos.h
>+++ b/gcc/config/i386/i386-protos.h
>@@ -260,6 +260,7 @@ extern void ix86_expand_mul_widen_hilo (rtx, rtx, rtx,
>bool, bool);
> extern
On Linux/x86_64,
e9e2bad7251477db92ab9ebcdc010f9282dd9890 is the first bad commit
commit e9e2bad7251477db92ab9ebcdc010f9282dd9890
Author: Martin Sebor
Date: Thu Jun 24 19:22:06 2021 -0600
middle-end: add support for per-location warning groups.
caused
FAIL: gcc.dg/analyzer/setjmp-2.c (te
On Thu, 2021-06-24 at 00:05 -0600, Jeff Law wrote:
>
>
> On 6/22/2021 3:44 AM, Xi Ruoyao via Gcc-patches wrote:
> > [Resend because the original subject missed "[PATCH]" and the path
> > in
> > ChangeLog is wrong.]
> >
> > On MIPS a call to __stack_chk_fail needs an additional .reloc
> > pseudo-
On Fri, Jun 25, 2021 at 12:13 AM Uros Bizjak via Gcc-patches
wrote:
>
> On Thu, Jun 24, 2021 at 2:12 PM H.J. Lu wrote:
> >
> > CPUID functions are used to detect CPU features. If vector ISAs
> > are enabled, compiler is free to use them in these functions. Add
> > __attribute__ ((target("genera
On 6/23/21 11:15 PM, Jeff Law wrote:
On 6/4/2021 3:43 PM, Martin Sebor via Gcc-patches wrote:
The attached patch introduces declarations of the new
suppress_warning(), warning_suppressed_p(), and copy_warning() APIs,
and replaces the uses of TREE_NO_WARNING in the middle end with them.
gcc-no
On 6/23/21 11:12 PM, Jeff Law wrote:
On 6/4/2021 3:42 PM, Martin Sebor via Gcc-patches wrote:
The attached patch replaces the uses of TREE_NO_WARNING in the C++
front end with the new suppress_warning(), warning_suppressed_p(),
and copy_warning() APIs.
gcc-no-warning-cp.diff
Add support for
On 6/23/21 11:06 PM, Jeff Law wrote:
On 6/4/2021 3:42 PM, Martin Sebor via Gcc-patches wrote:
The attached patch replaces the uses of TREE_NO_WARNING in the shared
C family front end with the new suppress_warning(),
warning_suppressed_p(), and copy_warning() APIs.
gcc-no-warning-c-family.diff
On 6/23/21 11:09 PM, Jeff Law wrote:
On 6/4/2021 3:41 PM, Martin Sebor via Gcc-patches wrote:
The attached patch replaces the uses of TREE_NO_WARNING in the C front
end with the new suppress_warning(), warning_suppressed_p(), and
copy_warning() APIs.
gcc-no-warning-c.diff
Add support for per
On 6/23/21 11:26 PM, Jeff Law wrote:
On 6/23/2021 1:47 PM, Martin Sebor via Gcc-patches wrote:
On 6/22/21 5:28 PM, David Malcolm wrote:
On Tue, 2021-06-22 at 19:18 -0400, David Malcolm wrote:
On Fri, 2021-06-04 at 15:41 -0600, Martin Sebor wrote:
The attached patch introduces the suppress_w
That example violates http://eel.is/c++draft/unique.ptr.runtime.general#3
On Thu, Jun 24, 2021 at 1:55 PM Patrick Palka via Gcc-patches
wrote:
>
> On Thu, 24 Jun 2021, Jonathan Wakely via Libstdc++ wrote:
>
> > The LWG issue proposes to add a conditional noexcept-specifier to
> > std::unique_p
In the first testcase below, during parsing of the alias template
ConstSpanType, transparency of alias template specializations means we
replace SpanType with SpanType's substituted definition. But this
substitution lowers the level of the CTAD placeholder for span(T()) from
2 to 1, and so the lat
As mentioned in the PR analysis, we shouldn't register a relation on an
outgoing conditional edge if range analysis proves that edge can never
be taken. Its just asking for trouble :-)
Bootstrapped on x86_64-pc-linux-gnu. Pushed.
Andrew
>From a0accaa99844b0c40661202635859f8c0be76cdd Mon Sep
Adding a testcase which shows the equivalence/relation engine working as
it should.
pushed.
Andrew
>From ce3316e9c02c81c509173572c71a101f4eb62a24 Mon Sep 17 00:00:00 2001
From: Andrew MacLeod
Date: Thu, 24 Jun 2021 13:49:51 -0400
Subject: [PATCH 2/2] Add a testcase to confirm the equivalence
On Thu, Jun 24, 2021 at 05:32:20PM +0800, Kewen.Lin wrote:
> on 2021/6/24 上午12:58, Segher Boessenkool wrote:
> > On Wed, Jun 23, 2021 at 12:17:07PM +0800, Kewen.Lin wrote:
> +#ifdef FLOAT128_HW_INSNS_ISA3_1
> TFtype __floattikf (TItype_ppc)
> __attribute__ ((__ifunc__ ("__floatti
On Thu, 24 Jun 2021 at 19:54, Patrick Palka wrote:
>
> On Thu, 24 Jun 2021, Jonathan Wakely via Libstdc++ wrote:
>
> > The LWG issue proposes to add a conditional noexcept-specifier to
> > std::unique_ptr's dereference operator. The issue is currently in
> > Tentatively Ready status, but even if i
On Linux/x86_64,
7a6c31f0f84a7295433ebac09b94fae2d5cc2892 is the first bad commit
commit 7a6c31f0f84a7295433ebac09b94fae2d5cc2892
Author: Richard Biener
Date: Mon May 31 13:19:01 2021 +0200
Add x86 addsub SLP pattern
caused
FAIL: gcc.dg/vect/pr96854.c -flto -ffat-lto-objects (internal co
On Linux/x86_64,
3bd86940c428de9dde53e41265fb1435ed236f5e is the first bad commit
commit 3bd86940c428de9dde53e41265fb1435ed236f5e
Author: liuhongt
Date: Tue Jan 26 16:29:32 2021 +0800
i386: Add vashlm3/vashrm3/vlshrm3 to enable vectorization of vector shift
vector. [PR98434]
caused
FAIL
On 6/23/2021 12:53 AM, CHIGOT, CLEMENT via Gcc-patches wrote:
Hi David,
Did you have a chance to take look at this patch ?
Thanks,
Clément
+DavidMalcolm
Can you review this patch when you have a moment?
Thanks, David
On Mon, May 17, 2021 at 3:05 PM David Edelsohn wrote:
The aix.h cha
On Thu, 24 Jun 2021, Jonathan Wakely via Libstdc++ wrote:
> The LWG issue proposes to add a conditional noexcept-specifier to
> std::unique_ptr's dereference operator. The issue is currently in
> Tentatively Ready status, but even if it isn't voted into the draft, we
> can do it as a conforming ex
On Thu, Jun 24, 2021 at 9:12 AM Uros Bizjak wrote:
>
> On Thu, Jun 24, 2021 at 2:12 PM H.J. Lu wrote:
> >
> > CPUID functions are used to detect CPU features. If vector ISAs
> > are enabled, compiler is free to use them in these functions. Add
> > __attribute__ ((target("general-regs-only"))) t
Bootstrapped and regtested on x86_64-linux-gnu. Ok for trunk?
fixincludes/
* fixfixes.c (print_quote): Define it unconditionally, taking
and returning const char *.
(machine_name_fix): Output quoted strings verbatim.
---
fixincludes/fixfixes.c | 30 +++
When looking for relations between equivalencies, a typo was causing the
same bitmap to be checked for both operands, instead of the correct one
for each. This caused us to never notice relations between equivalences.
I also noticed that under some circumstances the relation dump would
cal
When propagating the on-entry cache, new block ranges are calculated by
combining all the incoming edges and comparing to the old value.
When a recomputation was performed on an edge, it didn't take into
account that the value in the block may already be better than a
potential recompuation...
On Wed, Jun 9, 2021 at 4:39 PM H.J. Lu wrote:
>
> 1. Update move expanders to convert the CONST_WIDE_INT and CONST_VECTO
> operands to vector broadcast from an integer with AVX2.
> 2. Add ix86_gen_scratch_sse_rtx to return a scratch SSE register which
> won't increase stack alignment requirement a
On Thu, 2021-06-24 at 10:48 -0600, Jeff Law wrote:
>
>
> On 6/22/2021 1:05 AM, Xi Ruoyao via Gcc-patches wrote:
> > mips.exp does not support -fno-inline, causing the tests return
> > "ERROR:
> > Unrecognised option: -fno-inline for dg-options ... ".
> >
> > Use noinline attribute like other mip
On 6/22/2021 1:05 AM, Xi Ruoyao via Gcc-patches wrote:
mips.exp does not support -fno-inline, causing the tests return "ERROR:
Unrecognised option: -fno-inline for dg-options ... ".
Use noinline attribute like other mips target tests, to workaround it.
gcc/testsuite/
* gcc.target/mi
> -Original Message-
> From: Prathamesh Kulkarni
> Sent: 14 June 2021 09:02
> To: Christophe Lyon
> Cc: gcc Patches ; Kyrylo Tkachov
>
> Subject: Re: [ARM] PR98435: Missed optimization in expanding vector
> constructor
>
> On Wed, 9 Jun 2021 at 15:58, Prathamesh Kulkarni
> wrote:
> >
Richard Biener via Gcc-patches writes:
> On Wed, Jun 23, 2021 at 12:22 PM Richard Sandiford
> wrote:
>>
>> Richard Biener writes:
>> > On Wed, Jun 23, 2021 at 7:23 AM Trevor Saunders
>> > wrote:
>> >>
>> >> On Tue, Jun 22, 2021 at 02:01:24PM -0600, Martin Sebor wrote:
>> >> > On 6/21/21 1:15 A
> -Original Message-
> From: Prathamesh Kulkarni
> Sent: 24 June 2021 12:11
> To: gcc Patches ; Kyrylo Tkachov
>
> Subject: [ARM] PR66791: Replace builtins for vdup_n and vmov_n intrinsics
>
> Hi,
> This patch replaces builtins for vdup_n and vmov_n.
> The patch results in regression f
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
While converting some fold_cond_expr_with_comparison
to match, I found that I wanted to use "for cnd (cond vec_cond)"
but that was not causing the lowering of cond to happen.
What was happening was the lowering of th
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
To move a few things more to match-and-simplify from phiopt,
we need to allow match_simplify_replacement to run in early
phiopt. To do this we add a replacement for gimple_simplify
that is explictly for phiopt.
OK?
On Thu, Jun 24, 2021 at 2:12 PM H.J. Lu wrote:
>
> CPUID functions are used to detect CPU features. If vector ISAs
> are enabled, compiler is free to use them in these functions. Add
> __attribute__ ((target("general-regs-only"))) to CPUID functions
> to avoid vector instructions.
These functio
On Fri, May 14, 2021 at 09:20:25PM +0800, Chung-Lin Tang wrote:
> diff --git a/gcc/gimplify.c b/gcc/gimplify.c
> index e790f08b23f..69c4a8e0a0a 100644
> --- a/gcc/gimplify.c
> +++ b/gcc/gimplify.c
> @@ -10374,6 +10374,7 @@ gimplify_adjust_omp_clauses_1 (splay_tree_node n,
> void *data)
> g
On 6/24/21 11:15 AM, Patrick Palka wrote:
During alias CTAD, we're accidentally ignoring the aggregate deduction
candidate of the underlying template because it's added to the candidate
set separately via maybe_aggr_guide (which doesn't yet handle alias
templates) rather than via deduction_guides
On 6/24/21 11:13 AM, Jose E. Marchesi wrote:
This patch introduces a dwarf2int.h header, to be used by code that
needs access to the internal DIE structures and their attributes.
Why not put these bits in dwarf2out.h?
We think that it makes sense to have a separated interface file for
the
im
On 6/24/21 3:32 AM, Richard Biener wrote:
On Mon, Jun 21, 2021 at 11:55 PM Martin Sebor via Gcc-patches
wrote:
Ping: https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571980.html
Looking for a review of the LTO changes to switch TREE_NO_WARNING to
the suppress_warning() API.
Hmm, since th
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
To improve phiopt and be able to remove abs_replacement, this ports
most of "A CMP 0 ? A : -A" from fold_cond_expr_with_comparison to
match.pd. There is a few extra changes that are needed to remove
the "A CMP 0 ? A
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
Since match and simplify does not have all of the inverted
comparison patterns, it make sense to just have
phi-opt try to do the inversion and try match and simplify again.
OK? Bootstrapped and tested on x86_64-linu
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
Since match_simplify_replacement uses gimple_simplify, there is a new
ssa name created sometimes and then we go and replace the phi edge with
this new ssa name, the range information on the phi is lost.
Placing this
During alias CTAD, we're accidentally ignoring the aggregate deduction
candidate of the underlying template because it's added to the candidate
set separately via maybe_aggr_guide (which doesn't yet handle alias
templates) rather than via deduction_guides_for (which does). This
patch makes maybe_a
This patch introduces a dwarf2int.h header, to be used by code that
needs access to the internal DIE structures and their attributes.
>>>
>>> Why not put these bits in dwarf2out.h?
>> We think that it makes sense to have a separated interface file for
>> the
>> implementation of DWARF-b
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
I had missed this when wrote the patch which allowed the
gimple to be moved from inside the conditional as it. It
was also missed in the review. Anyways the range information
needs to be reset for the moved gimple
On 6/23/2021 4:19 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
To make things slightly easiler to convert fold_cond_expr_with_comparison
over to match.pd, expanding the arg0 argument into 3 different arguments
is done. Also this was simple because we don't use arg0 after grabbin
On 6/19/2021 3:49 PM, apinski--- via Gcc-patches wrote:
From: Andrew Pinski
To improve phiopt and be able to remove abs_replacement, this ports
most of "A CMP 0 ? A : -A" from fold_cond_expr_with_comparison to
match.pd. There is a few extra changes that are needed to remove
the "A CMP 0 ? A
On 6/24/21 3:27 AM, Richard Biener wrote:
On Thu, Jun 24, 2021 at 12:56 AM Martin Sebor wrote:
On 6/23/21 1:43 AM, Richard Biener wrote:
On Wed, Jun 23, 2021 at 7:23 AM Trevor Saunders wrote:
On Tue, Jun 22, 2021 at 02:01:24PM -0600, Martin Sebor wrote:
On 6/21/21 1:15 AM, Richard Biener
On 6/24/21 9:25 AM, Andrew MacLeod wrote:
On 6/24/21 8:29 AM, Richard Biener wrote:
THe original function in EVRP currently looks like:
=== BB 2
:
if (a_5(D) == b_6(D))
goto ; [INV]
else
goto ; [INV]
=== BB 8
Equivalence set
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On Thu, Jun 24, 2021 at 03:40:09PM +0100, Jonathan Wakely wrote:
> On Thu, 24 Jun 2021 at 15:34, Jonathan Wakely wrote:
> > Rather than use the _GLIBCXX_HAS_BUILTIN macro more widely, I'd prefer
> > to not use it where it isn't needed, as in the attached (untested)
> > patch.
>
> My rationale for
On 6/23/21 7:37 PM, Patrick Palka wrote:
Here we're crashing because cp_fold_function walks into the (templated)
requirements of a requires-expression outside a template, but the
folding routines aren't prepared to handle templated trees. This patch
fixes this by making cp_fold use evaluate_requ
On 6/24/21 9:52 AM, Jose E. Marchesi wrote:
On 5/31/21 12:57 PM, Jose E. Marchesi via Gcc-patches wrote:
This patch introduces a dwarf2int.h header, to be used by code that
needs access to the internal DIE structures and their attributes.
Why not put these bits in dwarf2out.h?
We think that
On Thu, 24 Jun 2021 at 15:34, Jonathan Wakely wrote:
> Rather than use the _GLIBCXX_HAS_BUILTIN macro more widely, I'd prefer
> to not use it where it isn't needed, as in the attached (untested)
> patch.
My rationale for this is that I'd prefer to use standardized features
like __has_include and _
On Thu, 24 Jun 2021 at 15:21, Jakub Jelinek wrote:
>
> On Thu, Jun 24, 2021 at 03:11:01PM +0100, Jonathan Wakely wrote:
> > On Thu, 24 Jun 2021 at 15:08, Jakub Jelinek wrote:
> > >
> > > On Thu, Jun 24, 2021 at 04:01:34PM +0200, Matthias Kretz wrote:
> > > > --- a/libstdc++-v3/include/experimental
On 6/22/2021 12:49 AM, Richard Biener wrote:
This adds a -ltrans-objects option to lto-plugin that by-passes
lto-wrapper invocation and instead feeds LD the final LTRANS objects
directly from the response file given as argument to the option.
This allows LD issues involving the linker-plugin p
On Thu, Jun 24, 2021 at 1:07 PM Richard Biener wrote:
> This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> thus subtract, add alternating on lanes, starting with subtract.
>
> It adds a corresponding opta
On Thu, Jun 24, 2021 at 03:11:01PM +0100, Jonathan Wakely wrote:
> On Thu, 24 Jun 2021 at 15:08, Jakub Jelinek wrote:
> >
> > On Thu, Jun 24, 2021 at 04:01:34PM +0200, Matthias Kretz wrote:
> > > --- a/libstdc++-v3/include/experimental/bits/simd.h
> > > +++ b/libstdc++-v3/include/experimental/bits/
On Thu, 24 Jun 2021 at 15:11, Jonathan Wakely wrote:
>
> On Thu, 24 Jun 2021 at 15:08, Jakub Jelinek wrote:
> >
> > On Thu, Jun 24, 2021 at 04:01:34PM +0200, Matthias Kretz wrote:
> > > --- a/libstdc++-v3/include/experimental/bits/simd.h
> > > +++ b/libstdc++-v3/include/experimental/bits/simd.h
> >
On Thu, 24 Jun 2021 at 15:08, Jakub Jelinek wrote:
>
> On Thu, Jun 24, 2021 at 04:01:34PM +0200, Matthias Kretz wrote:
> > --- a/libstdc++-v3/include/experimental/bits/simd.h
> > +++ b/libstdc++-v3/include/experimental/bits/simd.h
> > @@ -1598,7 +1598,9 @@ template
> >_GLIBCXX_SIMD_INTRINSIC c
On Thu, Jun 24, 2021 at 04:01:34PM +0200, Matthias Kretz wrote:
> --- a/libstdc++-v3/include/experimental/bits/simd.h
> +++ b/libstdc++-v3/include/experimental/bits/simd.h
> @@ -1598,7 +1598,9 @@ template
>_GLIBCXX_SIMD_INTRINSIC constexpr _To
>__bit_cast(const _From __x)
>{
> -//
On 6/23/21 6:00 PM, Joseph Myers wrote:
On Wed, 23 Jun 2021, Martin Liška wrote:
@Joseph: Can you share your thoughts about the used Makefile integration? What
do you suggest for 2)
(note that explicit listing of all .rst file would be crazy)?
You can write dependencies on e.g. doc/gcc/*.rst
For -ffast-math there was a missing using namespace __proposed left. The
attached patch resolves the issue.
From: Matthias Kretz
The __bit_cast function was a hack to achieve what __builtin_bit_cast
can do, therefore use __builtin_bit_cast if possible. However,
__builtin_bit_cast cannot be used
On 6/24/21 9:45 AM, Jakub Jelinek wrote:
On Thu, Jun 24, 2021 at 09:31:13AM -0400, Andrew MacLeod via Gcc-patches wrote:
We'll still compute values for statements that don't have a LHS.. there's
nothing inherently wrong with that. The primary example is
if (x_2 < y_3)
we will compute [0,0] [1
Hi Jason.
> On 5/31/21 12:57 PM, Jose E. Marchesi via Gcc-patches wrote:
>> This patch introduces a dwarf2int.h header, to be used by code that
>> needs access to the internal DIE structures and their attributes.
>
> Why not put these bits in dwarf2out.h?
We think that it makes sense to have a
Generate the marker for -fno-direct-extern-access to indicate that the
object file uses GOT to access all external symbols. Access to protected
symbols in the resulting shared library is treated as local, which requires
canonical function pointers and cannot be used with copy relocation.
Changes in the v2 patch.
1. Rename the option to -fdirect-extern-access.
---
On systems with copy relocation:
* A copy in executable is created for the definition in a shared library
at run-time by ld.so.
* The copy is referenced by executable and shared libraries.
* Executable can access the cop
-fdirect-extern-access is the default. With -fno-direct-extern-access:
1. Always use GOT to access undefined data and function symbols,
including in PIE and non-PIE. These will avoid copy relocations
in executables. This is compatible with existing executables and
shared libraries.
2.
On Thu, Jun 24, 2021 at 09:31:13AM -0400, Andrew MacLeod via Gcc-patches wrote:
> We'll still compute values for statements that don't have a LHS.. there's
> nothing inherently wrong with that. The primary example is
>
> if (x_2 < y_3)
>
> we will compute [0,0] [1,1] or [0,1] for that statement,
On Tue, 8 Jun 2021 at 13:10, Matthias Kretz wrote:
>
> The following patches mostly contain code cleanups and minor corrections. The
> major feature in this patchset is the last patch, which should make the use of
> stdx::simd much safer wrt. ODR violations involuntarily introduced by linking
> TUs
On 6/24/21 5:07 AM, Richard Biener wrote:
On Wed, Jun 23, 2021 at 9:25 PM Andrew MacLeod wrote:
On 6/23/21 2:37 PM, Richard Biener via Gcc-patches wrote:
On June 23, 2021 5:03:05 PM GMT+02:00, Aldy Hernandez via Gcc-patches
wrote:
The call to gimple_call_fntype() in gimple_call_return_type(
On 6/24/21 8:29 AM, Richard Biener wrote:
On Thu, Jun 24, 2021 at 11:55 AM Di Zhao via Gcc-patches
wrote:
You quote opportunities that are catched with this like
+ if (a != 0)
+{
+ c = b;
+}
+ for (unsigned i = 0; i < c; i++)
+{
+ if (a != 0)
+ {
+ if (i >
On Thu, Jun 24, 2021 at 12:11:23PM +0200, Jakub Jelinek wrote:
> Hi!
>
> The following testcase ICEs during error-recovery, as build_c_cast calls
> note_integer_operands on error_mark_node and that wraps it into
> C_MAYBE_CONST_EXPR which is unexpected and causes ICE later on.
> Seems most other c
On Fri, Jun 18, 2021 at 10:25:16PM +0800, Chung-Lin Tang wrote:
Note, you'll need to rebase your patch, it clashes with
r12-1768-g7619d33471c10fe3d149dcbb701d99ed3dd23528.
Sorry for that. And sorry for patch review delay.
> --- a/gcc/c/c-typeck.c
> +++ b/gcc/c/c-typeck.c
> @@ -13104,6 +13104,12
On Wed, 23 Jun 2021 at 16:46, Jonathan Wakely wrote:
>
> On Tue, 8 Jun 2021 at 09:57, Matthias Kretz wrote:
> >
> > As discussed a long time ago on IRC, this improves (i.e. decreases by
> > default)
> > the verbosity of make check-simd, gives more verbosity options, and finally
> > documents how
The LWG issue proposes to add a conditional noexcept-specifier to
std::unique_ptr's dereference operator. The issue is currently in
Tentatively Ready status, but even if it isn't voted into the draft, we
can do it as a conforming extensions. This commit also adds a similar
noexcept-specifier to ope
On Thu, Jun 24, 2021 at 12:20:56PM +0200, Jakub Jelinek wrote:
> Hi!
>
> This function keeps src_range member of the result uninitialized, which at
> least under valgrind can show up later when those uninitialized location_t's
> can make it into the IL or location_t hash tables.
>
> Fixed thusly,
Hi Andrew,
just a nit..
On Wed, 23 Jun 2021 15:19:13 -0700
apinski--- via Gcc-patches wrote:
> From: Andrew Pinski
>
> Since match and simplify does not have all of the inverted
> comparison patterns, it make sense to just have
> phi-opt try to do the inversion and try match and simplify agai
On Thu, Jun 24, 2021 at 5:47 AM Richard Biener
wrote:
>
> On Thu, Jun 24, 2021 at 2:42 PM H.J. Lu wrote:
> >
> > On Thu, Jun 24, 2021 at 5:35 AM Richard Biener
> > wrote:
> > >
> > > On Thu, Jun 24, 2021 at 2:13 PM H.J. Lu via Gcc-patches
> > > wrote:
> > > >
> > > > CPUID functions are used to
On Thu, Jun 24, 2021 at 2:42 PM H.J. Lu wrote:
>
> On Thu, Jun 24, 2021 at 5:35 AM Richard Biener
> wrote:
> >
> > On Thu, Jun 24, 2021 at 2:13 PM H.J. Lu via Gcc-patches
> > wrote:
> > >
> > > CPUID functions are used to detect CPU features. If vector ISAs
> > > are enabled, compiler is free t
On Thu, Jun 24, 2021 at 5:35 AM Richard Biener
wrote:
>
> On Thu, Jun 24, 2021 at 2:13 PM H.J. Lu via Gcc-patches
> wrote:
> >
> > CPUID functions are used to detect CPU features. If vector ISAs
> > are enabled, compiler is free to use them in these functions. Add
> > __attribute__ ((target("ge
On Thu, Jun 24, 2021 at 2:13 PM H.J. Lu via Gcc-patches
wrote:
>
> CPUID functions are used to detect CPU features. If vector ISAs
> are enabled, compiler is free to use them in these functions. Add
> __attribute__ ((target("general-regs-only"))) to CPUID functions
> to avoid vector instructions
On Thu, Jun 24, 2021 at 11:55 AM Di Zhao via Gcc-patches
wrote:
>
> This patch enhances FRE by recording equivalences generated by conditional
> statements, so that we can find more optimize opportunities in situations like
> following two cases:
>
> case 1:
> void f (unsigned int a, unsigned
CPUID functions are used to detect CPU features. If vector ISAs
are enabled, compiler is free to use them in these functions. Add
__attribute__ ((target("general-regs-only"))) to CPUID functions
to avoid vector instructions.
gcc/
PR target/101185
* config/i386/cpuid.h (__get_cpu
Thanks Jonathan.
Here are some benchmarks (assembly in [1]):
https://quick-bench.com/q/jclBXmi4QLDcRMLuuVpxTUsFmQw
Unfortunately, quick-bench times out unless some implementations are
commented out. You can copy the code and run it locally (needs google
benchmark) to get the full picture.
I real
Bootstrapped and regtested on s390x-redhat-linux. Ok for master?
This helps with generating the code for kernel hotpatches, which
contain individual functions and are loaded more than 2G away from
vmlinux. This should not create performance regressions for the
normal use cases, because for loc
Hi,
This patch replaces builtins for vdup_n and vmov_n.
The patch results in regression for pr51534.c.
Consider following function:
uint8x8_t f1 (uint8x8_t a) {
return vcgt_u8(a, vdup_n_u8(0));
}
code-gen before patch:
f1:
vmov.i32 d16, #0 @ v8qi
vcgt.u8 d0, d0, d16
On Tue, 22 Jun 2021, Uros Bizjak wrote:
> On Tue, Jun 22, 2021 at 12:34 PM Richard Biener wrote:
> >
> > On Tue, 22 Jun 2021, Uros Bizjak wrote:
> >
> > > On Tue, Jun 22, 2021 at 11:42 AM Richard Sandiford
> > > wrote:
> > >
> > > > >> Well, the pattern is called addsub in the x86 world because
On Thu, 24 Jun 2021, Uros Bizjak wrote:
> 2021-06-24 Uroš Bizjak
>
> gcc/
> PR target/89021
> * config/i386/i386-expand.c (ix86_expand_sse_unpack):
> Handle V8QI and V4HI modes.
> * config/i386/mmx.md (sse4_1_v4qiv4hi2):
> New insn pattern.
> (sse4_1_v4qiv4hi2): Ditto.
2021-06-24 Uroš Bizjak
gcc/
PR target/89021
* config/i386/i386-expand.c (ix86_expand_sse_unpack):
Handle V8QI and V4HI modes.
* config/i386/mmx.md (sse4_1_v4qiv4hi2):
New insn pattern.
(sse4_1_v4qiv4hi2): Ditto.
(mmxpackmode): New mode attribute.
(vec_pack_trunc_
Hi!
This function keeps src_range member of the result uninitialized, which at
least under valgrind can show up later when those uninitialized location_t's
can make it into the IL or location_t hash tables.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?
2021-0
On Thu, Jun 24, 2021 at 12:13:18PM +0200, Richard Biener wrote:
> > The recent addition of gcc_assert (regno < endregno); triggers during
> > glibc build on m68k.
> > The problem is that RA decisions shouldn't depend on expressions in
> > DEBUG_INSNs and those expressions can contain paradoxical su
On Thu, 24 Jun 2021, Jakub Jelinek wrote:
> Hi!
>
> The recent addition of gcc_assert (regno < endregno); triggers during
> glibc build on m68k.
> The problem is that RA decisions shouldn't depend on expressions in
> DEBUG_INSNs and those expressions can contain paradoxical subregs of certain
> p
Hi!
The following testcase ICEs during error-recovery, as build_c_cast calls
note_integer_operands on error_mark_node and that wraps it into
C_MAYBE_CONST_EXPR which is unexpected and causes ICE later on.
Seems most other callers of note_integer_operands check early if something
is error_mark_node
On Thu, 24 Jun 2021, Jakub Jelinek wrote:
> Hi!
>
> finish_bitfield_representative has an early out if the field after a
> bitfield has error_mark_node type, but that early out leads to TREE_TYPE
> of the DECL_BIT_FIELD_REPRESENTATIVE being NULL, which breaks assumptions
> on code that uses the D
Hi!
The recent addition of gcc_assert (regno < endregno); triggers during
glibc build on m68k.
The problem is that RA decisions shouldn't depend on expressions in
DEBUG_INSNs and those expressions can contain paradoxical subregs of certain
pseudos. If RA then decides to allocate the pseudo to a r
This patch enhances FRE by recording equivalences generated by conditional
statements, so that we can find more optimize opportunities in situations like
following two cases:
case 1:
void f (unsigned int a, unsigned int b)
{
if (a == b)
{
for (unsigned i = 0; i < a;
Hi!
finish_bitfield_representative has an early out if the field after a
bitfield has error_mark_node type, but that early out leads to TREE_TYPE
of the DECL_BIT_FIELD_REPRESENTATIVE being NULL, which breaks assumptions
on code that uses the DECL_BIT_FIELD_REPRESENTATIVE during error-recovery.
Th
This fixes SLP permute propagation to not propagate across operations
that have different semantics on different lanes like for example
the recently added COMPLEX_ADD_ROT90.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-06-24 Richard Biener
* tree-vect-slp.c (vect_
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