[PATCH v2] aarch64: Add cpu cost tables for A64FX

This patch add cost tables for A64FX. ChangeLog: 2021-01-08 Qian jianhua gcc/ * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. * config/aarch64/aarch64.c (a64fx_addrcost_table): New. (a64fx_regmove_cost, a64fx_vector_cost): New. (a64fx_tunings): Us

Re: [PATCH v2 0/2] RISC-V: Introduce new architecture extension test macros

Committed, thanks :) On Fri, Jan 8, 2021 at 3:49 AM Jim Wilson wrote: > > On Thu, Jan 7, 2021 at 1:55 AM Kito Cheng wrote: > > > This patch set introduce new set of architecture extension test macros > > which is accept on riscv-c-api-doc[1] recently. > > > > The motivation of this scheme is hav

Re: [PATCH] Fix array-quals-1.c for RISC-V

Committed On Fri, Jan 8, 2021 at 3:29 AM Jim Wilson wrote: > > On Wed, Jan 6, 2021 at 1:17 AM Kito Cheng wrote: > > > RISC-V will put those variable on srodata rather than rodata. > > gcc/testsuite/ChangeLog: > > * gcc.dg/array-quals-1.c: Allow srodata. > > > > OK. > > Jim

Re: [PATCH] i386: Merge various insn name mapping code attributes

On Thu, Jan 7, 2021 at 9:43 PM Uros Bizjak via Gcc-patches wrote: > > 2021-01-07 Uroš Bizjak > > No functional changes. > > gcc/ > * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn, > rotate_insn and optab code attributes. > Update all uses to merged code attribute

Re: [PATCH] genemit: Handle `const_double_zero' rtx

On Wed, 6 Jan 2021, Richard Sandiford wrote: > VOIDmode const_doubles should only be used for integers that cannot > be expressed as a sign-extended HOST_WIDE_INT. So (const_double 0 0) > is an invalid rtx in both integer and FP contexts. The updated change makes the VAX and PDP-11 backends sto

[PATCH 4/4] VAX: Remove a duplicate `cc' mode attribute

Remove the `cc' mode attribute that duplicates the implicitly defined `mode' attribute. No change to semantics. gcc/ * config/vax/vax.md (cc): Remove mode attribute. (subst_, subst_f): Rename to... (subst_, subst_f): ... these respectively. (*cbranch4_): U

[PATCH 3/4] VAX: Use a mode with `const_double_zero' expressions

For predictable semantics propagate the mode from operands referred by the FP substitution to the `const_double_zero' expressions used with the associated condition code calculation. Use an iterator to make copies of the FP substitution across the FP modes supported as the substitution now has

[PATCH 2/4] PDP11: Use a mode with `const_double_zero' expressions

For predictable semantics propagate the mode from operands referred by FP substitutions to the `const_double_zero' expressions used with the associated condition code calculation, resulting in the following update to insn-emit.c code produced for the `pdp11-aout' target (with machine descriptio

[PATCH 1/4] RTL: Update `const_double_zero' handling for mode and callable insns

Handle machine mode specification with `const_double_zero' and handle the rtx with callable code produced from named insns. Complementing commit 20ab43b5cad6 ("RTL: Add `const_double_zero' syntactic rtx") and removing a commit c60d0736dff7 ("PDP11: Use `const_double_zero' to express double zer

[PATCH 0/4] Fixes for `const_double_zero' use + VAX iterator simplification

Hi, This patch series fixes an issue with `const_double_zero' use causing a build failure reported with the `pdp11-aout' target by Martin Liška: superseding an earlier proposal discussed here:

Re: [PATCH] c++: Fix access checking of scoped non-static member [PR98515]

On 1/7/21 5:47 PM, Patrick Palka wrote: On Thu, 7 Jan 2021, Jason Merrill wrote: On 1/6/21 1:19 PM, Patrick Palka wrote: In the first testcase below, we incorrectly reject the use of the protected non-static member A::var0 from C::g() because check_accessibility_of_qualified_id, at template pa

[PATCH] issue -Wstring-compare for member arrays (PR 98097)

In PR 98097 Richard expects -Wstring-compare for a call to strcmp() with a member array and a string literal of larger size, used in an equality test. In virtually all cases the test will indicate the two are unequal because the string stored in the member must be shorter (to fit the terminating

[PATCH] c++: Add support for -std=c++2b

Derived from the changes that added C++2a support in 2017. https://gcc.gnu.org/g:026a79f70cf33f836ea5275eda72d4870a3041e5 No C++2b features are added here. Use of -std=c++2b sets __cplusplus to 202101L. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5541e694bb3..3a0d452b62b 100644 --- a/gcc/Ch

[PATCH] IBM Z: Introduce __LONG_DOUBLE_VX__ macro

Bootstrapped and regtested on s390x-redhat-linux. Ok for master? Give end users the opportunity to find out whether long doubles are stored in floating-point register pairs or in vector registers, so that they could fine-tune their asm statements. gcc/ChangeLog: 2020-12-14 Ilya Leoshkevich

[PATCH] x86-64: Use R10 for profiling large model

Since R10 is preserved when calling mcount, R10 can be used a scratch register to call mcount in large model. gcc/ PR target/98482 * config/i386/i386.c (x86_function_profiler): Use R10 to call mcount in large model. Sorry for large model with PIC. gcc/testsuite/

Re: [committed] fix another ICE in MEM_REF formatting (PR 98578)

On 1/7/21 2:37 PM, Jakub Jelinek wrote: On Thu, Jan 07, 2021 at 02:29:50PM -0700, Martin Sebor via Gcc-patches wrote: --- a/gcc/c-family/c-pretty-print.c +++ b/gcc/c-family/c-pretty-print.c @@ -1844,22 +1844,25 @@ print_mem_ref (c_pretty_printer *pp, tree e) } } - const tree ac

[PATCH] ipa-modref: avoid linebreak split in debug print

From: Sergei Trofimovich * ipa-modref.c (merge_call_side_effects): Fix linebreak split by reordering two print calls. --- gcc/ipa-modref.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/ipa-modref.c b/gcc/ipa-modref.c index fcc676d25e4..04613201f1

Re: [PATCH] c++: Fix access checking of scoped non-static member [PR98515]

On Thu, 7 Jan 2021, Jason Merrill wrote: > On 1/6/21 1:19 PM, Patrick Palka wrote: > > In the first testcase below, we incorrectly reject the use of the > > protected non-static member A::var0 from C::g() because > > check_accessibility_of_qualified_id, at template parse time, determines > > that

Re: [PATCH] c++: ICE with constexpr call that returns a PMF [PR98551]

On 1/7/21 10:10 AM, Patrick Palka wrote: We shouldn't do replace_result_decl after evaluating a call that returns a PMF because PMF temporaries aren't wrapped in a TARGET_EXPR (and so we can't trust ctx->object), and PMF initializers can't be self-referential anyway, so replace_result_decl would

[PATCH] testsuite: Fix test failures from outputs.exp [PR98225]

Hi, On 1/7/21 5:12 PM, Rainer Orth wrote: > The unsetenv needs to be wrapped in > > if [info exists env(MAKEFLAGS)] { > Done. > @@ -163,6 +167,9 @@ proc outest { test sources opts dirs out > if { $ogl != {} } { > pass "$test: $d$o" > file del

Re: [PATCH] c++: Fix up tsubst of BIT_CAST_EXPR [PR98329]

On 1/7/21 11:30 AM, Jakub Jelinek wrote: Hi! As the testcase shows, calling cp_build_bit_cast in tsubst_copy doesn't seem to be a good idea, because tsubst_copy might not really make the operand non-dependent, but as processing_template_decl can be 0, type_dependent_expression_p will return fals

Re: [PATCH] c++: Fix access checking of scoped non-static member [PR98515]

On 1/6/21 1:19 PM, Patrick Palka wrote: In the first testcase below, we incorrectly reject the use of the protected non-static member A::var0 from C::g() because check_accessibility_of_qualified_id, at template parse time, determines that the access doesn't go through 'this'. (This happens becau

Re: [committed] fix another ICE in MEM_REF formatting (PR 98578)

On Thu, Jan 07, 2021 at 02:29:50PM -0700, Martin Sebor via Gcc-patches wrote: > --- a/gcc/c-family/c-pretty-print.c > +++ b/gcc/c-family/c-pretty-print.c > @@ -1844,22 +1844,25 @@ print_mem_ref (c_pretty_printer *pp, tree e) > } > } > > - const tree access_type = TREE_TYPE (e); > + t

Re: [PATCH v3] handle MEM_REF with void* arguments (PR c++/95768)

On 1/7/21 1:26 AM, Jakub Jelinek wrote: On Sat, Jan 02, 2021 at 03:22:25PM -0700, Martin Sebor via Gcc-patches wrote: PR c++/95768 - pretty-printer ICE on -Wuninitialized with allocated storage gcc/c-family/ChangeLog: PR c++/95768 * c-pretty-print.c (c_pretty_printer::primary_e

[committed] fix another ICE in MEM_REF formatting (PR 98578)

Fixing the ICE in MEM_REF formatting (or the enhancements that came along with the fix) introduced another, ICE plus a plugin test failure. I have committed the attached simple patch to fix both. Martin PS There are outstanding bugs to fix/improvements to be made to the MEM_REF formatting (thou

Re: [PATCH] c++: Fix thinko in auto return type checking [PR98441]

On 1/5/21 7:31 PM, Marek Polacek wrote: This fixes a thinko in my r11-2085 patch: when I said "But only give the !late_return_type errors when funcdecl_p, to accept e.g. auto (*fp)() = f; in C++11" I should've done this, otherwise we give bogus errors mentioning "function with trailing return typ

Re: [PATCH] c++, v2: Fix ICE with __builtin_bit_cast [PR98469]

On 1/5/21 10:26 AM, Jakub Jelinek wrote: On Mon, Jan 04, 2021 at 04:01:25PM -0500, Jason Merrill via Gcc-patches wrote: On 1/4/21 3:48 PM, Jakub Jelinek wrote: On Mon, Jan 04, 2021 at 03:44:46PM -0500, Jason Merrill wrote: This change is OK, but part of the problem is that we're trying to do o

[PATCH] c++: ICE with constrained placeholder return type [PR98346]

This is essentially a followup to r11-3714 -- we ICEing from another "unguarded" call to build_concept_check, this time in do_auto_deduction, due to the presence of templated trees when !processing_template_decl. Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk and pe

[pushed] c++: Add some conversion sanity checking.

Another change I was working on revealed that for complex numbers we were building a ck_identity with build_conv, leading to the wrong active member in the union being set. Rather than add another enumeration of the appropriate conversion codes, I factored that out. gcc/cp/ChangeLog: * c

Re: [PATCH] c++: private inheritance access diagnostics fix [PR17314]

On 1/5/21 9:24 AM, Anthony Sharp via Gcc-patches wrote: This patch fixes PR17314 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=17314). Previously, when class C attempted to access member a declared in class A through class B, where class B privately inherits from A and class C inherits from B, GC

Re: [PATCH] libstdc++: Add support for C++20 barriers

Tested x86_64-pc-linux-gnu, committed to master. Jonathan Wakely writes: > On 17/12/20 15:37 -0800, Thomas Rodgers wrote: >>From: Thomas Rodgers >> >>Cleans up a few things mentioned on IRC. >> >>Adds >> >>libstdc++/ChangeLog: >> >> * doc/doxygen/user.cfg.in: Add new header. >> * in

[committed] analyzer: fix ICE when DECL_INITIAL is error_mark_node [PR98580]

lto-streamer-out.c's get_symbol_initial_value can return error_mark_node rather than DECL_INITIAL as an optimization to avoid extra sections for simple scalar values. Add a check to the analyzer to handle such cases gracefully. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed

Re: [PATCH v2 0/2] RISC-V: Introduce new architecture extension test macros

On Thu, Jan 7, 2021 at 1:55 AM Kito Cheng wrote: > This patch set introduce new set of architecture extension test macros > which is accept on riscv-c-api-doc[1] recently. > > The motivation of this scheme is have an unify naming scheme for > extension macro and add the capability to checking ver

Re: [OG10] Fortran: delinearize multi-dimensional array accesses

On 12/26/20 3:41 AM, Thomas Koenig wrote: Hi Sandra, The attached patch implements delinearization of array accesses in the Fortran front end, something that has been discussed for a long time. Definitely - among others, this is the subject of PR 14741, which is by now quite historic. I've

Re: [PATCH] Fix array-quals-1.c for RISC-V

On Wed, Jan 6, 2021 at 1:17 AM Kito Cheng wrote: > RISC-V will put those variable on srodata rather than rodata. > gcc/testsuite/ChangeLog: > * gcc.dg/array-quals-1.c: Allow srodata. > OK. Jim

Re: Patch RFA: Support non-ASCII file names in git-changelog

On Wed, Jan 6, 2021 at 5:37 AM Martin Liška wrote: > > On 1/6/21 8:25 AM, Martin Liška wrote: > > Anyway, I've got a workaround that I'm going to push. > > It's fixed now. > > @Ian: Can you please try to push the changes now? It worked. Thanks. Ian b87ec922c4090fcacf802c73b6bfd59a8632f8a5 diff

Re: [PATCH] libphobos: Allow building libphobos using Solaris/x86 assembler

Excerpts from Rainer Orth's message of January 7, 2021 5:17 pm: > Hi Iain, > >>> The Solaris assemblers don't support UTF-8 identifiers. Unless gdc can >>> encode them in some way for toolchains like this (no idea if this is >>> worth the effort), it may be possible to guard the tests with the uc

Re: [PATCH] libstdc++: Fix long double to_chars testcase [PR98384]

On 07/01/21 10:37 -0500, Patrick Palka via Libstdc++ wrote: The testcase was failing to compile on some targets due to its use of the non-standard functions nextupl and nextdownl. This patch makes the testcase instead use the C99 function nexttowardl in an equivalent manner. libstdc++-v3/Change

[committed] d: Merge upstream dmd 9038e64c5.

Hi, This patch adds support for using user-defined attributes on function arguments and single-parameter alias declarations. These attributes behave analogous to existing UDAs. Bootstrapped and regression tested on x86_64-linux-gnu/-m32/-mx32, and committed to mainline. Regards Iain. --- gcc/

[PATCH] c++, abi: Fix abi_tag attribute handling [PR98481]

Hi! In GCC10 cp_walk_subtrees has been changed to walk template arguments. As the following testcase, that changed the mangling of some functions. I believe the previous behavior that find_abi_tags_r doesn't recurse into template args has been the correct one, but setting *walk_subtrees = 0 for th

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On 07/01/2021 13:27, Christophe Lyon via Gcc-patches wrote: > On Thu, 7 Jan 2021 at 13:56, Richard Earnshaw > wrote: >> >> On 07/01/2021 00:59, Daniel Engel wrote: >>> --snip-- >>> >>> On Wed, Jan 6, 2021, at 9:05 AM, Richard Earnshaw wrote: >>> Thanks for working on this, Daniel. >

[PATCH] c++: Fix up tsubst of BIT_CAST_EXPR [PR98329]

Hi! As the testcase shows, calling cp_build_bit_cast in tsubst_copy doesn't seem to be a good idea, because tsubst_copy might not really make the operand non-dependent, but as processing_template_decl can be 0, type_dependent_expression_p will return false and then cp_build_bit_cast assumes the ty

Re: [PATCH] libphobos: Allow building libphobos using Solaris/x86 assembler

Hi Iain, >> The Solaris assemblers don't support UTF-8 identifiers. Unless gdc can >> encode them in some way for toolchains like this (no idea if this is >> worth the effort), it may be possible to guard the tests with the ucn >> effective-target keyword. >> >> Apart from that, it seems strange

Re: [PATCH] Add pytest for a GCOV test-case

On 1/6/21 12:36 AM, Jeff Law wrote: unresolved "could not find python interpreter $testcase" in run-gcov-pytest if you find the right magic in the output of your spawn. Achieved that with the updated patch. Ready for master? Thanks, Martin >From 53f5169156044acf8ecec498aa89d6be44c7173a Mon Sep

Re: [PATCH] Fix test failures from outputs.exp (PR testsuite/98225)

Hi Bernd, > this should fix the test failures in this test case. > > Is it OK for trunk? unfortunately not: there are two bugs and a couple of nits: * When testing with runtest --tool gcc outputs.exp I get ERROR: tcl error sourcing /vol/gcc/src/hg/master/local/gcc/testsuite/gcc.misc-test

Re: [PATCH] libphobos: Allow building libphobos using Solaris/x86 assembler

Excerpts from Rainer Orth's message of January 6, 2021 2:57 pm: > Hi Iain, > >>> This patch removes the disabling of libphobos when the Solaris/x86 >>> assembler is being used. >>> >>> Since r11-6373, D symbols are now compressed using back references, this >>> helped reduce the average symbol len

[PATCH] fix GIMPLE parser for loops

We do not tolerate "growing" a vector to a lower size. Bootstrap on x86_64-unknown-linux-gnu running, will commit as obvious. 2021-01-07 Richard Biener gcc/c/ * gimple-parser.c (c_parser_gimple_compound_statement): Only reallocate loop array if it is too small. --- gcc/c/gimp

[PATCH] libstdc++: Fix long double to_chars testcase [PR98384]

The testcase was failing to compile on some targets due to its use of the non-standard functions nextupl and nextdownl. This patch makes the testcase instead use the C99 function nexttowardl in an equivalent manner. libstdc++-v3/ChangeLog: PR libstdc++/98384 * testsuite/20_util/t

[PATCH] c++: ICE with constexpr call that returns a PMF [PR98551]

We shouldn't do replace_result_decl after evaluating a call that returns a PMF because PMF temporaries aren't wrapped in a TARGET_EXPR (and so we can't trust ctx->object), and PMF initializers can't be self-referential anyway, so replace_result_decl would always be a no-op. This fixes an ICE from

[committed] aarch64: Support conditional unpacked integer unary arithmetic on SVE

This patch extends the conditional unary integer operations from SVE_FULL_I to SVE_I. In each case the type suffix is taken from the element size rather than the container size: this matters for ABS and NEG, but doesn't matter for NOT. Tested on aarch64-linux-gnu and aarch64_be-elf, pushed to tru

Re: [committed] patch to fix PR97978

On 2021-01-07 6:01 a.m., Richard Sandiford wrote: Vladimir Makarov via Gcc-patches writes: The following fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97978 The patch was successfully bootstrapped on x86-64. Can you explain this a bit more? The assert fires if the register allocation

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

It seems to me we have two unrelated concerns mixed in the threads, I will reply in two different sub-threads to make this easier. This one to discuss the values of FE_* macros. On Tue, Nov 17, 2020 at 03:23:02PM -0700, AL gcc-patches wrote: > >>> +@cindex @code{fegetround@var{m}} instruction pa

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

It seems to me we have two unrelated concerns mixed in the threads, I will reply in two different sub-threads to make this easier. This one to discuss the handling of target and output from the expands On Wed, Nov 18, 2020 at 02:45:44PM -0700, AL gcc-patches wrote: > > > On 11/18/20 12:31 AM,

[PATCH] i386: Merge various insn name mapping code attributes

2021-01-07 Uroš Bizjak No functional changes. gcc/ * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn, rotate_insn and optab code attributes. Update all uses to merged code attribute. * config/i386/sse.md: Update all uses to merged code attribute. * config/

RE: [PATCH 1/8 v9]middle-end slp: Support optimizing load distribution

On Thu, 7 Jan 2021, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Thursday, January 7, 2021 1:21 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > > Subject: Re: [PATCH 1/8 v9]middle-end slp: Support optimizing load > > dist

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On Thu, 7 Jan 2021 at 13:56, Richard Earnshaw wrote: > > On 07/01/2021 00:59, Daniel Engel wrote: > > --snip-- > > > > On Wed, Jan 6, 2021, at 9:05 AM, Richard Earnshaw wrote: > > > >> > >> Thanks for working on this, Daniel. > >> > >> This is clearly stage1 material, so we've got time for a coupl

RE: [PATCH 1/8 v9]middle-end slp: Support optimizing load distribution

> -Original Message- > From: Richard Biener > Sent: Thursday, January 7, 2021 1:21 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > Subject: Re: [PATCH 1/8 v9]middle-end slp: Support optimizing load > distribution > > > From tamar.christ...@arm.com Mon Dec 28 14

Re: [PATCH 1/8 v9]middle-end slp: Support optimizing load distribution

From tamar.christ...@arm.com Mon Dec 28 14:36:32 2020 Date: Mon, 28 Dec 2020 13:35:56 + From: Tamar Christina To: gcc-patches@gcc.gnu.org Cc: n...@arm.com, rguent...@suse.de, o...@ucw.cz Subject: [PATCH 1/8 v9]middle-end slp: Support optimizing load distribution Hi All, This introduces a po

Re: [PATCH 4/8 v9]middle-end slp: upgrade complex add to new format and fix memory leaks

On Mon, 28 Dec 2020, Tamar Christina wrote: > Hi All, > > This fixes a memory leak in complex_add_pattern because I was not calling > vect_free_slp_tree when dissolving one side of the TWO_OPERANDS nodes. > > Secondly it also upgrades the class to the new inteface required by the other > pattern

Re: [PATCH 3/8 v9]middle-end slp: handle externals correctly in linear_loads_p

On Mon, 28 Dec 2020, Tamar Christina wrote: > Hi All, > > This fixes a bug with externals and linear_loads_p where I forgot to save the > value before returning. > > It also fixes handling of nodes with multiple children on a non VEC_PERM node. > There the child iteration would already resolve t

Re: [PATCH 2/8 v9]middle-end slp: fix is_linear_load_p to prevent multiple answers

On Mon, 28 Dec 2020, Tamar Christina wrote: > Hi All, > > This fixes an issue where is_linear_load_p could return the incorrect > permutation kind because it is singe pass. > > This arranges the candidates in such a way that there won't be any ambiguity > so > that the function can still be lin

Re: [PATCH] gimple-isel: Fall back to using vcond_mask [PR98560]

On Thu, 7 Jan 2021, Richard Sandiford wrote: > Richard Biener writes: > > On Wed, 6 Jan 2021, Richard Sandiford wrote: > > > >> PR98560 is about a case in which the vectoriser initially generates: > >> > >> mask_1 = a < 0; > >> mask_2 = mask_1 & ...; > >> res = VEC_COND_EXPR ; > >> > >> T

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On 07/01/2021 00:59, Daniel Engel wrote: > --snip-- > > On Wed, Jan 6, 2021, at 9:05 AM, Richard Earnshaw wrote: > >> >> Thanks for working on this, Daniel. >> >> This is clearly stage1 material, so we've got time for a couple of >> iterations to sort things out. > > I appreciate your feedback.

Re: [PATCH 3/3] arm: Auto-vectorization for MVE: vshr

ping^2? On Wed, 30 Dec 2020 at 11:34, Christophe Lyon wrote: > > ping? > > On Thu, 17 Dec 2020 at 18:48, Christophe Lyon > wrote: > > > > This patch enables MVE vshr instructions for auto-vectorization. New > > MVE patterns are introduced that take a vector of constants as second > > operand, a

Re: [PATCH 2/3] arm: Auto-vectorization for MVE: vshl

ping^2? On Wed, 30 Dec 2020 at 11:34, Christophe Lyon wrote: > > ping? > > On Thu, 17 Dec 2020 at 18:48, Christophe Lyon > wrote: > > > > This patch enables MVE vshlq instructions for auto-vectorization. > > > > The existing mve_vshlq_n_ is kept, as it takes a single > > immediate as second oper

Re: [PATCH 1/3] arm: Add movmisalign patterns for MVE (PR target/97875)

ping^2? On Wed, 30 Dec 2020 at 11:33, Christophe Lyon wrote: > > ping? > > On Thu, 17 Dec 2020 at 18:48, Christophe Lyon > wrote: > > > > This patch adds new movmisalign_mve_load and store patterns for > > MVE to help vectorization. They are very similar to their Neon > > counterparts, but use d

Re: [PATCH] gimple-isel: Fall back to using vcond_mask [PR98560]

Richard Biener writes: > On Wed, 6 Jan 2021, Richard Sandiford wrote: > >> PR98560 is about a case in which the vectoriser initially generates: >> >> mask_1 = a < 0; >> mask_2 = mask_1 & ...; >> res = VEC_COND_EXPR ; >> >> The vectoriser thus expects res to be calculated using vcond_mask.

Re: [committed] patch to fix PR97978

Vladimir Makarov via Gcc-patches writes: > The following fixes > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97978 > > The patch was successfully bootstrapped on x86-64. Can you explain this a bit more? The assert fires if the register allocation is inconsistent with the conflict information.

[backport gcc10] arc: Refurbish adc/sbc patterns

Back port for gcc10 The adc/sbc patterns were unecessary spliting, remove that and associated functions. gcc/ 2020-12-11 Claudiu Zissulescu * config/arc/arc-protos.h (arc_scheduling_not_expected): Remove it. (arc_sets_cc_p): Likewise. (arc_need_delay): Likewise.

New Spanish PO file for 'cpplib' (version 10.1-b20200209)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'cpplib' has been submitted by the Spanish team of translators. The file is available at: https://translationproject.org/latest/cpplib/es.po (This file, 'cpplib-10.1-b202002

Contents of PO file 'cpplib-10.1-b20200209.es.po'

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Re: [PATCH] i386, v2: Optimize blsi followed by comparison [PR98567]

On Thu, Jan 7, 2021 at 10:46 AM Jakub Jelinek wrote: > > On Thu, Jan 07, 2021 at 10:14:33AM +0100, Uros Bizjak wrote: > > I wonder if we should also add _cc variant where scratch is used: > > So like this then if it passes bootstrap/regtest? > > I think both variants are useful, e.g. one could com

[PATCH v2 2/2] RISC-V: Implement new style of architecture extension test macros.

- This patch introduce new set of architecture extension test macros which is accept on riscv-c-api-doc recently. - https://github.com/riscv/riscv-c-api-doc/blob/master/riscv-c-api.md#architecture-extension-test-macro - We will also mark deprecated for legacy architecture extension test macro

[PATCH v2 1/2] RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h

Pre-work of new style of architecture extension test macros, we need the list used in `config/riscv/riscv-c.c`, so those struct/class declaration must move to header file rather than local C file. gcc/ChangeLog * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION): Move t

[PATCH v2 0/2] RISC-V: Introduce new architecture extension test macros

This patch set introduce new set of architecture extension test macros which is accept on riscv-c-api-doc[1] recently. The motivation of this scheme is have an unify naming scheme for extension macro and add the capability to checking version. V2 Changes: - Fix MacOS build issue. - Create new hea

[PATCH] i386, v2: Optimize blsi followed by comparison [PR98567]

On Thu, Jan 07, 2021 at 10:14:33AM +0100, Uros Bizjak wrote: > I wonder if we should also add _cc variant where scratch is used: So like this then if it passes bootstrap/regtest? I think both variants are useful, e.g. one could compare the result but store it in one of the branches etc. 2021-01-

Re: [PATCH] i386: Optimize blsi followed by comparison [PR98567]

On Thu, Jan 7, 2021 at 10:14 AM Uros Bizjak wrote: > > On Thu, Jan 7, 2021 at 9:56 AM Jakub Jelinek wrote: > > > > Hi! > > > > The BLSI instruction sets SF and ZF based on the result and clears OF. > > CF is set to something unrelated. > > > > The following patch optimizes BLSI followed by compar

Re: [PATCH] i386: Optimize blsi followed by comparison [PR98567]

On Thu, Jan 7, 2021 at 9:56 AM Jakub Jelinek wrote: > > Hi! > > The BLSI instruction sets SF and ZF based on the result and clears OF. > CF is set to something unrelated. > > The following patch optimizes BLSI followed by comparison, so we don't need > to emit a TEST insn in between. > > Bootstrap

[PATCH] i386: Optimize blsi followed by comparison [PR98567]

Hi! The BLSI instruction sets SF and ZF based on the result and clears OF. CF is set to something unrelated. The following patch optimizes BLSI followed by comparison, so we don't need to emit a TEST insn in between. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2021-01-0

Re: [PATCH] RISC-V: Zihintpause: add __builtin_riscv_pause

My point is tracking info and consistent behavior/scheme with other extensions, so personally I strongly prefer it should be guarded with -march. But maybe we could create an issue on riscv-c-api-doc[1] or riscv-toolchain-conventions[2] to get feedback from LLVM folks, since I think this behavior

[PATCH] Fix test failures from outputs.exp (PR testsuite/98225)

Hi, this should fix the test failures in this test case. Is it OK for trunk? Thanks Bernd. From a8008af3db94a9dff7ae243ebfb40f45c54b3a81 Mon Sep 17 00:00:00 2001 From: Bernd Edlinger Date: Thu, 7 Jan 2021 09:37:32 +0100 Subject: [PATCH] Fix test failures from outputs.exp The .ld1_args file

Re: make FOR_EACH_IMM_USE_STMT safe for early exits

On Wed, Jan 6, 2021 at 12:34 PM Alexandre Oliva wrote: > > On Jan 4, 2021, Richard Biener wrote: > > > Hmm - while the change looks good, doesn't it end up > > calling end_imm_use_stmt_tranverse twice for those > > uses still calling BREAK_FROM_IMM_USE_STMT? > > It does. I'd considered introduc

Re: [PATCH] bswap: Fix up recent vector CONSTRUCTOR optimization [PR98568]

On Thu, 7 Jan 2021, Jakub Jelinek wrote: > Hi! > > As the testcase shows, bswap can match even byte-swapping or indentity > from low part of some wider SSA_NAME. > For bswap replacement other than for vector CONSTRUCTOR the code has been > using NOP_EXPR casts if the types weren't compatible, but

[PATCH] bswap: Fix up recent vector CONSTRUCTOR optimization [PR98568]

Hi! As the testcase shows, bswap can match even byte-swapping or indentity from low part of some wider SSA_NAME. For bswap replacement other than for vector CONSTRUCTOR the code has been using NOP_EXPR casts if the types weren't compatible, but for vectors we need to use VIEW_CONVERT_EXPR. The pr

Re: [PATCH v3] handle MEM_REF with void* arguments (PR c++/95768)

On Sat, Jan 02, 2021 at 03:22:25PM -0700, Martin Sebor via Gcc-patches wrote: > PR c++/95768 - pretty-printer ICE on -Wuninitialized with allocated storage > > gcc/c-family/ChangeLog: > > PR c++/95768 > * c-pretty-print.c (c_pretty_printer::primary_expression): For > SSA_NAMEs p

Re: [PATCH] gimple-isel: Check whether IFN_VCONDEQ is supported [PR98560]

On Wed, 6 Jan 2021, Richard Sandiford wrote: > This patch follows on from the previous one for the PR and > makes sure that we can handle == as well as <. Previously > we assumed without checking that IFN_VCONDEQ was available > if IFN_VCOND or IFN_VCONDU wasn't. > > The patch also fixes the def