On Fri, Feb 15, 2019 at 08:33:44AM +0100, Jakub Jelinek wrote:
> On Fri, Feb 15, 2019 at 03:25:33PM +0800, Bin.Cheng wrote:
> > So with what condition we can safely rewrite trapping operations into
> > non trapping one? Does the rewrite nullify -ftrapv which requires
> > trap behavior?
>
> For th
On Fri, Feb 15, 2019 at 03:25:33PM +0800, Bin.Cheng wrote:
> So with what condition we can safely rewrite trapping operations into
> non trapping one? Does the rewrite nullify -ftrapv which requires
> trap behavior?
For the particular expression? Yes, otherwise no.
-ftrapv should be either repl
On Fri, Feb 15, 2019 at 6:52 AM Jakub Jelinek wrote:
>
> Hi!
>
> The following testcase ICEs, because we try to gimplify a complex expression
> that with -ftrapv wants to emit multiple bbs. Fixed by using
> rewrite_to_non_trapping_overflow. Bootstrapped/regtested on x86_64-linux
So with what con
> The attached patch removes the assumption introduced earlier today
> in my fix for bug 87996 that the valid_constant_size_p argument is
> a constant expression. I couldn't come up with a C/C++ test case
> where this isn't true but apparently it can happen in Ada which I
> inadvertently didn't bu
On February 14, 2019 11:52:17 PM GMT+01:00, Jakub Jelinek
wrote:
>Hi!
>
>The following testcase ICEs, because we try to gimplify a complex
>expression
>that with -ftrapv wants to emit multiple bbs. Fixed by using
>rewrite_to_non_trapping_overflow. Bootstrapped/regtested on
>x86_64-linux
>and i6
NOTE_INSN_DELETED_LABEL is used to mark what used to be a 'code_label',
but was not used for other purposes than taking its address and was
transformed to mark that no code jumps to it. NOTE_INSN_DELETED_LABEL
is generated only in 3 places:
1. When delete_insn sees an unused label which is an exp
On Feb 14, 2019, at 6:15 AM, Jakub Jelinek wrote:
> Ah, yes, UNRESOLVED doesn't show up visible when running tests by hand,
> rather than doing test_summary. Here is an updated patch that adds the
> needed dg-skip-if directives. Ok for trunk?
Ok.
On Feb 13, 2019, at 1:09 AM, Jakub Jelinek wrote:
>
> ok for trunk?
Ok.
On Feb 13, 2019, at 5:37 AM, Jakub Jelinek wrote:
> Here is an updated patch that documents it. Bootstrapped/regtested on
> x86_64-linux and i686-linux, ok for trunk?
Ok.
This patch to the Go frontend and libgo by Nikhil Benesch harmonizes
types referenced by both C and Go. Compiling with LTO revealed a
number of cases in the runtime and standard library where C and Go
disagreed about the type of an object or function (or where Go and
code generated by the compiler
On Fri, 15 Feb 2019, Jakub Jelinek wrote:
> Hi!
>
> We ICE on the following testcase, because C nested functions are turned into
> !TREE_PUBLIC ones very soon, and the IPA code asserts that DECL_WEAK
> functions
> are either TREE_PUBLIC or DECL_EXTERNAL.
> As we reject static __attribute__((wea
On Thu, 14 Feb 2019, Jakub Jelinek wrote:
> Hi!
>
> We ICE on the following testcase, because while we save optimize,
> and optimize_{size,debug} vars during option saving/restoring, we don't save
> optimize_fast, and because of that end up with optimize 0 optimize_fast 1
> which the option handl
This patch to the libgo gotest script runs examples when appropriate
in the libgo testsuite. An example with a "// Output:" comment is
supposed to be run, comparing the output of the example with the text
in the comment. Up until now we were not actually doing that, so we
were in effect skipping
On Wed, Feb 13, 2019 at 5:21 PM Ian Lance Taylor wrote:
>
> Nikhil Benesch noticed that changes in the GCC backend were making the
> use of defer functions that call recover less efficient. A defer
> thunk is a generated function that looks like this (this is the entire
> function body):
>
>
Hi!
I did the following patch for the GCC 8 changes.html (in the 8.3 section):
Index: htdocs/gcc-8/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
retrieving revision 1.98
diff -u -r1.98 changes.html
--- htdoc
No functional changes.
2019-02-15 Uroš Bizjak
* config/i386/i386.h (TARGET_SUBTARGET64_ISA_DEFAULT):
Enable MMX, SSE and SSE2 by default.
* config/i386/i386.c (ix86_option_override_internal): Do not
explicitly set MMX, SSE and SSE2 flags for TARGET_64BIT here.
Bootstrapped and
On Thu, Feb 14, 2019 at 3:21 PM Uros Bizjak wrote:
>
> On Fri, Feb 15, 2019 at 12:14 AM H.J. Lu wrote:
>
> > > > > > > > > gcc/
> > > > > > > > >
> > > > > > > > > PR target/89021
> > > > > > > > > * config/i386/i386-builtin.def: Enable MMX intrinsics
> > > > > > > > > with
> > >
On Fri, Feb 15, 2019 at 12:14 AM H.J. Lu wrote:
> > > > > > > > gcc/
> > > > > > > >
> > > > > > > > PR target/89021
> > > > > > > > * config/i386/i386-builtin.def: Enable MMX intrinsics
> > > > > > > > with
> > > > > > > > SSE/SSE2/SSSE3.
> > > > > > > > * config
Hi!
The following testcase is miscompiled on i686-linux, because
make_extraction is asked to make an extraction of 33 bits from DImode MEM
at position 0 and happily returns ZERO_EXTRACT with SImode (even when SImode
can hold only 32 bits), the caller (make_field_assignment) then on this
testcase b
On Thu, Feb 14, 2019 at 3:12 PM H.J. Lu wrote:
>
> On Thu, Feb 14, 2019 at 2:57 PM Uros Bizjak wrote:
> >
> > On Thu, Feb 14, 2019 at 10:02 PM H.J. Lu wrote:
> >
> > > > > > > gcc/
> > > > > > >
> > > > > > > PR target/89021
> > > > > > > * config/i386/i386-builtin.def: Enable MM
On Thu, Feb 14, 2019 at 2:57 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 10:02 PM H.J. Lu wrote:
>
> > > > > > gcc/
> > > > > >
> > > > > > PR target/89021
> > > > > > * config/i386/i386-builtin.def: Enable MMX intrinsics with
> > > > > > SSE/SSE2/SSSE3.
> > > > > >
On 2/14/19 3:37 PM, David Malcolm wrote:
On Thu, 2019-02-14 at 14:19 -0700, Martin Sebor wrote:
On 2/13/19 6:48 AM, Martin Liška wrote:
Hi.
I'm sending patch where I document changes I made during GCC 9
development. I would appreciate both language and factical comments
about the patch.
Noth
On 2/12/19 6:04 PM, will wray wrote:
A proposed patch for Bug 88572 is attached to the bug report along
with a short description and Change Log (a link there gives a pretty
diff of the patch):
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88572#c15
I'd appreciate any review of this patch, as wel
Hi!
We ICE on the following testcase, because C nested functions are turned into
!TREE_PUBLIC ones very soon, and the IPA code asserts that DECL_WEAK functions
are either TREE_PUBLIC or DECL_EXTERNAL.
As we reject static __attribute__((weak)) void foo () {}, I think we should
reject weak nested f
On Thu, Feb 14, 2019 at 10:02 PM H.J. Lu wrote:
> > > > > gcc/
> > > > >
> > > > > PR target/89021
> > > > > * config/i386/i386-builtin.def: Enable MMX intrinsics with
> > > > > SSE/SSE2/SSSE3.
> > > > > * config/i386/i386.c (ix86_option_override_internal): Don't
>
Hi!
We ICE on the following testcase, because while we save optimize,
and optimize_{size,debug} vars during option saving/restoring, we don't save
optimize_fast, and because of that end up with optimize 0 optimize_fast 1
which the option handling code ICEs on -
if (fast)
gcc_assert (level =
Hi!
The following testcase ICEs, because we try to gimplify a complex expression
that with -ftrapv wants to emit multiple bbs. Fixed by using
rewrite_to_non_trapping_overflow. Bootstrapped/regtested on x86_64-linux
and i686-linux, ok for trunk and 8.3?
2019-02-14 Richard Biener
J
On Thu, Feb 14, 2019 at 06:23:37PM -0500, David Malcolm wrote:
> It's not clear to me what the rules are on backports (do
> I need approval, or re-review?) but the following have
> all been bootstrapped and regression-tested relative to
> today's gcc-8-branch (on x86_64-pc-linux-gnu):
>
> r259720:
On Thu, 2019-02-14 at 14:19 -0700, Martin Sebor wrote:
> On 2/13/19 6:48 AM, Martin Liška wrote:
> > Hi.
> >
> > I'm sending patch where I document changes I made during GCC 9
> > development. I would appreciate both language and factical comments
> > about the patch.
>
> Nothing technical, just
"make selftest-valgrind" shows:
187 bytes in 1 blocks are definitely lost in loss record 567 of 669
at 0x4A081D4: calloc (in
/usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x1F08260: xcalloc (xmalloc.c:162)
by 0xB24F32: init_emit() (emit-rtl.c:5843)
by 0xC10080: prepare
We were rather sloppy about handling the ownership of prefixes for
pretty_printer, and this lead to a memory leak for any time a
diagnostic_show_locus call emits multiple line spans.
This showed up in "make selftest-valgrind" as:
3,976 bytes in 28 blocks are definitely lost in loss record 632 of
PR c++/88795 reports an ICE building a function_type for a deduction guide
when the substitution into the function signature fails, due to an
error_mark_node being returned from tsubst_arg_types but not being checked
for. This error_mark_node gets used as the TYPE_ARG_TYPES, leading to
ICEs in var
PR c++/89036 reports an ICE due to this assertion failing
1136 /* A class should never have more than one destructor. */
1137 gcc_assert (!current_fns || via_using || !DECL_DESTRUCTOR_P (method));
on this template with a pair of dtors, with
mutually exclusive "requires" clauses:
templ
PR c++/86329 reports that the C++ frontend can offer bogus suggestions like:
#include
int compare()
{
return __n1 - __n2;
}
suggested.cc: In function 'int compare()':
suggested.cc:5:10: error: '__n1' was not declared in this scope
return __n1 - __n2;
^~~~
suggested.cc:5
It's not clear to me what the rules are on backports (do
I need approval, or re-review?) but the following have
all been bootstrapped and regression-tested relative to
today's gcc-8-branch (on x86_64-pc-linux-gnu):
r259720: "Don't offer suggestions for compiler-generated variables (PR
c++/85515)"
gcc/ChangeLog:
Backport of 263295 from trunk.
2018-08-03 David Malcolm
* doc/gcov.texi (-x): Remove duplicate "to".
* doc/invoke.texi (-Wnoexcept-type): Remove duplicate "calls".
(-Wif-not-aligned): Remove duplicate "is".
(-flto): Remove duplicate
gcc/cp/ChangeLog:
Backport of r259720 from trunk.
2018-04-27 David Malcolm
PR c++/85515
* name-lookup.c (consider_binding_level): Skip compiler-generated
variables.
* search.c (lookup_field_fuzzy_info::fuzzy_lookup_field): Flatten
nested i
2019-02-14 Uroš Bizjak
* gcc.target/i386/ssse3-pabsb.c: Re-enable 64-bit form on AVX targets.
* gcc.target/i386/ssse3-pabsd.c: Ditto.
* gcc.target/i386/ssse3-pabsw.c: Ditto.
* gcc.target/i386/ssse3-palignr.c: Ditto.
* gcc.target/i386/ssse3-phaddd.c: Ditto.
* gcc.target/i
Make the option handling code parse the -flag-init-integer value as a
C long type, allowing a larger range on systems where long is a larger
type than int. Document the behavior.
Regtested on x86_64-pc-linux-gnu, committed as obvious.
2019-02-14 Janne Blomqvist
PR fortran/81552
Hi,
This is a combine of netbsd patches sent by Maya, and related upstream
druntime changes.
Bootstrapped and regression tested on x86_64-linux-gnu, which only
confirms that the scoping is correct. I trust that Maya tested the
netbsd-d.c part, nothing looks out of place there anyway.
Committed
On 2/13/19 6:48 AM, Martin Liška wrote:
Hi.
I'm sending patch where I document changes I made during GCC 9
development. I would appreciate both language and factical comments
about the patch.
Nothing technical, just a few very minor language nits/suggestions.
Martin
diff --git a/htdocs/gcc-9
On Wed, 2019-02-13 at 12:34 +0100, Martin Liška wrote:
> May I please ping this so that we can reach mainline soon?
>
> Thanks,
> Martin
Martin, I can't approve this patch but I can say that I have used it on
Aarch64 and created a follow up patch for aarch64 to create a
get_multilib_abi_name targ
This patch fixes the Go frontend to copy the has_padding field if a
struct backend type already exists. The has_padding field is set when
creating the struct backend type, and checked when creating a
composite literal of that struct type. When two structs shared the
same backend type, because the
On Thu, Feb 14, 2019 at 12:54 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 9:50 PM H.J. Lu wrote:
> >
> > On Thu, Feb 14, 2019 at 12:07 PM Uros Bizjak wrote:
> > >
> > > On Thu, Feb 14, 2019 at 1:33 PM H.J. Lu wrote:
> > > >
> > > > Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. Don't
On Thu, 14 Feb 2019 at 19:27, Tamar Christina wrote:
>
> Hi All,
>
> This patch fixes a failing testcase due to a use of dg-options instead of
> dg-additional-options.
>
Makes sense.
It doesn't fail in any of the configurations I test though, in what
case do you see it failing?
> Committed under
On Thu, Feb 14, 2019 at 12:43 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 9:21 PM Uros Bizjak wrote:
> >
> > On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
> > >
> > > Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
> > > enable SSSE3 __m64 tests even when AVX is enable
On Thu, Feb 14, 2019 at 9:50 PM H.J. Lu wrote:
>
> On Thu, Feb 14, 2019 at 12:07 PM Uros Bizjak wrote:
> >
> > On Thu, Feb 14, 2019 at 1:33 PM H.J. Lu wrote:
> > >
> > > Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. Don't enable MMX ISA
> > > by default with TARGET_MMX_WITH_SSE.
> > >
> >
On Thu, Feb 14, 2019 at 12:07 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 1:33 PM H.J. Lu wrote:
> >
> > Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. Don't enable MMX ISA
> > by default with TARGET_MMX_WITH_SSE.
> >
> > For pr82483-1.c and pr82483-2.c, "-mssse3 -mno-mmx" compiles in
On Thu, Feb 14, 2019 at 9:21 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
> >
> > Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
> > enable SSSE3 __m64 tests even when AVX is enabled.
> >
> > PR target/89021
> > * gcc.target/i386/ss
On Thu, 2019-02-14 at 17:32 +0100, Jakub Jelinek wrote:
> On Thu, Feb 14, 2019 at 11:26:15AM -0500, David Malcolm wrote:
> > There's an asymmetry in the warning; it's looking for a comparison
> > of a
> > LHS expression against an RHS constant 0, spelled as "0".
> >
> > If we fold_for_warn on the
Commited as rev. 268895:
Sendinggcc/fortran/ChangeLog
Sendinggcc/fortran/symbol.c
Sendinggcc/testsuite/ChangeLog
Sendinggcc/testsuite/gfortran.dg/f2018_obs.f90
Adding gcc/testsuite/gfortran.dg/pr88248.f90
Transmitting file data .done
Committing transacti
On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
>
> Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
> enable SSSE3 __m64 tests even when AVX is enabled.
>
> PR target/89021
> * gcc.target/i386/ssse3-pabsb.c: Also enable __m64 check in
> 64-bit mode.
>
On Thu, Feb 14, 2019 at 1:41 AM Richard Biener
wrote:
>
> On Thu, Feb 14, 2019 at 2:21 AM Ian Lance Taylor wrote:
> >
> > Nikhil Benesch noticed that changes in the GCC backend were making the
> > use of defer functions that call recover less efficient. A defer
> > thunk is a generated function
I backported my fixes for PR85805 (combine), PR88892 (rs6000),
PR86684 and the first part of PR87149 (rs6000) to the GCC 8 branch.
Segher
2019-02-14 Segher Boessenkool
Backport from trunk
2018-08-31 Segher Boessenkool
PR target/86684
PR target/87149
On Thu, Feb 14, 2019 at 1:33 PM H.J. Lu wrote:
>
> Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. Don't enable MMX ISA
> by default with TARGET_MMX_WITH_SSE.
>
> For pr82483-1.c and pr82483-2.c, "-mssse3 -mno-mmx" compiles in 64-bit
> mode since MMX intrinsics can be emulated wit SSE.
>
> gcc
cpplib-9.1-b20190203.da.po.gz
Description: Binary data
The Translation Project robot, in the
name of your translation coordinator.
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'cpplib' has been submitted
by the Danish team of translators. The file is available at:
https://translationproject.org/latest/cpplib/da.po
(This file, 'cpplib-9.1-b20190203
This Go frontend patch by Ben Shi gives an error for duplicate string
keys in a map composite literal. This is a step toward fixing
https://golang.org/issue/28104. Bootstrapped and ran Go testsuite on
x86_64-pc-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
===
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the Danish team of translators. The file is available at:
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(This file, 'gcc-9.1-b20190203.da.po',
On Tue, 5 Feb 2019, Martin Liška wrote:
> #ifdef NATIVE_SYSTEM_HEADER_DIR
>/* Then search: /usr/include/finclude/ */
>add_sysrooted_hdrs_prefix (&prefixes, NATIVE_SYSTEM_HEADER_DIR
> "/finclude/",
> - NULL, 0, 0, false);
> + NULL, 0, 0, 0
Hi All,
This patch fixes a failing testcase due to a use of dg-options instead of
dg-additional-options.
Committed under the GCC obvious
Bootstrapped Regtested on arm-none-eabi and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2019-02-14 Tamar Christina
* gcc.ta
You will also need the following (untested) patch that prevents
allocation of MMX registers with TARGET_MMX_WITH_SSE in several insn
patterns.
2019-02-14 Uroš Bizjak
PR target/89021
* config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
* config/i386/sse.md (*vec_concatv
On Thu, 14 Feb 2019 at 11:13, Rainer Orth wrote:
>
> Hi Iain,
>
> > On Tue, 29 Jan 2019 at 13:24, Rainer Orth
> > wrote:
> >>
> >> Solaris ld only gained support for section bracketing in Solaris 11.4.
> >> Fortunately, in gdc it is only used for the minfo section, so it's easy
> >> to provide a
On 14/02/19 15:12 +, Jonathan Wakely wrote:
* doc/xml/manual/status_cxx2017.xml: Add P0063R3 to status table.
* doc/html/*: Regenerate.
And another update, thanks to Ulrich for pointing this out.
Committed to trunk.
commit 0fcc9bcdcb3923e50c6261bcdeb6f26694b3e245
Author:
On 2/14/19 4:52 PM, Tamar Christina wrote:
Hi Kyrill,
I couldn't find a way to actually generate this case so I have instead removed
the entry from ANY128. New patch and changelog below.
--
The iterator ANY64 are used in various general split patterns and is supposed
to contain all 64 bit m
Hi Kyrill,
I couldn't find a way to actually generate this case so I have instead removed
the entry from ANY128. New patch and changelog below.
--
The iterator ANY64 are used in various general split patterns and is supposed
to contain all 64 bit modes.
For some reason the pattern has HI but n
On Thu, Feb 14, 2019 at 11:26:15AM -0500, David Malcolm wrote:
> There's an asymmetry in the warning; it's looking for a comparison of a
> LHS expression against an RHS constant 0, spelled as "0".
>
> If we fold_for_warn on the RHS, then that folding introduces a warning
> for expressions that are
> Yeah, something like that. It will need some serious testing, to make
> sure we don't regress (including not regressing what that patch that took
> them away was meant to do). I can arrange some testing, will you do the
> patch though?
I can do the patch and also (correctness) testing for 32-b
On Thu, 2019-02-14 at 10:38 -0500, Jason Merrill wrote:
> On 2/6/19 9:23 PM, David Malcolm wrote:
> > PR c++/88680 reports excess warnings from -Wtype-limits after the
> > C++
> > FE's use of location wrappers was extended in r267272 for cases
> > such as:
> >
> >const unsigned n = 8;
> >s
On Thu, Feb 14, 2019 at 10:32:50AM +0100, Richard Biener wrote:
> On Wed, Feb 13, 2019 at 7:59 AM Alan Modra wrote:
> >
> > Covers for a generic fortran bug. The effect is that we'll needlessly
> > waste 64 bytes of stack space on some calls, but I don't see any
> > simple and fully correct patch
On 2/6/19 9:23 PM, David Malcolm wrote:
PR c++/88680 reports excess warnings from -Wtype-limits after the C++
FE's use of location wrappers was extended in r267272 for cases such as:
const unsigned n = 8;
static_assert (n >= 0 && n % 2 == 0, "");
t.C:3:18: warning: comparison of unsigned
Hi Jakub,
> The following testcase is miscompiled on x86_64-linux (-m32 and -m64) at
> -O1, as a pointer has two vars in points-to set, the first one is escaped
> heap var and the second one is escaped non-heap var, and in the end the last
> var that sets vars_contains_escaped won and overwrote
>
* doc/xml/manual/status_cxx2017.xml: Add P0063R3 to status table.
* doc/html/*: Regenerate.
Committed to trunk.
I've also updated the LibstdcxxTodo wiki page:
https://gcc.gnu.org/wiki/LibstdcxxTodo?action=diff&rev2=107&rev1=100
commit 5f7cebfc9de5a7c07c447d06b610002964065730
Au
Because uses-allocator construction is invariably done with a const
lvalue the __uses_alloc helper should use a const lvalue for the
is_constructible checks. Otherwise, it can detect that the type can be
constructed from an rvalue, and then an error happens when a const
lvalue is passed to the con
When -mmanual-endbr is used with -fcf-protection, only functions marked
with cf_check attribute should be instrumented with ENDBR. We should
skip rest_of_insert_endbranch on functions without cf_check attribute.
OK for trunk?
Thanks.
H.J.
---
gcc/
PR target/89353
* config/i386/
On 2/11/19 2:35 PM, Matthew Malcomson wrote:
On 10/02/19 09:42, Christophe Lyon wrote:
>
> Both this simple patch or the previous fix all the ICEs I reported,
thanks.
>
> Of course, the scan-assembler failures remain to be fixed.
>
In the testcase I failed to account for targets that don't s
> "Marc" == Marc Glisse writes:
>> Lastly, in the case of uninitialized variables, the usual solution
>> of initializing them is trivial and always safe (some coding styles
>> even require it).
Marc> Here it shows that we don't work with the same type of code at all. If
Marc> I am using a bo
On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
>
> Emulate MMX version of pshufb with SSE version by masking out the bit 3
> of the shuffle control byte. Only SSE register source operand is allowed.
>
> PR target/89021
> * config/i386/sse.md (ssse3_pshufbv8qi3): Renamed to ...
>
On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
>
> Emulate MMX movntq with SSE2 movntidi. Only SSE register source operand
> is allowed.
There is no SSE register source operand. Probably "Only register
source operand is allowed."
Uros.
>
> PR target/89021
> * config/i386/mmx.md
On Thu, Feb 14, 2019 at 05:48:29AM -0800, H.J. Lu wrote:
> I got
>
> UNRESOLVED: c-c++-common/ubsan/opts-1.c -O2 -flto
> -fuse-linker-plugin -fno-fat-lto-objects scan-tree-dump-times
> optimized "__ubsan_handle_divrem_overflow" 2
Ah, yes, UNRESOLVED doesn't show up visible when running tests
On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
>
> Emulate MMX sse_cvtpi2ps with SSE2 cvtdq2ps, preserving upper 64 bits of
> destination XMM register. Only SSE register source operand is allowed.
>
> PR target/89021
> * config/i386/mmx.md (sse_cvtpi2ps): Renamed to ...
>
* configure.ac: Check for C11 timespec_get function.
* crossconfig.m4 (freebsd, linux, gnu, cygwin, solaris, netbsd)
(openbsd): Likewise
* config.h.in: Regenerate.
* configure: Regenerate.
* include/c_global/ctime (timespec, timespec_get): Add to nam
This change is safe to make now (in stage 4), because the constructors
are currently incorrect and unusable (unless the supplied container
already contains a heap, in which case the new make_heap calls are
redundant but harmless).
* doc/xml/manual/intro.xml: Document LWG 2537 status.
Although there is no good use for stack> or similar
types with a mismatched value_type, it's possible somebody is doing that
and getting away with it currently. This patch only enforces the new
requirement for C++17 and later. During stage 1 we should consider
enforcing it for C++11 and C++14.
On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
>
> Emulate MMX ashr3/3 with SSE. Only SSE register
> source operand is allowed.
>
> PR target/89021
> * config/i386/mmx.md (mmx_ashr3): Changed to define_expand.
> Disallow TARGET_MMX_WITH_SSE.
> (mmx_3): Likewise.
>
On 2/14/19 12:23 PM, Martin Liška wrote:
> On 11/20/18 11:58 AM, Martin Liška wrote:
>> On 10/3/18 11:23 AM, Martin Liška wrote:
>>> On 9/25/18 8:48 AM, Martin Liška wrote:
Hi.
One more tested patch.
Martin
>>>
>>> One more tested patch.
>>>
>>> Martin
>>>
>>
>> Hi.
>>
Hi!
PR72715 "ICE in gfc_trans_omp_do, at fortran/trans-openmp.c:3164" is the
OpenACC variant of the OpenMP PR60127 "ICE with OpenMP and DO CONCURRENT"
(trunk r210331) changes.
On Mon, 29 Aug 2016 14:33:07 -0700, Cesar Philippidis
wrote:
> It looks like the fortran FE has some preliminary suppor
On Thu, Feb 14, 2019 at 12:03:30PM +0100, Jakub Jelinek wrote:
> On Wed, Feb 13, 2019 at 06:27:51PM -0800, H.J. Lu wrote:
> > --- a/gcc/doc/options.texi
> > +++ b/gcc/doc/options.texi
> > @@ -227,7 +227,10 @@ options, their @code{Negative} properties should form
> > a circular chain.
> > For exam
On Thu, Feb 14, 2019 at 3:09 AM Jakub Jelinek wrote:
>
> Hi!
>
> The following patch adds testcase coverage to make sure
> -f{,no-}sanitize{,-recover}= options are all passed to the compiler backend
> from the driver.
>
> All these tests were broken by the earlier option handling patch from H.J.:
Enabling of -fdec-include is missing from list of options enabled by
-fdec. When rendered as a PDF some lines are too long in the list of
options controlling Fortran dialect and in the list of options to
request or suppress errors and warnings.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=8934
Mark,
> Patch and change log attached to PR.
Could you please submit this the normal way, with the ChangeLog in the text and
the patch ad attachment?
Regards, Thomas
On Thu, Feb 14, 2019 at 10:32:50AM +0100, Richard Biener wrote:
> On Wed, Feb 13, 2019 at 7:59 AM Alan Modra wrote:
> >
> > Covers for a generic fortran bug. The effect is that we'll needlessly
> > waste 64 bytes of stack space on some calls, but I don't see any
> > simple and fully correct patch
This pach enables TM MMX intrinsics with SSE2 when MMX is disabled.
PR target/89021
* config/i386/i386.c (bdesc_tm): Enable MMX intrinsics with
SSE2.
---
gcc/config/i386/i386.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc/config/
Emulate MMX ssse3_psign3 with SSE. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/sse.md (ssse3_psign3): Add SSE emulation.
---
gcc/config/i386/sse.md | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/gcc/config/i3
Emulate MMX umulv1siv1di3 with SSE2. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation
support.
(*sse2_umulv1siv1di3): Add SSE2 emulation.
---
gcc/config/i386/mmx.md | 22 ++---
Emulate MMX ssse3_phdv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/sse.md (ssse3_phdv2si3):
Changed to define_insn_and_split to support SSE emulation.
---
gcc/config/i386/sse.m
Emulate MMX maskmovq with SSE2 maskmovdqu for TARGET_MMX_WITH_SSE by
zero-extending source and mask operands to 128 bits. Handle unmapped
bits 64:127 at memory address by adjusting source and mask operands
together with memory address.
PR target/89021
* config/i386/i386-c.c (ix86_
Emulate MMX ssse3_phwv4hi3 with SSE by moving bits
64:95 to bits 32:63 in SSE register. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/sse.md (ssse3_phwv4hi3):
Changed to define_insn_and_split to support SSE emulation.
---
gcc/config/i386/sse.m
Emulate MMX ssse3_pmaddubsw with SSE. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation.
---
gcc/config/i386/sse.md | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/gcc/con
Emulate MMX mmx_pmovmskb with SSE by zero-extending result of SSE pmovmskb
from QImode to SImode. Only SSE register source operand is allowed.
PR target/89021
* config/i386/mmx.md (mmx_pmovmskb): Changed to
define_insn_and_split to support SSE emulation.
---
gcc/config/i3
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