Re: [PATCH] Make strlen range computations more conservative

Hi Jeff, Hi Bernd, This change (git commit d0eb64b248a9e40dfa633c4e4baebc3b238fd6eb / svn rev. 263793) causes a segfault when build Linux kernel for AArch64. The exact configuration is === git_repo[linux]=https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git git_branch[linux]=linux-

Re: [PATCH] detect attribute mismatches in alias declarations (PR 81824)

On 10/23/2018 03:53 PM, Joseph Myers wrote: On Mon, 22 Oct 2018, Martin Sebor wrote: between aliases and ifunc resolvers. With -Wattribute-alias=1 that reduced the number of unique instances of the warnings for a Glibc build to just 27. Of those, all but one of the -Wattributes instances are

[PATCH libquadmath/PR68686]

Greetings, This is an almost trivial patch to get the correct sign for tgammaq. I don't have a testcase as I don't know where to put one. OK? Ed Smith-Rowland 2018-10-24 Edward Smith-Rowland <3dw...@verizon.net> PR libquadmath/68686 * math/tgammaq.c: Correct sign for negative argument.

Re: [PATCH] ux.texi: move "Quoting" and "Fix-it hints" from DiagnosticsGuidelines wiki page

On 10/23/2018 02:42 PM, David Malcolm wrote: I want to move material from https://gcc.gnu.org/wiki/DiagnosticsGuidelines into the new User Experience Guidelines chapter of our internals documentation. I've already update the link in that wiki page to point to the pertinent HTML build of the do

Re: [PATCH], PowerPC: Use f128 for long double built-ins if we have changed to use IEEE 128-bit floating point

On Tue, Oct 23, 2018 at 10:22:41PM +, Joseph Myers wrote: > On Tue, 23 Oct 2018, Michael Meissner wrote: > > > 2018-10-23 Michael Meissner > > > > * config/rs6000/rs6000.c (TARGET_MANGLE_DECL_ASSEMBLER_NAME): > > Define as rs6000_mangle_decl_assembler_name. > > (rs6000_mangle_d

[committed] Fix minor H8 bug exposed by recent combiner changes

This has been latent since it's H8/SX support went in like 15 years ago... The recent combiner changes twiddled the set of registers we need to save sometimes. No big deal, except for a minor bug in the H8/S H8/SX support for stm. On the H8/S (but not the SX) there are restrictions on the alig

Re: [PATCH] combine: Do not combine moves from hard registers

Hi Christophe, On Tue, Oct 23, 2018 at 03:25:55PM +0200, Christophe Lyon wrote: > On Tue, 23 Oct 2018 at 14:29, Segher Boessenkool > wrote: > > On Tue, Oct 23, 2018 at 12:14:27PM +0200, Christophe Lyon wrote: > > > I have noticed many regressions on arm and aarch64 between 265366 and > > > 265408

Re: [PATCH], PowerPC: Use f128 for long double built-ins if we have changed to use IEEE 128-bit floating point

On Tue, 23 Oct 2018, Michael Meissner wrote: > 2018-10-23 Michael Meissner > > * config/rs6000/rs6000.c (TARGET_MANGLE_DECL_ASSEMBLER_NAME): > Define as rs6000_mangle_decl_assembler_name. > (rs6000_mangle_decl_assembler_name): If the user switched from IBM > long double

Re: Relocation (= move+destroy)

On 23/10/18 23:17 +0200, Marc Glisse wrote: On Tue, 23 Oct 2018, Jonathan Wakely wrote: What depends on C++14 here? Just enable_if_t? Because we have __enable_if_t for use in C++11. Both GCC and Clang will allow constexpr-if and static_assert with no message in C++11. Probably it can be enabl

Re: [PATCH] add simple attribute introspection

On 10/22/2018 04:08 PM, Jason Merrill wrote: On 10/13/18 8:19 PM, Martin Sebor wrote: + oper = cp_parser_type_id (parser); + parser->in_type_id_in_expr_p = saved_in_type_id_in_expr_p; + + if (cp_parser_parse_definitely (parser)) +{ + /* If all went well, set OPER to the type. */ +

Re: [PATCH] detect attribute mismatches in alias declarations (PR 81824)

On Mon, 22 Oct 2018, Martin Sebor wrote: > between aliases and ifunc resolvers. With -Wattribute-alias=1 > that reduced the number of unique instances of the warnings for > a Glibc build to just 27. Of those, all but one of > the -Wattributes instances are of the form: > > warning: ‘leaf’ att

Re: [PATCH], PowerPC: Use f128 for long double built-ins if we have changed to use IEEE 128-bit floating point

On Tue, Oct 23, 2018 at 04:18:55PM -0500, Segher Boessenkool wrote: > Hi Mike, > > On Tue, Oct 23, 2018 at 04:12:11PM -0400, Michael Meissner wrote: > > This patch changes the name used by the l built-in functions that > > return > > or are passed long double if the long double type is changed fr

[rfc rs6000] troubles with gimple folding for vec_sel

Hi all, I've been attempting to get early gimple-folding to work with the vec_sel intrinsic for powerpc, and I've run into a snag or two such that I'm not sure how to best proceed. Code snippet is below, followed by a description of the issues as I interpret them below. Apologies for the ramble,

[PATCH, committed] Remove self from write after approval

As I'm now listed under Language Front Ends Maintainers. Regards -- Iain --- ChangeLog: 2018-10-23 Iain Buclaw * MAINTAINERS (Write After Approval): Remove myself. --- diff --git a/MAINTAINERS b/MAINTAINERS index 55c4663f4d2..d9ecc9f5580 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -33

Re: [PATCH], PowerPC: Use f128 for long double built-ins if we have changed to use IEEE 128-bit floating point

Hi Mike, On Tue, Oct 23, 2018 at 04:12:11PM -0400, Michael Meissner wrote: > This patch changes the name used by the l built-in functions that return > or are passed long double if the long double type is changed from the current > IBM long double format to the IEEE 128-bit format. > > I have don

Re: Debug unordered containers code cleanup

On 23/10/18 22:35 +0200, François Dumont wrote: On 10/23/2018 11:52 AM, Jonathan Wakely wrote: On 22/10/18 22:45 +0200, François Dumont wrote: I plan to commit the attached patch this week if not told otherwise. Looks good. This is to generalize usage of C++11 direct initialization in unor

Re: Relocation (= move+destroy)

On Tue, 23 Oct 2018, Jonathan Wakely wrote: CCing gcc-patches It seems to have disappeared somehow during the discussion, sorry. The tricky stuff in all looks right, I only have some comments on the __relocate_a functions ... Index: libstdc++-v3/include/bits/stl_uninitialized.h =

Re: [patch, fortran] Implement FINDLOC

Am 23.10.18 um 18:16 schrieb Dominique d'Humières: Anyway, the attached patch fixes this, It now gives the error 4 |integer, parameter :: I_FINDLOC_BACK(1) = findloc([1,1],1, & |1 Error: transformational intrinsic 'findloc' at (1)

[PATCH, committed] Add self as maintainer of D front-end and libphobos

David Edelsohn wrote: > > I am pleased to announce that the GCC Steering Committee has > accepted the D Language front-end and runtime for inclusion in GCC > and appointed Iain Buclaw as maintainer. > > The patches still require approval by a Global Reviewer. > > Please joi

Re: Debug unordered containers code cleanup

On 10/23/2018 11:52 AM, Jonathan Wakely wrote: On 22/10/18 22:45 +0200, François Dumont wrote: I plan to commit the attached patch this week if not told otherwise. Looks good. This is to generalize usage of C++11 direct initialization in unordered containers. It also avoids a number of sa

Re: [RFC] GCC support for live-patching

Hi Qing, Qing Zhao writes: > thanks a lot for your detailed explanation of the source based live patch > creation procedure. > really interesting and helpful information. > > more questions and comments below: > >>> >>> One question here, what’s the major benefit to prepare the patches >>>

[PATCH], PowerPC: Use f128 for long double built-ins if we have changed to use IEEE 128-bit floating point

This patch changes the name used by the l built-in functions that return or are passed long double if the long double type is changed from the current IBM long double format to the IEEE 128-bit format. I have done a bootstrap and make check with no regressions on a little endian power8 system. Is

[PATCH] ux.texi: move "Quoting" and "Fix-it hints" from DiagnosticsGuidelines wiki page

I want to move material from https://gcc.gnu.org/wiki/DiagnosticsGuidelines into the new User Experience Guidelines chapter of our internals documentation. I've already update the link in that wiki page to point to the pertinent HTML build of the docs: https://gcc.gnu.org/onlinedocs/gccint/Gui

[PATCH] Fix PR87691: transparent_union attribute does not work with MODE_PARTIAL_INT

msp430-elf uses the partial int type __int20 for pointers in the large memory model. __int20 has PSImode, with bitsize of 20. A few DejaGNU tests fail when built with -mlarge for msp430-elf, when transparent unions are used containing pointers. These are: - gcc.c-torture/compile/pr34885.c - gcc.d

Re: [PATCH] Remove reduntant dumps and make tp_first_run dump more compact.

> Hi. > > I've noticed a redundancy in cgraph_node dump function and I would like to > simplify > and compact how Function flags are printed. Plus I moved 'First run' to the > flags > as well. One diff example: > > @@ -133,8 +125,7 @@ >Referring: >Availability: available >Profile i

libgo patch committed: Remove unused armArch, hwcap and hardDiv

This patch by Tobias Klauser removes some variables from the runtime package, which are unused after https://golang.org/cl/140057. This should fix GCC PR 87661. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu, not that that proves much. Committed to mainline. Ian Index: gcc/go/gofronte

Re: [RFC] GCC support for live-patching

> On Oct 23, 2018, at 4:11 AM, Miroslav Benes wrote: >> >> One question here, what’s the major benefit to prepare the patches >> manually? > > I could almost quote what you wrote below. It is a C file, easy to review > and maintain. You have everything "under control". It allows to impleme

Re: [PATCH 02/14] Add D frontend (GDC) implementation.

On Tue, 23 Oct 2018 at 15:48, Richard Sandiford wrote: > > Iain Buclaw writes: > > I'm just going to post the diff since the original here, just to show > > what's been done since review comments. > > > > I think I've covered all that's been addressed, except for the couple > > of notes about the

Re: [patch] allow target config to state r18 is fixed on aarch64

Hi Wilco, > On 18 Oct 2018, at 19:08, Wilco Dijkstra wrote: >> I wondered if we could set it to R11 unconditionally and picked >> the way ensuring no change for !vxworks ports, especially since I >> don't have means to test more than what I described above. > > Yes it should always be the same

Re: [PATCH] powerpc: Optimized conversion of IBM long double to int128/int64

On Tue, Oct 23, 2018 at 09:01:26PM +0530, Rajalakshmi Srinivasaraghavan wrote: > This new implementation of fixunstfdi and fixunstfti > gives 16X performance improvement. :-) > * libgcc/config/rs6000/t-ppc64-fp (LIB2ADD): Add > $(srcdir)/config/rs6000/fixunstfti.c. And fixunstfdi.c?

Re: [PATCH] Provide extension hint for aarch64 target (PR driver/83193).

On 10/22/2018 07:05 AM, Martin Liška wrote: On 10/16/18 6:57 PM, James Greenhalgh wrote: On Mon, Oct 08, 2018 at 05:34:52AM -0500, Martin Liška wrote: Hi. I'm attaching updated version of the patch. Can't say I'm thrilled by the allocation/free (aarch64_parse_extension allocates, everyone el

Re: [PATCH][c++] Fix DECL_BY_REFERENCE of clone parms

On Tue, Oct 23, 2018 at 06:28:27PM +0200, Tom de Vries wrote: > On 7/31/18 11:22 AM, Richard Biener wrote: > > Otherwise OK for trunk and also for branches after a while. > > I just backported this fix to gcc-8-branch and gcc-7-branch. > > I noticed that the gcc-6 branch is frozen, and changes re

Re: [PATCH][c++] Fix DECL_BY_REFERENCE of clone parms

On 7/31/18 11:22 AM, Richard Biener wrote: > Otherwise OK for trunk and also for branches after a while. Jakub, I just backported this fix to gcc-8-branch and gcc-7-branch. I noticed that the gcc-6 branch is frozen, and changes require RM approval. Do you want this fix in gcc-6? Thanks, - Tom

Re: [PATCH, rs6000 2/2] Add compatible implementations of x86 SSSE3 intrinsics

On Tue, Oct 23, 2018 at 10:29:35AM -0500, Paul Clarke wrote: > On 10/22/2018 06:38 PM, Segher Boessenkool wrote: > > On Mon, Oct 22, 2018 at 01:26:11PM -0500, Paul Clarke wrote: > >> Target tests for the intrinsics defined in pmmintrin.h, copied from > >> gcc.target/i386. > >> > >> Tested on POWER8

Re: [patch, fortran] Implement FINDLOC

> Le 22 oct. 2018 à 23:00, Thomas Koenig a écrit : > > Hi Dominique, > >> With your patch, compiling the following test >> program logtest3 >>implicit none >>logical :: x = .true. >>integer, parameter :: I_FINDLOC_BACK(1) = findloc([1,1],1, & >> back=x) >> end program logtes

[PATCH v3] Avoid unnecessarily numbered clone symbols

On 2018-10-21 09:14 PM, Michael Ploujnikov wrote: > Continuing from https://gcc.gnu.org/ml/gcc-patches/2018-10/msg01258.html > > Fixed up the code after the change to concat suggested by Bernhard > Reutner. > > Outstanding question still remains: > > To write an exact replacement for numbered_cl

[PATCH] powerpc: Optimized conversion of IBM long double to int128/int64

This new implementation of fixunstfdi and fixunstfti gives 16X performance improvement. The design is focused on: - Making sure the end result was a pure leaf function that only needed builtins or inline functions. - Assumed power8 direct register transfer and accessed the IBM long double as in

Re: [PATCH, rs6000 2/2] Add compatible implementations of x86 SSSE3 intrinsics

On 10/22/2018 06:38 PM, Segher Boessenkool wrote: > On Mon, Oct 22, 2018 at 01:26:11PM -0500, Paul Clarke wrote: >> Target tests for the intrinsics defined in pmmintrin.h, copied from >> gcc.target/i386. >> >> Tested on POWER8 ppc64le and ppc64 (-m64 and -m32, the latter only reporting >> 16 new un

Re: [PATCH] combine: Do not combine moves from hard registers

On Tue, Oct 23, 2018 at 05:16:38PM +0200, Andreas Schwab wrote: > This miscompiles libffi and libgo on ia64. Ouch. I cannot read ia64 machine code without a lot of handholding... Any hints what is wrong? Segher

Re: [PATCH] combine: Do not combine moves from hard registers

This miscompiles libffi and libgo on ia64. The following libffi tests fail: libffi.call/nested_struct.c -W -Wall -Wno-psabi -O2 -fomit-frame-pointer execution test libffi.call/nested_struct.c -W -Wall -Wno-psabi -O2 execution test libffi.call/nested_struct.c -W -Wall -Wno-psabi -Os execution tes

Re: [ARM/FDPIC v3 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided

On Tue, Oct 23, 2018 at 02:58:21PM +0100, Richard Earnshaw (lists) wrote: > On 15/10/2018 11:10, Christophe Lyon wrote: > > Do you mean to also make -mfdpic non-existent/rejected when GCC is not > > configured > > for arm-uclinuxfdpiceabi? > > Ideally doesn't exist, so that it doesn't show up in

Re: [PATCH] Fix g++.dg/cpp2a/lambda-this3.C (Re: PATCH to enable testing C++17 by default)

OK. On Tue, Oct 23, 2018 at 4:52 AM Jakub Jelinek wrote: > > On Wed, Oct 17, 2018 at 03:31:43PM -0400, Marek Polacek wrote: > > As discussed in > > it > > seems to be a high time we turned on testing C++17 by default. > > > > The only int

Re: [PATCH] Switch conversion: support any ax + b transformation (PR tree-optimization/84436).

On 10/23/18 12:20 PM, Richard Biener wrote: > On Tue, Oct 23, 2018 at 10:37 AM Martin Liška wrote: >> >> On 10/22/18 4:25 PM, Jakub Jelinek wrote: >>> On Mon, Oct 22, 2018 at 04:08:53PM +0200, Martin Liška wrote: Very valid question. I hope as long as I calculate the linear function valu

[PATCH] Remove reduntant dumps and make tp_first_run dump more compact.

Hi. I've noticed a redundancy in cgraph_node dump function and I would like to simplify and compact how Function flags are printed. Plus I moved 'First run' to the flags as well. One diff example: @@ -133,8 +125,7 @@ Referring: Availability: available Profile id: 108032747 - First ru

Re: [PATCH] Fix g++.dg/cpp2a/lambda-this3.C (Re: PATCH to enable testing C++17 by default)

On Tue, Oct 23, 2018 at 10:52:02AM +0200, Jakub Jelinek wrote: > On Wed, Oct 17, 2018 at 03:31:43PM -0400, Marek Polacek wrote: > > As discussed in > > it > > seems to be a high time we turned on testing C++17 by default. > > > > The only

[PATCH] Fix PR87665

The following fixes a long-standing issue with SLP vectorization where the dependence checking didn't really reflect reality... (oops). I have sofar prepared trunk and GCC 8 variants. Bootstrap and regtest running on x86_64-unknown-linux-gnu. Richard. 2018-10-23 Richard Biener PR

Re: [ARM/FDPIC v3 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture

On 19/10/2018 14:40, Christophe Lyon wrote: > On 12/10/2018 12:45, Richard Earnshaw (lists) wrote: >> On 11/10/18 14:34, Christophe Lyon wrote: >>> The FDPIC register is hard-coded to r9, as defined in the ABI. >>> >>> We have to disable tailcall optimizations if we don't know if the >>> target fun

Re: [ARM/FDPIC v3 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided

On 15/10/2018 11:10, Christophe Lyon wrote: > On Fri, 12 Oct 2018 at 12:01, Richard Earnshaw (lists) < > richard.earns...@arm.com> wrote: > >> On 11/10/18 14:34, Christophe Lyon wrote: >>> In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie, >>> -fPIC or -fpic: indeed FDPIC code i

Re: [GCC][PATCH][Aarch64] Replace umov with cheaper fmov in popcount expansion

On 22/10/2018 10:02, Sam Tebbs wrote: > Hi all, > > This patch replaces the umov instruction in the aarch64 popcount > expansion with > the less expensive fmov instruction. > > Example: > > int foo (int a) { >   return __builtin_popcount (a); > } > > would generate: > > foo: >   uxtw    x0, w0

Re: [PATCH 02/14] Add D frontend (GDC) implementation.

Iain Buclaw writes: > I'm just going to post the diff since the original here, just to show > what's been done since review comments. > > I think I've covered all that's been addressed, except for the couple > of notes about the quadratic parts (though I think one of them is > actually O(N^2)). I

[gomp5] Add support for reduction clause task modifier on parallel

Hi! This implements task reduction support on parallel. Such reductions are registered with a special GOMP_parallel_reductions call which first determines number of threads, then registers the reductions and creates artificial taskgroup for those and then spawns threads as normally. The function

Re: [PATCH] bring netbsd/arm support up to speed. eabi, etc.

Thanks for posting this. Before we can commit it, however, we need to sort out the authorship and ensure that all the appropriate copyright assignments are in place. Are you the sole author, or are other NetBSD developers involved? Firstly, please provide a ChangeLog description for the patch.

[PATCH, testsuite] Fix sibcall-9 and sibcall-10 with -fPIC

Hi, gcc.dg/sibcall-9.c and gcc.dg/sibcall-10.c give execution failure on ARM when compiled with -fPIC due to the PIC access to volatile variable v creating an extra spill which causes the frame size of the two recursive functions to be different. Making the variable static solve the issue because

Re: [PATCH] combine: Do not combine moves from hard registers

On Tue, 23 Oct 2018 at 14:29, Segher Boessenkool wrote: > > On Tue, Oct 23, 2018 at 12:14:27PM +0200, Christophe Lyon wrote: > > I have noticed many regressions on arm and aarch64 between 265366 and > > 265408 (this commit is 265398). > > > > I bisected at least one to this commit on aarch64: > >

[PATCH] Remove extra memory allocation of strings.

Hello. As a follow up patch I would like to remove redundant string allocation on string which is not needed in my opinion. That bootstrap on aarch64-linux. Martin >From a21a626055442635057985323bb42ef29526e182 Mon Sep 17 00:00:00 2001 From: marxin Date: Mon, 22 Oct 2018 15:18:23 +0200 Subject

[PATCH] PR libstdc++/87704 fix unique_ptr(nullptr_t) constructors

Using a delegating constructor to implement these constructors means that they instantiate the destructor, which requires the element_type to be complete. In C++11 and C++14 they were specified to be delegating, but that was changed as part of LWG 2801 so in C++17 they don't require a complete typ

Re: [RFC] GCC support for live-patching

Hi, Qing Zhao writes: >> >> thanks for the proposal. The others have already expressed some of my >> worries and remarks, but I think it would be only right to write them >> again. Especially since I am part of the team responsible for >> implementation and maintenance of live patches here a

Re: [PATCH] combine: Do not combine moves from hard registers

On Tue, 23 Oct 2018 at 14:34, Segher Boessenkool wrote: > > On Tue, Oct 23, 2018 at 02:02:35PM +0200, Christophe Lyon wrote: > > I also bisected regressions on arm: > > gcc.c-torture/execute/920428-2.c > > gfortran.dg/actual_array_substr_2.f90 > > both point to this commit too. > > And what are th

Re: [PATCH, contrib] dg-cmp-results: display NA->FAIL by default

And now with the patch. My apologies for the omission. Best regards, Thomas On Tue, 23 Oct 2018 at 12:08, Thomas Preudhomme wrote: > > Hi, > > Currently, dg-cmp-results will not print anything for a test that was > not run before, even if it is a FAIL now. This means that when > contributing a c

Re: [PATCH, ARM] PR85434: Prevent spilling of stack protector guard's address on ARM

[Removing Jeff Law since middle end code hasn't changed] Hi, Given how memory operand are reloaded even with an X constraint, I've reworked the patch for the combined set and combined test instruction ot keep the mem out of the match_operand and used an expander to generate the right instruction

Re: [PATCH] combine: Do not combine moves from hard registers

On Tue, Oct 23, 2018 at 02:02:35PM +0200, Christophe Lyon wrote: > I also bisected regressions on arm: > gcc.c-torture/execute/920428-2.c > gfortran.dg/actual_array_substr_2.f90 > both point to this commit too. And what are the errors for those? Segher

Re: [PATCH] combine: Do not combine moves from hard registers

On Tue, Oct 23, 2018 at 12:14:27PM +0200, Christophe Lyon wrote: > I have noticed many regressions on arm and aarch64 between 265366 and > 265408 (this commit is 265398). > > I bisected at least one to this commit on aarch64: > FAIL: gcc.dg/ira-shrinkwrap-prep-1.c scan-rtl-dump ira "Split > live-r

Re: [PATCH] Fix some EVRP stupidness

Thanks! On Tue, Oct 23, 2018, 13:37 Richard Biener wrote: > On Tue, 23 Oct 2018, Richard Biener wrote: > > > On Tue, 23 Oct 2018, Aldy Hernandez wrote: > > > > > > > > > + if (tem.kind () == old_vr->kind () > > > > + && tem.min () == old_vr->min () > > > > + && tem.max

Re: [PATCH] combine: Do not combine moves from hard registers

On Tue, 23 Oct 2018 at 12:14, Christophe Lyon wrote: > > On Mon, 22 Oct 2018 at 22:17, Segher Boessenkool > wrote: > > > > On most targets every function starts with moves from the parameter > > passing (hard) registers into pseudos. Similarly, after every call > > there is a move from the retur

Re: [PATCH] Fix some EVRP stupidness

On Tue, 23 Oct 2018, Richard Biener wrote: > On Tue, 23 Oct 2018, Aldy Hernandez wrote: > > > > > > + if (tem.kind () == old_vr->kind () > > > + && tem.min () == old_vr->min () > > > + && tem.max () == old_vr->max ()) > > > + continue; > > > > I think it would

Performance impact of disabling non-clone IPA optimizations for the Linux kernel (was: "GCC options for kernel live-patching")

Hi, let me summarize some results from performance comparisons of Linux kernels compiled with and without certain IPA optimizations. It's a slight abuse of this thread, but I think having the numbers might perhaps give some useful insights on the potential costs associated with the -flive-patchin

Re: [PATCH][RFC] Early phiopt pass

On Mon, 22 Oct 2018, Richard Biener wrote: > On Wed, 29 Aug 2018, Richard Biener wrote: > > > On Wed, 29 Aug 2018, Jeff Law wrote: > > > > > On 08/29/2018 04:56 AM, Richard Biener wrote: > > > > > > > > In response to PR87105 I dusted off an old patch that adds an early > > > > phiopt pass. Re

Re: [PATCH] Make __PRETTY_FUNCTION__-like functions mergeable string csts (PR c++/64266).

On Tue, Oct 23, 2018 at 10:59 AM Martin Liška wrote: > > Hi. > > I've returned to this long-lasting issue after quite some time. Thanks to > Honza I hope > I can now address the root cause which caused output of a string constant > when debug info > was emitted. The problematic situation happene

Re: [PATCH] Add sinh(tanh(x)) and cosh(tanh(x)) rules

Hi, >> Generally the goal is 1ULP in round to nearest > > Has that changed recently?  At least in the past for double the goal has > been always .5ULP in round to nearest. Yes. 0.5 ULP (perfect rounding) as a goal was insane as it caused ridiculous slowdowns in the 10x range for no apparent r

[PATCH, contrib] dg-cmp-results: display NA->FAIL by default

Hi, Currently, dg-cmp-results will not print anything for a test that was not run before, even if it is a FAIL now. This means that when contributing a code change together with a testcase in the same commit one must run dg-cmp-results twice: once to check for regression on a full testsuite run an

Re: [PATCH] Add sinh(tanh(x)) and cosh(tanh(x)) rules

On Tue, Oct 23, 2018 at 10:37:54AM +, Wilco Dijkstra wrote: > >> So I think the runtime math libraries shoot for .5 ULP (yes, they don't > >> always make it, but that's their goal).  We should probably have the > >> same goal.  Going from 0 to 2 ULPs would be considered bad. > > Generally the

Re: [PATCH] Add sinh(tanh(x)) and cosh(tanh(x)) rules

Hi, >> So I think the runtime math libraries shoot for .5 ULP (yes, they don't >> always make it, but that's their goal).  We should probably have the >> same goal.  Going from 0 to 2 ULPs would be considered bad. Generally the goal is 1ULP in round to nearest - other rounding modes may have high

Re: Relocation (= move+destroy)

CCing gcc-patches On 19/10/18 07:33 +0200, Marc Glisse wrote: On Thu, 18 Oct 2018, Marc Glisse wrote: Uh, why didn't I notice that the function __relocate is unused? I guess I'll resend the same patch without __relocate once retesting has finished :-( Sorry for all the corrections, I guess I

Re: [PATCH] Default to an ARM cpu that exists

On 22/10/2018 19:14, co...@sdf.org wrote: > On Mon, Oct 22, 2018 at 03:56:24PM +0100, Richard Earnshaw (lists) wrote: >> I think strongarm would be a better choice. I'm not aware of anyone >> running NetBSD on Arm8 cpus. >> >> Otherwise, this is fine with a suitable ChangeLog entry. >> >> R. > >

Re: [PATCH] Switch conversion: support any ax + b transformation (PR tree-optimization/84436).

On Tue, Oct 23, 2018 at 10:37 AM Martin Liška wrote: > > On 10/22/18 4:25 PM, Jakub Jelinek wrote: > > On Mon, Oct 22, 2018 at 04:08:53PM +0200, Martin Liška wrote: > >> Very valid question. I hope as long as I calculate the linear function > >> values in wide_int (get via wi::to_wide (switch_elem

Re: [PATCH] combine: Do not combine moves from hard registers

On Mon, 22 Oct 2018 at 22:17, Segher Boessenkool wrote: > > On most targets every function starts with moves from the parameter > passing (hard) registers into pseudos. Similarly, after every call > there is a move from the return register into a pseudo. These moves > usually combine with later

Re: Debug unordered containers code cleanup

On 22/10/18 22:45 +0200, François Dumont wrote: I plan to commit the attached patch this week if not told otherwise. Looks good. This is to generalize usage of C++11 direct initialization in unordered containers. It also avoids a number of safe iterator instantiations. Would the followin

Re: Fix std::byte namespace declaration

On 23/10/18 07:07 +0200, François Dumont wrote: On 10/18/2018 10:34 PM, Jonathan Wakely wrote: On 18/10/18 22:12 +0200, François Dumont wrote: Current build of libstdc++ with --enable-symvers=gnu-versioned-namespace fails (at least under Linux) because of: In file included from /home/fdt/de

[PATCH] Fix PR87700

This fixes a very old bug in the copy-propagation lattice-update exposed by my SSA propagator changes which happen to introduce oscillation between two unshared ADDR_EXPRs. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk and branch. Richard. 2018-10-23 Richard Biener

Re: [[C++ PATCH]] Implement C++2a P0330R2 - Literal Suffixes for ptrdiff_t and size_t

* Ed Smith-Rowland: > This patch implements C++2a proposal P0330R2 Literal Suffixes for > ptrdiff_t and size_t*.  It's not official yet but looks very likely to > pass.  It is incomplete because I'm looking for some opinions. 9We > also might wait 'till it actually passes). > > This paper takes th

Re: [PATCH] Fix PR86144

On Tue, 23 Oct 2018, Jakub Jelinek wrote: > On Tue, Oct 23, 2018 at 10:57:34AM +0200, Richard Biener wrote: > > +/* Prefer vectorizable_call over vectorizable_simd_clone_call so > > + -mveclibabi= takes preference over ibrary functions with > > s/ibrary/l&/ Fixed. Richard. 2018-10-23

Re: [PATCH] Add sinh(tanh(x)) and cosh(tanh(x)) rules

On Mon, Oct 22, 2018 at 10:09 PM Jeff Law wrote: > > On 10/20/18 9:47 AM, Giuliano Augusto Faulin Belinassi wrote: > > So I did some further investigation comparing the ULP error. > > > > With the formula that Wilco Dijkstra provided, there are cases where > > the substitution is super precise. >

Re: [RFC] GCC support for live-patching

On Mon, 22 Oct 2018, Qing Zhao wrote: > Hi, > > thanks for the comments. > > > > > thanks for the proposal. The others have already expressed some of my > > worries and remarks, but I think it would be only right to write them > > again. Especially since I am part of the team responsible for

Re: [PATCH] Fix PR86144

On Tue, Oct 23, 2018 at 10:57:34AM +0200, Richard Biener wrote: > +/* Prefer vectorizable_call over vectorizable_simd_clone_call so > + -mveclibabi= takes preference over ibrary functions with s/ibrary/l&/ Jakub

Re: [PATCH, GCC/ARM, ping2] Fix PR87374: ICE with -mslow-flash-data and -mword-relocations

Ping? Best regards, Thomas On Mon, 15 Oct 2018 at 16:01, Thomas Preudhomme wrote: > > Ping? > > Best regards, > > Thomas > On Fri, 5 Oct 2018 at 17:50, Thomas Preudhomme > wrote: > > > > Hi Ramana and Kyrill, > > > > I've reworked the patch to add some documentation of the option > > conflict

Re: [PATCH] Come up with --param asan-stack-small-redzone (PR sanitizer/81715).

PING^2 On 10/9/18 10:29 AM, Martin Liška wrote: > PING^1 > > On 9/26/18 11:33 AM, Martin Liška wrote: >> On 9/25/18 5:53 PM, Jakub Jelinek wrote: >>> On Tue, Sep 25, 2018 at 05:26:44PM +0200, Martin Liška wrote: The only missing piece is how to implement asan_emit_redzone_payload more

Re: [PATCH] Fix setting of hotness in non-LTO mode (PR gcov-profile/77698).

PING^1 On 10/9/18 2:37 PM, Martin Liška wrote: > Hi. > > In non-LTO mode, we should not set hotness according to computed histogram > in ipa-profile. Following patch does that and fixes the test-case isolated > from PR. > > Patch survives regression tests on x86_64-linux-gnu. > Ready for trunk?

[PATCH] Make __PRETTY_FUNCTION__-like functions mergeable string csts (PR c++/64266).

Hi. I've returned to this long-lasting issue after quite some time. Thanks to Honza I hope I can now address the root cause which caused output of a string constant when debug info was emitted. The problematic situation happened with following back-trace: #0 mergeable_string_section (decl=, al

[PATCH] Fix PR86144

In this PR it was requested that -mveclibabi=svml takes precedence over simd annotations of which is a reasonable expectation. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2018-10-23 Richard Biener PR tree-optimization/86144 * tree-vect-stmts.c (v

Re: [PATCH] Fix a couple of avx512* intrinsic prototypes (PR target/87674)

On Tue, Oct 23, 2018 at 10:35 AM Jakub Jelinek wrote: > > Hi! > > For all these, the instructions use just 8-bits from mask register and > ICC prototypes as well as online Intel intrinsic documentation confirm that > too. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > >

[PATCH] Fix g++.dg/cpp2a/lambda-this3.C (Re: PATCH to enable testing C++17 by default)

On Wed, Oct 17, 2018 at 03:31:43PM -0400, Marek Polacek wrote: > As discussed in it > seems to be a high time we turned on testing C++17 by default. > > The only interesting part is at the very end, otherwise most of the changes is > just

[PATCH] Fix PR87693

Bootstrapped / tested on x86_64-unknown-linux-gnu, applied. Richard. 2018-10-23 Richard Biener PR tree-optimization/87693 * tree-ssa-threadedge.c (thread_around_empty_blocks): Handle the case we do not find the taken edge. * gcc.dg/torture/pr87693.c: New tes

Re: [PATCH] Switch conversion: support any ax + b transformation (PR tree-optimization/84436).

On 10/22/18 4:25 PM, Jakub Jelinek wrote: > On Mon, Oct 22, 2018 at 04:08:53PM +0200, Martin Liška wrote: >> Very valid question. I hope as long as I calculate the linear function >> values in wide_int (get via wi::to_wide (switch_element)), then it should >> overflow in the same way as original tr

[PATCH] Fix a couple of avx512* intrinsic prototypes (PR target/87674)

Hi! For all these, the instructions use just 8-bits from mask register and ICC prototypes as well as online Intel intrinsic documentation confirm that too. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Not sure if we need to backport it, this isn't a wrong-code issue, the

Re: [PATCHv2] Handle not explicitly zero terminated strings in merge sections

> I know: a patch to fix this is almost ready, just needs a final round of > testing. OK, thanks for the information. -- Eric Botcazou

Re: [PATCH] Fix some EVRP stupidness

On Tue, 23 Oct 2018, Aldy Hernandez wrote: > > > + if (tem.kind () == old_vr->kind () > > + && tem.min () == old_vr->min () > > + && tem.max () == old_vr->max ()) > > + continue; > > I think it would be cleaner to use tem.ignore_equivs_equal_p (*old_vr).

Re: [PATCH] Fix some EVRP stupidness

+ if (tem.kind () == old_vr->kind () + && tem.min () == old_vr->min () + && tem.max () == old_vr->max ()) + continue; I think it would be cleaner to use tem.ignore_equivs_equal_p (*old_vr). The goal was to use == when the equivalence

Re: [PATCHv2] Handle not explicitly zero terminated strings in merge sections

Hi Eric, >> it's not disabled (I had to disable it when testing an a /bin/as version >> with full SHF_MERGE/SHF_STRINGS suppurt recently), so I suspect the >> latter. In S11.4 .rodata and .rodata.str1.8 are merged, with the >> alignment of the larger of the two on the output section. > > OK. The

Re: [PATCHv2] Handle not explicitly zero terminated strings in merge sections

> it's not disabled (I had to disable it when testing an a /bin/as version > with full SHF_MERGE/SHF_STRINGS suppurt recently), so I suspect the > latter. In S11.4 .rodata and .rodata.str1.8 are merged, with the > alignment of the larger of the two on the output section. OK. The regressions are