Hi Maarc,
> -Original Message-
> From: Marc Glisse [mailto:marc.gli...@inria.fr]
> Sent: Tuesday, November 7, 2017 12:52 PM
> To: Kumar, Venkataramanan
> Cc: gcc-patches@gcc.gnu.org; Dharmakan, Rohit arul raj
> ; Jan Hubicka (hubi...@ucw.cz)
> ; Uros Bizjak
> Subject: Re: [RFC] [Patch X8
On Mon, Nov 06, 2017 at 11:27:27PM +0100, Uros Bizjak wrote:
> On Mon, Nov 6, 2017 at 10:18 PM, Jakub Jelinek wrote:
> > Hi!
> >
> > As this patch shows, we have tons of ix86_binary_operator_ok calls
> > in sse.md patterns, but I believe those are inappropriate in all these
> > spots, the function
On Tue, 7 Nov 2017, Kumar, Venkataramanan wrote:
The attached patch implements an RTL pass which splits generated FMA
instruction into MUL/ADD sequence.
That seems wrong if the user explicitly asked for FMA in his program,
unless you have a way to recognize which FMA instructions come from u
On Mon, Nov 06, 2017 at 06:39:20PM -0800, Palmer Dabbelt wrote:
> Jim has recently started working at SiFive, where he'll be contributing
> to our GCC port. Andrew, Kito and I would like him to be a mainatiner.
> My understand is that this is the right place to ask.
It is the steering committee t
On 2017.11.07 at 00:12 +0100, Jan Hubicka wrote:
> > On 2017.11.05 at 11:55 +0100, Jan Hubicka wrote:
> > > > On 2017.11.03 at 16:48 +0100, Jan Hubicka wrote:
> > > > > this is updated patch which I have comitted after
> > > > > profiledbootstrapping x86-64
> > > >
> > > > Unfortunately, compiling
Hi,
The attached patch implements an RTL pass which splits generated FMA
instruction into MUL/ADD sequence.
The pass is enabled for Zen and done when we find it is profitable to split the
FMA.
On Zen, we found that for a tight loop with FMA (reduction) operation as show
below, generating
I've been looking at fixing readelf and other parts of binutils that
output incorrectly pluralized messages. For example, readelf will
display information about a section that "contains 1 entries" or
"There are 1 section headers". Fixing this properly requires us to
use ngettext, and I see that g
Hi,
Attached patch implements the vld1_*_x2 intrinsics as defined by the
neon document.
Bootstrap for the latest patch is ongoing on aarch64-linux-gnu. Is
this OK for trunk if no regressions?
Thanks,
Kugan
gcc/ChangeLog:
2017-11-06 Kugan Vivekanandarajah
* config/aarch64/aarch64-simd.
We want to actually use isel, so we shouldn't disable it. It is
already not set by default on CPUs that don't have it, or where we
do not want to use it.
Tested on powerpc64-linux {-m32,-m64}; committing to trunk.
Segher
2017-11-06 Segher Boessenkool
* config/rs6000/rs6000.c (rs60
On 11/06/2017 09:50 AM, Tamar Christina wrote:
Hi All,
This patch adds support for the setting the architecture and extensions
using the target GCC pragma.
#pragma GCC target ("arch=armv8-a+crc")
It also supports a short hand where an extension is just added to the
current architecture without
On 11/06/2017 11:41 AM, Jeff Law wrote:
On 10/29/2017 10:15 AM, Martin Sebor wrote:
Ping -- please see my reply below.
On 10/20/2017 09:57 AM, Richard Biener wrote:
get_addr_base_and_unit_offset will return NULL if there's any
variable
component in 'ref'. So as written it seems to be dead c
On 10/30/2017 06:02 AM, Richard Biener wrote:
On Sun, Oct 29, 2017 at 5:15 PM, Martin Sebor wrote:
Ping -- please see my reply below.
On 10/20/2017 09:57 AM, Richard Biener wrote:
get_addr_base_and_unit_offset will return NULL if there's any
variable
component in 'ref'. So as written i
Jim has recently started working at SiFive, where he'll be contributing
to our GCC port. Andrew, Kito and I would like him to be a mainatiner.
My understand is that this is the right place to ask.
I've also changed my address to my SiFive one, where I also work -- it
seems cleaner to have everyon
From: Andrew Waterman
Without this we aren't getting proper memcpy inlining on RISC-V systems,
which is particularly disastrous for Dhrystone performance on RV32IM
systems.
gcc/ChangeLog
2017-11-06 Andrew Waterman
* config/riscv/riscv-protos.h (riscv_hard_regno_nregs): New
p
Hi,
As part of porting glibc to ARC one of the pre-req is to get it to build with
upstream toolchain components. The patch 927c0132251f ("[ARC] Configure script to
allow non uclibc based triplets") seems to be present in gcc #master, but not in
#gcc-7-branch. Can it be backported to gcc 7 plea
> On 2017.11.05 at 11:55 +0100, Jan Hubicka wrote:
> > > On 2017.11.03 at 16:48 +0100, Jan Hubicka wrote:
> > > > this is updated patch which I have comitted after profiledbootstrapping
> > > > x86-64
> > >
> > > Unfortunately, compiling tramp3d-v4.cpp is 6-7% slower after this patch.
> > > This
On Mon, Nov 06, 2017 at 05:07:23PM -0600, Peter Bergner wrote:
> >> --- gcc/config/rs6000/rs6000.c (revision 254453)
> >> +++ gcc/config/rs6000/rs6000.c (working copy)
> >> @@ -387,6 +387,7 @@ static const struct
> >>{ "ebb",PPC_FEATURE2_HAS_EBB, 1 },
> >>{
On 11/6/17 4:52 PM, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Nov 06, 2017 at 11:41:39AM -0600, Peter Bergner wrote:
>> There is a new HWCAP2 bit added to the AUXV here:
>>
>> http://patchwork.ozlabs.org/patch/824764/
>>
>> This patch adds __builtin_cpu_supports() support for it.
>
>> --- gcc
> Hasn't it enabled it also for any other FEs other than C family and Fortran?
> Say jit, brig, go, lto?, ...
Very likely, yes.
> I think better would be to remove the initialization to -1 and revert the
> fortran/options.c change, and instead use in the C family:
> if (!global_options_set.x_wa
On Mon, Nov 6, 2017 at 10:20 PM, H.J. Lu wrote:
> When there is no need to make a copy of ix86_frame, we can use reference
> of struct ix86_frame to avoid copy.
>
> Tested on x86-64. OK for trunk?
>
>
> H.J.
> --
> * config/i386/i386.c (ix86_can_use_return_insn_p): Use reference
>
Hi!
On Mon, Nov 06, 2017 at 11:41:39AM -0600, Peter Bergner wrote:
> There is a new HWCAP2 bit added to the AUXV here:
>
> http://patchwork.ozlabs.org/patch/824764/
>
> This patch adds __builtin_cpu_supports() support for it.
> --- gcc/config/rs6000/rs6000.c(revision 254453)
> +++ gcc
On Mon, Nov 6, 2017 at 10:23 PM, Jakub Jelinek wrote:
> Hi!
>
> Without the following patch we emit kmovb %k1, %eax; testb %al, %al
> when if just testing the Zero bit we can as well do ktestb %k1, %k1.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2017-11-06 Jakub
So I thought I'd checked in the wrong version of that test, but I had in
fact checked in the *right* version. So r254455 was completely bogus.
This reverts that bogus checkin and also adds -fomit-frame-pointer to
the test's options to make x86 Solaris happy.
Committing to the trunk.
Jeff
On 11/06/2017 06:39 AM, Rainer Orth wrote:
> Uros Bizjak writes:
>
>>> * config/i386/i386.c (ix86_emit_restore_reg_using_pop):
>> Prototype.
>>> (ix86_adjust_stack_and_probe_stack_clash): Use a push/pop
>> sequence
>>> to probe at the start of a noreturn functi
On Mon, Nov 6, 2017 at 10:18 PM, Jakub Jelinek wrote:
> Hi!
>
> As this patch shows, we have tons of ix86_binary_operator_ok calls
> in sse.md patterns, but I believe those are inappropriate in all these
> spots, the function is for normal 2 operand binary instructions, where
> we require that if
A patch to add my new employer to the steering committee page.
Verified as XHTML 1.0 transitional and checked in.
Jim
Index: steering.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/steering.html,v
retrieving revision 1.41
diff -p -r1.41
The sdb/coff debug info format removal should be mentioned in the
release notes. Here is a patch to do that.
Verified as XHTML 1.0 transitional. My new employer disclaimer is on
file at the FSF as of today, and I have personal assignments, so I'm
good to contribute again.
OK?
Jim
Index: htdocs
Hello,
those have been on my TODO-list for a long time (found in LLVM IIRC). We
were not doing any of those transformations, even in GENERIC, so nothing
to remove from fold-const.c. The idea is that any expression involving
only 2 variables and operators &|^~ should simplify to at most 2 insn
Hi!
My recent changes to const_ok_for_output_1 to allow UNSPEC if target hook
says it is ok for debug regressed the following testcase, where creative
simplify-rtx.c changes result in (const (neg (unspec ... UNSPEC_GOTOFF)))
being emitted and the backend not being able to assemble that (assembler
Hi!
Without the following patch we emit kmovb %k1, %eax; testb %al, %al
when if just testing the Zero bit we can as well do ktestb %k1, %k1.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2017-11-06 Jakub Jelinek
PR target/82855
* config/i386/i386.md (SW
Hi!
The issues fixed by the previous patch together with this one result
in the testcase from the PR with -mtune=intel (for some reason with
generic tuning we decide to perform the 256-bit load as 2 128-bit loads and
don't merge that into 256-bit comparison operand, shall we change that?)
to use m
When there is no need to make a copy of ix86_frame, we can use reference
of struct ix86_frame to avoid copy.
Tested on x86-64. OK for trunk?
H.J.
--
* config/i386/i386.c (ix86_can_use_return_insn_p): Use reference
of struct ix86_frame.
(ix86_initial_elimination_offset):
Hi
Any final decision regarding this patch ?
François
On 23/10/2017 21:08, François Dumont wrote:
Hi
I completed execution of all tests and found one test impacted by
this patch.
It is a good example of the impact of the patch. Users won't be
able to build a istreambuf_iter
Hi!
As this patch shows, we have tons of ix86_binary_operator_ok calls
in sse.md patterns, but I believe those are inappropriate in all these
spots, the function is for normal 2 operand binary instructions, where
we require that if one operand is memory, the destination is as well and
they match.
Hi
I just committed this as trivial to avoid test to be considered as
unsupported.
Looks like gcc made improvements in optimizations to have this test now
unsuported.
Tested under Linux x86_64.
François
diff --git a/libstdc++-v3/python/libstdcxx/v6/printers.py b/libstdc++-v3/python/libstd
On Mon, Nov 06, 2017 at 03:12:00PM +0100, Martin Liška wrote:
> On 11/06/2017 02:58 PM, Paolo Carlini wrote:
> > Hi,
> >
> > On 06/11/2017 14:37, Martin Liška wrote:
> >> Thank you for the patch.
> >> I'm going to install the remaining part that will fix x86_64 fallout. All
> >> changes are
> >>
This patch by Cherry Zhang disables escape analysis when compiling the
runtime package. Currently the runtime is hard-coded to non-escape in
various places anyhow, and the compiler's escape analysis breaks this.
Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed
to mainline.
Ian
This patch by Cherry Zhang explicitly passes AM_MAKEFLAGS to a couple
of recursive makes in the libgo Makefile, to make sure they are
available. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.
Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
initialize_matrix_A requires the CHREC_RIGHT to be an INTEGER_CST:
switch (TREE_CODE (chrec))
{
case POLYNOMIAL_CHREC:
A[index][0] = mult * int_cst_value (CHREC_RIGHT (chrec));
return initialize_matrix_A (A, CHREC_LEFT (chrec), index + 1, mult);
and isn't able to back out if
Some of the shift expanders accepted nonmemory_operands but were only
able to handle register_operands or CONST_INTs. This is probably
academic without SVE, since we're not likely to see shifts by other
types of constant (const_wide_ints, consts, etc). But for SVE,
it's possible for a vectorised
On Mon, 6 Nov 2017, Richard Sandiford wrote:
fold_binary_loc assumed that if the type of the result wasn't a vector,
the operands wouldn't be either. This isn't necessarily true for
EQ_EXPR and NE_EXPR of vector masks, which can return a single scalar
for the mask as a whole.
Spell it VECTOR_
From: Michael Clark
Use no suffix at all in the musl dynamic linker name for hard
float ABI. Use -sf and -sp suffixes in musl dynamic linker name
for soft float and single precision ABIs. The following table
outlines the musl interpreter names for the RISC-V ABI names.
musl interpreter|
Hi!
As mentioned earlier, the !has_single_use checks disable store merging
in many cases, it is enough to have a single multiple-use somewhere and
all of sudden we break the group.
The following patch replaces it by heuristics, it is GIMPLE statement count
based, but I think it should work pretty
On 25 October 2017 at 03:06, Jeff Law wrote:
> On 10/18/2017 01:33 AM, Iain Buclaw wrote:
>> On 6 October 2017 at 14:51, Ian Lance Taylor wrote:
>>> On Fri, Oct 6, 2017 at 1:34 AM, Iain Buclaw wrote:
Out of curiosity, I did have a look at some of the tops of gofrontend
sources thi
On 06.11.2017 16:36, Svante Signell wrote:
> Hi,
>
> Attached are patches to enable gccgo to build properly on Debian
> GNU/Hurd on gcc-7 (7-7.2.0-12).
Svante, please could you base your patches on upstream trunk, or the gcc-8
packages from experimental, which follow upstream trunk until gcc-8 br
On 10/29/2017 10:15 AM, Martin Sebor wrote:
> Ping -- please see my reply below.
>
> On 10/20/2017 09:57 AM, Richard Biener wrote:
>> get_addr_base_and_unit_offset will return NULL if there's any
>>> variable
>> component in 'ref'. So as written it seems to be dead code (you
>> want t
Sorry for being late with my comment. I just spotted this minor
formatting issue. Even though GCC isn't (yet) consistent about
it the keyword "constexpr" should be quoted in the error message
below (and, eventually, in all diagnostic messages). Since the
patch has been committed by now this is
On Mon, Nov 06, 2017 at 05:56:59AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Nov 03, 2017 at 06:07:38PM -0400, Michael Meissner wrote:
> > This patch fixes PR 82748, which is a compiler abort if you use the old
> > __builtin_fabsq function when you are changing the long double default fro
There is a new HWCAP2 bit added to the AUXV here:
http://patchwork.ozlabs.org/patch/824764/
This patch adds __builtin_cpu_supports() support for it.
This passed bootstrap and regtesting with no regressions?
Ok for trunk?
Ok to back port to the open releases too once testing to complete there?
On Mon, Nov 06, 2017 at 06:23:11PM +0100, Eric Botcazou wrote:
> > Thank you for review, done that.
>
> This has enabled -Wreturn-type for Ada, what we don't want since the warning
> is outsmarted by the language, so I have applied this.
>
>
> 2017-11-06 Eric Botcazou
>
> * gcc-interf
On Mon, Nov 6, 2017 at 11:01 AM, Jim Wilson wrote:
> On 10/31/2017 12:11 PM, David Edelsohn wrote:
>>
>> With your recent removal of SDB and -gcoff support, I would appreciate
>> your advice about my patch to incrementally add some preliminary LTO
>> support for AIX to collect2.c:
>>
>> https://gc
> Thank you for review, done that.
This has enabled -Wreturn-type for Ada, what we don't want since the warning
is outsmarted by the language, so I have applied this.
2017-11-06 Eric Botcazou
* gcc-interface/misc.c (gnat_post_options): Clear warn_return_type.
--
Eric BotcazouIndex
So I spent a fair amount of time over the weekend trying to figure out
how to stage in the vrp cleanups. I don't want to drop a massive
unreviewable kit on everyone. It's hard on the reviewers and its hard
on me too -- with stuff moving around it's hard to easily see that the
implementation isn
Hi All,
This patch adds the NEON intrinsics for Dot product.
Dot product is available from ARMv8.2-a and onwards.
Regtested on arm-none-eabi, armeb-none-eabi,
aarch64-none-elf and aarch64_be-none-elf with no issues found.
Ok for trunk?
gcc/
2017-11-06 Tamar Christina
* config/aarch
Hi All,
This patch adds the needed machinery to generate the appropriate
.arch and .arch_extension directives per function.
Borrowing from AArch64 this is only done when it's required (i.e. when
the directives to be set differ from the currently set one).
As part if this the .fpu directive has a
Hi All,
This patch adds support for the setting the architecture and extensions
using the target GCC pragma.
#pragma GCC target ("arch=armv8-a+crc")
It also supports a short hand where an extension is just added to the
current architecture without changing it
#pragma GCC target ("+crc")
Poppin
Hi All,
This patch does a small refactoring to arm_option_override to extract the
part that sets the global state variables so they can be changed without
changing other global field that we do not want to change after the initial
configuration has finished.
Regtested on arm-none-eabi and no regr
Hi!
I'd like to ping the:
http://gcc.gnu.org/ml/gcc-patches/2017-10/msg01895.html
PR debug/82718
Fix DWARF5 .debug_loclist handling with hot/cold partitioning
patch. Thanks
Jakub
This patch addesses 82836, an ICE where c++'s mangling alias hash table
has a DECL_ASSEMBLER_NAME change underneath its feet (to NULL). Because
of historical changes in the mangling algorithm, the mangler creates a
table, hashed by DECL_ASSEMBLER_NAME recording manglings that could have
change
On 10/31/2017 12:11 PM, David Edelsohn wrote:
With your recent removal of SDB and -gcoff support, I would appreciate
your advice about my patch to incrementally add some preliminary LTO
support for AIX to collect2.c:
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg00893.html
There don't seem to b
OK, thanks.
On Fri, Nov 3, 2017 at 3:55 PM, Paolo Carlini wrote:
> Hi,
>
> On 03/11/2017 18:56, Jason Merrill wrote:
>>
>> Looking at the code again, it seems that the problem is the difference
>> between start_decl_1 and grokfield, in that the former has
>>
>>/* If an explicit initializer is
* add-gnu-to-libgo-headers.diff: Add gnu to libgo headers for build.
* add-gnu-to-libgo-test-headers.diff: Add gnu to libgo headers for tests.
* src_libgo_go_go_build_syslist.go.diff: Add gnu to the goosList.
* src_libgo_go_syscall_syscall_gnu_test.go.diff: gnu-specific file for tests
involving str
* src_libgo_build.diff: configure.ac, Makefile.* and shell script patches.
* src_libgo_go_crypto.diff: Certificate go files.
* src_libgo_go_net.diff: OS-specific net go files.
* src_libgo_go_os.diff: OS-specific os go files.
* src_libgo_go_runtime.diff: OS-specific runtime go files.
* src_libgo_go_
On Mon, Nov 6, 2017 at 10:37 AM, Marek Polacek wrote:
> On Fri, Nov 03, 2017 at 12:19:05PM -0400, Jason Merrill wrote:
>> On Fri, Nov 3, 2017 at 9:55 AM, Marek Polacek wrote:
>> > + TYPE_EMPTY_P (t) = targetm.calls.empty_record_p (t);
>>
>> I think we want to set this in finalize_type_size; sinc
On Fri, Nov 03, 2017 at 12:19:05PM -0400, Jason Merrill wrote:
> On Fri, Nov 3, 2017 at 9:55 AM, Marek Polacek wrote:
> > + TYPE_EMPTY_P (t) = targetm.calls.empty_record_p (t);
>
> I think we want to set this in finalize_type_size; since the point of
> all this is becoming compliant with the psA
Hi,
Attached are patches to enable gccgo to build properly on Debian
GNU/Hurd on gcc-7 (7-7.2.0-12).
The first two patches are Debian-specific:
Enable build of gccgo for GNU/Hurd:
* debian_rules.defs.diff
Define patches for the generated series file:
* debian_rules.patch.diff
The third enables s
fold_binary_loc assumed that if the type of the result wasn't a vector,
the operands wouldn't be either. This isn't necessarily true for
EQ_EXPR and NE_EXPR of vector masks, which can return a single scalar
for the mask as a whole.
Tested on aarch64-linux-gnu, x86_64-linux-gnu and powerpc64-linux
Richard Biener writes:
> On Thu, Oct 26, 2017 at 2:23 PM, Richard Biener
> wrote:
>> On Mon, Oct 23, 2017 at 1:20 PM, Richard Sandiford
>> wrote:
>>> Similarly to the VEC_DUPLICATE_{CST,EXPR}, this patch adds two
>>> tree code equivalents of the VEC_SERIES rtx code. VEC_SERIES_EXPR
>>> is for n
Richard Biener writes:
> On Mon, Oct 23, 2017 at 1:20 PM, Richard Sandiford
> wrote:
>> SVE needs a way of broadcasting a scalar to a variable-length vector.
>> This patch adds VEC_DUPLICATE_CST for when VECTOR_CST would be used for
>> fixed-length vectors and VEC_DUPLICATE_EXPR for when CONSTRUC
> On Mon, Nov 06, 2017 at 02:47:52PM +0100, Jan Hubicka wrote:
> > Hi,
> > this patch fixes sanity checking ICE with FDO bootstrap.
> > The problem is when ENTRY_BLOCK_PTR count is zero and function is being
> > inlined we disabled scaling. This is no longer correct because scaling
> > also involve
Jeff Law writes:
> On 09/18/2017 05:26 AM, Richard Sandiford wrote:
>> Originally subregs operated at the word level and subreg offsets
>> were measured in words. The offset units were later changed from
>> words to bytes (SUBREG_WORD became SUBREG_BYTE), but the fundamental
>> assumption that su
Wilco Dijkstra writes:
> Richard Sandiford wrote:
>>
>> Yeah, I'd hit this too. I think it's a latent bug that just
>> happened to be exposed by Wilco's patch: although the *movti_aarch64
>> predicate disallows const_wide_int, the constraints allow it via "n",
>> which means that the RA can remat
On Mon, Nov 06, 2017 at 09:10:23AM +, Richard Sandiford wrote:
> The recent gen_vec_duplicate patches used CONST_VECTOR for all
> constants, but the documentation says:
>
> @findex const_vector
> @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
> Represents a vector constant. Th
On 11/06/2017 02:58 PM, Paolo Carlini wrote:
> Hi,
>
> On 06/11/2017 14:37, Martin Liška wrote:
>> Thank you for the patch.
>> I'm going to install the remaining part that will fix x86_64 fallout. All
>> changes are
>> quite obvious, so hope it's fine to install it.
> I think so. Thanks.
>
> Not
Hi,
On 06/11/2017 14:37, Martin Liška wrote:
Thank you for the patch.
I'm going to install the remaining part that will fix x86_64 fallout. All
changes are
quite obvious, so hope it's fine to install it.
I think so. Thanks.
Note that the 3 additional libstdc++-v3 changes aren't really necessa
On Mon, Nov 06, 2017 at 02:47:52PM +0100, Jan Hubicka wrote:
> Hi,
> this patch fixes sanity checking ICE with FDO bootstrap.
> The problem is when ENTRY_BLOCK_PTR count is zero and function is being
> inlined we disabled scaling. This is no longer correct because scaling
> also involves conversion
Richard Sandiford wrote:
>
> Yeah, I'd hit this too. I think it's a latent bug that just
> happened to be exposed by Wilco's patch: although the *movti_aarch64
> predicate disallows const_wide_int, the constraints allow it via "n",
> which means that the RA can rematerialise a const_wide_int that
On Nov 6, 2017, at 4:17 AM, Segher Boessenkool
wrote:
>
> Hi Bill,
>
> No quotes around the {} block please (twice).
Whoops. I know better; copied from a bad example and missed it.
>
> Other than that, looks fine to me, please commit. Thanks,
>
Thanks for the review! r254453.
Bill
>
> S
Hi,
this patch fixes sanity checking ICE with FDO bootstrap.
The problem is when ENTRY_BLOCK_PTR count is zero and function is being
inlined we disabled scaling. This is no longer correct because scaling
also involves conversion between local and global profiles.
Bootstrapped/regtested x86_64-linu
Uros Bizjak writes:
>> * config/i386/i386.c (ix86_emit_restore_reg_using_pop):
> Prototype.
>> (ix86_adjust_stack_and_probe_stack_clash): Use a push/pop
> sequence
>> to probe at the start of a noreturn function.
>>
>> * gcc.target/i386/stack-check-
On 11/06/2017 01:19 PM, Paolo Carlini wrote:
> Hi again,
>
> On 06/11/2017 12:40, Paolo Carlini wrote:
>> Hi,
>>
>> On 06/11/2017 11:41, Martin Liška wrote:
>>> Sorry for that. It's related to x86 target specific test-cases. I'll
>>> prepare patch as soon as possible.
>> Ok, thanks.
>>
>> Note,
Maxim Kuvyrkov wrote:
> > On Nov 2, 2017, at 9:41 PM, Wilco Dijkstra wrote:
> >
> > The Arm backend sets the default sched-pressure algorithm to
> > SCHED_PRESSURE_MODEL. Benchmarking on AArch64 shows this
> > speeds up floating point performance on SPEC - eg. CactusBSSN improves
> > by ~16%.
Hi!
The following patch contains 2 changes:
1) BIT_NOT_EXPR on a load from memory is handled, including when one
or both BIT_{AND,IOR,XOR}_EXPR operands is BIT_NOT_EXPR of a memory load
2) it changes the aliasing handling, because the old
ao_ref_init_from_ptr_and_size caused way too many unn
Hi again,
On 06/11/2017 12:40, Paolo Carlini wrote:
Hi,
On 06/11/2017 11:41, Martin Liška wrote:
Sorry for that. It's related to x86 target specific test-cases. I'll
prepare patch as soon as possible.
Ok, thanks.
Note, I'm seeing a few - expected, give the enabled warning - fails in
the li
Hi!
On Fri, Nov 03, 2017 at 06:07:38PM -0400, Michael Meissner wrote:
> This patch fixes PR 82748, which is a compiler abort if you use the old
> __builtin_fabsq function when you are changing the long double default from
> IBM
> double-double format to IEEE.
>
> The problem is __builtin_fabsq r
On Fri, Nov 3, 2017 at 6:00 PM, David Malcolm wrote:
> PR jit/82826 reports a crash when running jit.dg/test-benchmark.c,
> introduced by r254140
> (aka "Extend ipa-pure-const pass to propagate malloc attribute.")
>
> I see the crash on the 28th of 400 in-process iterations of the
> compiler; on t
On Fri, Nov 3, 2017 at 4:40 PM, Richard Sandiford
wrote:
> In this PR we tried to create a widening multiply of two 3-bit numbers,
> but that isn't a widening multiply at the optab/rtl level, since both
> the input and output still have the same mode.
>
> We could trap this either in is_widening_m
On Sun, Nov 5, 2017 at 7:15 PM, Marc Glisse wrote:
> Hello,
>
> looking at the history, it seems that this comment should be updated as in
> the following patch (the definition of struct value_range is right below and
> explains VR_RANGE and VR_ANTI_RANGE). I am not committing this as obvious
> be
> Yes, I've got patch candidate that's going to change gcov format.
Thanks. As discussed privately, here's a test harness for automatic coverage
testing in Ada, to be invoked like this:
make -C gcc -k check-gnat RUNTESTFLAGS="gcov.exp"
from the toplevel build directory.
The single test fails
Hi,
On 06/11/2017 11:41, Martin Liška wrote:
Sorry for that. It's related to x86 target specific test-cases. I'll
prepare patch as soon as possible.
Ok, thanks.
Note, I'm seeing a few - expected, give the enabled warning - fails in
the libstdc++-v3 testsuite too. Eg:
FAIL: 20_util/optional
Andreas Schwab writes:
> FAIL: gfortran.dg/class_array_1.f03 -O3 -fomit-frame-pointer -funroll-loops
> -fpeel-loops -ftracer -finline-functions (test for excess errors)
> Excess errors:
> /opt/gcc/gcc-20171104/gcc/testsuite/gfortran.dg/class_array_1.f03:31:0:
> Error: could not split insn
> (
Hi Wilco,
On 03/11/17 14:38, Wilco Dijkstra wrote:
A recent change to remove the movdi_vfp_cortexa8 meant that ldrd was
used in
ITs block even when arm_restrict_it was enabled. Rather than just
fixing this
latent issue, change the default of predicable_short_it to "no" so
that only
16-bit ins
On Fri, Nov 3, 2017 at 4:28 PM, Richard Sandiford
wrote:
> This patch improves the ivopts address cost calculcation for modes
> in which an index must be scaled rather than unscaled. Previously
> we would only try the scaled form if the unscaled form was valid.
>
> Many of the SVE tests rely on t
On 11/06/2017 11:08 AM, Paolo Carlini wrote:
> Hi,
>
> On 06/11/2017 11:03, Martin Liška wrote:
>> On 11/06/2017 10:57 AM, Paolo Carlini wrote:
>>> are you still in the process of committing the testsuite changes? I had a
>>> quick look (eg, pr45788.C) and some of the fails seem certainly expecte
On Mon, Sep 18, 2017 at 11:58 AM, Uros Bizjak wrote:
>> gcc/
>>
>> * common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET): New.
>> (OPTION_MASK_ISA_SHSTK_SET): Likewise.
>> (OPTION_MASK_ISA_IBT_UNSET): Likewise.
>> (OPTION_MASK_ISA_SHSTK_UNSET): Likewise.
>> (ix86_handle_option): Add -mibt,
>
> On Nov 2, 2017, at 9:41 PM, Wilco Dijkstra wrote:
>
> The Arm backend sets the default sched-pressure algorithm to
> SCHED_PRESSURE_MODEL. Benchmarking on AArch64 shows this
> speeds up floating point performance on SPEC - eg. CactusBSSN improves
> by ~16%. The gains are mostly due to les
Hi,
On 04/11/2017 23:37, Mukesh Kapoor wrote:
I had included to get the definition of macro PRId64. I
have now modified the test case to remove all includes. I have added
the definition of the macro in the test case and also added
declarations of functions sprintf() strcmp(). I have attached
Hi Bill,
On Sun, Nov 05, 2017 at 06:25:11PM -0600, Bill Schmidt wrote:
> This patch adds support for vectorization of unsigned SAD expressions. SAD
> vectorization uses the usad pattern to represent a widening accumulation
> of SADs performed on a narrower type. The two cases in this patch opera
Hi,
On 06/11/2017 11:03, Martin Liška wrote:
On 11/06/2017 10:57 AM, Paolo Carlini wrote:
are you still in the process of committing the testsuite changes? I had a quick
look (eg, pr45788.C) and some of the fails seem certainly expected.
Thanks,
Paolo.
Hi.
Revisions 254440 and r254438 conta
On 11/06/2017 10:57 AM, Paolo Carlini wrote:
> are you still in the process of committing the testsuite changes? I had a
> quick look (eg, pr45788.C) and some of the fails seem certainly expected.
>
> Thanks,
> Paolo.
Hi.
Revisions 254440 and r254438 contain fixes for test-suite. Can you please
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