Re: Also test -O0 for OpenACC C, C++ offloading test cases

Hi! On Tue, 22 Mar 2016 23:52:11 +0100, Bernd Schmidt wrote: > On 03/22/2016 11:23 AM, Thomas Schwinge wrote: > > --- libgomp/testsuite/libgomp.oacc-c-c++-common/routine-w-1.c > > +++ libgomp/testsuite/libgomp.oacc-c-c++-common/routine-w-1.c > > @@ -1,5 +1,6 @@ > > -/* { dg-do run } */ > > -/* {

Re: [DOC Patch] Add sample for @cc constraint

Ping? (link to original post: https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00743.html ) This patch adds a sample for a new-to-v6 feature. Is this not the right time for doc improvements? I considered adding some assembler output. Something like: Before this featu

Re: [PATCH 7/7] ira.c validate_equiv_mem

On 03/21/2016 02:43 AM, Alan Modra wrote: +enum valid_equiv { valid_none, valid_combine, valid_reload }; + Might be worth documenting that each step represents a superset of the previous one. + ret = valid_combine; + if (! MEM_READONLY_P (memref) + && ! RTL_CONS

Re: [PATCH] Fix PR c++/70332 (ICE due to aggregate initialization of NSDMI)

On Tue, Mar 22, 2016 at 6:12 PM, Patrick Palka wrote: > On Tue, Mar 22, 2016 at 6:00 PM, Jason Merrill wrote: >> On 03/22/2016 05:35 PM, Patrick Palka wrote: >>> >>> + if (cp_unevaluated_operand == 0 >> >> >> Why check this here? > > Just so that the change doesn't affect the behavior

Re: Also test -O0 for OpenACC C, C++ offloading test cases

On 03/22/2016 11:23 AM, Thomas Schwinge wrote: diff --git libgomp/testsuite/libgomp.oacc-c-c++-common/routine-w-1.c libgomp/testsuite/libgomp.oacc-c-c++-common/routine-w-1.c index 01d1dc8..5806cb3 100644 --- libgomp/testsuite/libgomp.oacc-c-c++-common/routine-w-1.c +++ libgomp/testsuite/libgomp.

Re: [PING**2] [PATCH, libstdc++] Add missing free-standing headers to install rule

On 22/03/16 20:38 +, Bernd Edlinger wrote: On 22.03.2016 20:10, Jonathan Wakely wrote: On 22/03/16 18:29 +, Bernd Edlinger wrote: Yes. Maybe changing concept_check.h would be better, because I see 3 different instances of bits/c++config.h: $prefix/arm-eabi/include/c++/6.0.0/arm-eabi/fp

Re: [PATCH 6/7] ira.c use DF infrastructure for combine_and_move_insns

On Tue, Mar 22, 2016 at 05:29:08PM +0100, Bernd Schmidt wrote: > On 03/21/2016 02:42 AM, Alan Modra wrote: > > * ira.c (combine_and_move_insns): Rather than scanning insns, > > use DF infrastucture to find use and def insns. > > > >- remove_death (regno, insn); > > This ca

Re: [PATCH] Fix PR c++/70332 (ICE due to aggregate initialization of NSDMI)

On Tue, Mar 22, 2016 at 6:00 PM, Jason Merrill wrote: > On 03/22/2016 05:35 PM, Patrick Palka wrote: >> >> + if (cp_unevaluated_operand == 0 > > > Why check this here? Just so that the change doesn't affect the behavior of tsubst_decl() when cp_unevaluated_operand != 0. Presumably th

Re: [PATCH] Fix PR c++/70332 (ICE due to aggregate initialization of NSDMI)

On 03/22/2016 05:35 PM, Patrick Palka wrote: + if (cp_unevaluated_operand == 0 Why check this here? Jason

[PATCH] Fix *vector_shift_pattern (PR tree-optimization/70354)

Hi! As the testcase shows, the C/C++ FEs narrow the shift counters from whatever type they had originally to unsigned int (previously signed int). Then the vect-patterns code, to be able to use vector by vector shifts attempts to narrow or widen them again to the right type. If there is already a

[PATCH][PR target/70232] Correctly distinguish between FSM jump threads and old style jump threads

Just a dumb oversight here. An FSM jump thread requires threading through the loop latch and eliminating a multi-way branch at the end of the jump threading path. We incorrectly tested for just the former and as a result applied the wrong clamp for the number of statements to copy. As a r

[PATCH] Slightly improve TARGET_STV splitters (PR target/70321)

Hi! As the PR mentions, DImode AND/IOR/XOR patterns often result in too ugly code, regression from when the patterns weren't there (before STV has been added). This patch attempts to improve it a little bit by improving the splitter for these, rather than always generating two SImode AND/IOR/XOR

[PATCH] Fix PR c++/70332 (ICE due to aggregate initialization of NSDMI)

With c++14 an NSDMI no longer makes a class type non-aggregate so it's possible to perform aggregate initialization on a class that has an NSDMI, but tsubst_copy() currently ICEs on a use of 'this' in such a situation. This patch makes tsubst_copy() handle a use of 'this' in an NSDMI as part of an

[C++ PATCH] Diagnose constexpr overflow (PR c++/70323)

Hi! On the following testcase, the first function is cp_folded into return i == 0 ? 2147483648(OVF): 2147483647; The problem is that we don't diagnose then the overflow at all. We already have code that sets *overflow_p under right conditions, just there wasn't any permerror call. Fixed thusly, b

Re: [PR69315] enable finish_function to recurse for constexpr functions

On 01/26/2016 12:11 PM, Alexandre Oliva wrote: We don't want finish_function to be called recursively from mark_used. However, it's desirable and necessary to call itself recursively when performing delayed folding, because that may have to instantiate and evaluate constexpr template functions.

Re: [PATCH] PR libgcc/70363, fix __float128 problem with non ISA-3.0 assembler

On Tue, Mar 22, 2016 at 4:33 PM, Michael Meissner wrote: > This patch fixes PR libgcc/70363, which is a configuration issue if you build > GCC 6.x with an assembler that does not support the ISA 3.0 instructions. I > missed one emulation function that needed to be a different name if the IFUNC >

Re: [PING**2] [PATCH, libstdc++] Add missing free-standing headers to install rule

On 22.03.2016 20:10, Jonathan Wakely wrote: > On 22/03/16 18:29 +, Bernd Edlinger wrote: >> Yes. Maybe changing concept_check.h would be better, because >> I see 3 different instances of bits/c++config.h: >> >> $prefix/arm-eabi/include/c++/6.0.0/arm-eabi/fpu/bits/c++config.h >> $prefix/arm-eabi

[PATCH] PR libgcc/70363, fix __float128 problem with non ISA-3.0 assembler

This patch fixes PR libgcc/70363, which is a configuration issue if you build GCC 6.x with an assembler that does not support the ISA 3.0 instructions. I missed one emulation function that needed to be a different name if the IFUNC functions added for ISA 3.0 support are not being built. I built

Re: [PATCH] c++/67376 Comparison with pointer to past-the-end, of array fails inside constant expression

On 03/22/2016 12:52 PM, Jason Merrill wrote: On 03/21/2016 06:09 PM, Jeff Law wrote: On 03/21/2016 11:54 AM, Jason Merrill wrote: Both b0 and b1 are invalid and should be diagnosed, but only b1 is. b1 isn't because because by the time we see its initializer in constexpr.c it's been transformed

Re: [PING**2] [PATCH, libstdc++] Add missing free-standing headers to install rule

On 22/03/16 18:29 +, Bernd Edlinger wrote: Yes. Maybe changing concept_check.h would be better, because I see 3 different instances of bits/c++config.h: $prefix/arm-eabi/include/c++/6.0.0/arm-eabi/fpu/bits/c++config.h $prefix/arm-eabi/include/c++/6.0.0/arm-eabi/bits/c++config.h $prefix/arm-e

Re: [PATCH, PR target/70302] STV: support unitialized register used in converted instructions

On 03/22/2016 12:20 PM, Uros Bizjak wrote: Hello! 2016-03-22 Ilya Enkovich PR target/70302 * config/i386/i386.c (scalar_chain::convert_op): Support uninitialized register usage case. gcc/testsuite/ 2016-03-22 Ilya Enkovich PR target/70302 * gcc.target/i386/pr70302.c: New test. OK.

Re: [PATCH] c++/67376 Comparison with pointer to past-the-end, of array fails inside constant expression

On 03/21/2016 06:09 PM, Jeff Law wrote: On 03/21/2016 11:54 AM, Jason Merrill wrote: Both b0 and b1 are invalid and should be diagnosed, but only b1 is. b1 isn't because because by the time we see its initializer in constexpr.c it's been transformed into the equivalent of "b1 = (int*)ps" (thoug

Re: [PING**2] [PATCH, libstdc++] Add missing free-standing headers to install rule

On 22.03.2016 15:36, Jonathan Wakely wrote: > On 22/03/16 07:10 +, Bernd Edlinger wrote: >> Hi, >> >> I am pinging for this patch, which addresses an admittedly minor >> regression >> for free-standing libstdc++ due to changed c++11 default settings. >> The proposed >> patch does only change th

Re: [PATCH, PR target/70302] STV: support unitialized register used in converted instructions

Hello! > 2016-03-22 Ilya Enkovich > > PR target/70302 > * config/i386/i386.c (scalar_chain::convert_op): Support > uninitialized register usage case. > > gcc/testsuite/ > > 2016-03-22 Ilya Enkovich > > PR target/70302 > * gcc.target/i386/pr70302.c: New test. OK. Thanks, Uros.

[PATCH] Fix 69845

In PR68142 you added a check for overflow + __INT_MIN__. I can't figure out why the check for __INT_MIN__, except that it seems specific to the test case you examined. And indeed, this test case shows how things go wrong with other distributed folding leading to overflow. I added two tests, one s

Re: [PATCH] Adjust PR70251 fix

On Tue, 22 Mar 2016, Richard Biener wrote: On March 22, 2016 4:55:13 PM GMT+01:00, Marc Glisse wrote: On Tue, 22 Mar 2016, Richard Biener wrote: This adjusts the PR70251 fix as discussed in the PR audit trail and fixes a bug in genmatch required (bah, stupid GENERIC comparisons in GIMPLE

Re: [PATCH] Adjust PR70251 fix

On March 22, 2016 4:55:13 PM GMT+01:00, Marc Glisse wrote: >On Tue, 22 Mar 2016, Richard Biener wrote: > >> >> This adjusts the PR70251 fix as discussed in the PR audit trail >> and fixes a bug in genmatch required (bah, stupid GENERIC comparisons >in >> GIMPLE operands...). > >Thanks ! > >Hmm, t

Re: [PATCH 6/7] ira.c use DF infrastructure for combine_and_move_insns

On 03/21/2016 02:42 AM, Alan Modra wrote: * ira.c (combine_and_move_insns): Rather than scanning insns, use DF infrastucture to find use and def insns. - remove_death (regno, insn); This call appears to have gone missing. Is that intentional? Other than tha

Re: [HSA, PATCH] Allocate memory for shadow arg (PR hsa/70337)

On Mon, Mar 21, 2016 at 09:51:27PM +0100, Martin Liska wrote: > On 03/21/2016 07:23 PM, Martin Jambor wrote: > >This is strange. The pointer to the shadow data structure is, from > >the HSA perspective, a normal kernel argument and therefore should > >already be included in the kernel->kernarg_seg

Re: [PATCH] Adjust PR70251 fix

On Tue, 22 Mar 2016, Richard Biener wrote: This adjusts the PR70251 fix as discussed in the PR audit trail and fixes a bug in genmatch required (bah, stupid GENERIC comparisons in GIMPLE operands...). Thanks ! Hmm, the transformation is still disabled on AVX512: ! /* A + (B vcmp C ? 1 : 0)

[committed] [wwwdocs] PR c/69993: update wording of -Wmisleading-indentation on website

On Tue, 2016-03-22 at 10:28 -0400, David Malcolm wrote: > On Tue, 2016-03-01 at 20:18 +0100, Richard Biener wrote: > > On March 1, 2016 7:51:01 PM GMT+01:00, David Malcolm < > > dmalc...@redhat.com> wrote: > > > The wording of our output from -Wmisleading-indentation is rather > > > confusing, as n

Re: [PING**2] [PATCH, libstdc++] Add missing free-standing headers to install rule

On 22/03/16 07:10 +, Bernd Edlinger wrote: Hi, I am pinging for this patch, which addresses an admittedly minor regression for free-standing libstdc++ due to changed c++11 default settings. The proposed patch does only change the free-standing install rule, and has therefore no impact on o

[PATCH] Adjust PR70251 fix

This adjusts the PR70251 fix as discussed in the PR audit trail and fixes a bug in genmatch required (bah, stupid GENERIC comparisons in GIMPLE operands...). Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-03-22 Richard Biener PR middle-end/70251

[PATCH, moxie] Fix endianness issue for moxiebox configuration

Hello, The attached patch fixes an endianness issue for the moxiebox configuration of the moxie target. I've just committed it. Thanks, AG 2016-03-22 Anthony Green * config/moxie/moxiebox.h (CC1_SPEC): Define. Fix endianness issue for moxiebox targets. (CC1PLUS_SPEC): Ditto.

Re: [PATCH] PR c/69993: improvements to wording of -Wmisleading-indentation

On Tue, 2016-03-01 at 20:18 +0100, Richard Biener wrote: > On March 1, 2016 7:51:01 PM GMT+01:00, David Malcolm < > dmalc...@redhat.com> wrote: > > The wording of our output from -Wmisleading-indentation is rather > > confusing, as noted by Reddit user "sysop073" here: > > https://www.reddit.com/r/

[PATCH] Add security_sensitive attribute to clean function stack and regs.

Hi, the attached patch adds a new attribute 'security_sensitive' for functions. The idea was discussed in PR middle-end/69976. This attribute makes gcc to emit clean up code at the function's epilogue. This clean-up code cleans the stack used by this function and that isn't needed anymore. It al

[PATCH] Fix PR70333

The following fixes another wide-int merge fallout by reverting back to what the code did before it (doing a wide multiplication). Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-03-22 Richard Biener PR middle-end/70333 * fold-const.c (extract_mul

Re: Fix 70278 (LRA split_regs followup patch)

On 22 March 2016 at 13:14, Bernd Schmidt wrote: > On 03/22/2016 10:24 AM, Christophe Lyon wrote: >> >> >> The ARM test isn't sufficiently protected against non-compliant >> configurations, >> and fails if GCC is configured for arm*linux-gnueabihf for instance >> (see >> http://people.linaro.org/~c

[PATCH, PR target/70302] STV: support unitialized register used in converted instructions

Hi, This patch allows uninitialized registers usage in instructions converted by STV pass. Bootstrapped and tested on x86_64-pc-linux-gnu{-m32}. OK for trunk? Thanks, Ilya -- gcc/ 2016-03-22 Ilya Enkovich PR target/70302 * config/i386/i386.c (scalar_chain::convert_op): Suppo

Re: Fix 70278 (LRA split_regs followup patch)

On 03/22/2016 10:24 AM, Christophe Lyon wrote: The ARM test isn't sufficiently protected against non-compliant configurations, and fails if GCC is configured for arm*linux-gnueabihf for instance (see http://people.linaro.org/~christophe.lyon/cross-validation/gcc/trunk/234342/report-build-info.h

Also test -O0 for OpenACC C, C++ offloading test cases

Hi! As discussed in (and similar to what we're already doing for Fortran, and similar to what recently got committed to libgomp/testsuite/libgomp.hsa.c/c.exp), it has been helpful to also run C, C++ offloading te

Re: [PATCH, C++, PR70290] Fix type checks for vector conditional expr

On Mon, Mar 21, 2016 at 11:16 AM, Ilya Enkovich wrote: > Hi, > > This patch makes an integer vector type to always be used for > type checks when building a vector conditional expression. > With no this patch we may get a type of vector comparison > which may have non-vector mode and different siz

Re: [PATCH PR69042/01]Add IV candidate for use with constant offset stripped in base.

On Tue, Mar 22, 2016 at 11:22 AM, Bin.Cheng wrote: > On Wed, Mar 16, 2016 at 10:06 AM, Richard Biener > wrote: >> >> On Wed, Mar 16, 2016 at 10:48 AM, Bin Cheng wrote: >> > Hi, >> > When I tried to decrease # of IV candidates, I removed code that adds IV >> > candidates for use with constant of

Re: [PATCH PR69489/02]Handle PHI which can be degenerated to two arguments node in tree ifcvt.

On Mon, Mar 21, 2016 at 4:22 PM, Bin Cheng wrote: > Hi, > The second issue revealed by PR69489 is tree ifcvt could not convert PHI > nodes with more than 2 arguments. Among these nodes, there is a special kind > of PHI which can be handled. Precisely, if the PHI node satisfies below two > con

Re: [PATCH] Skip static ctors/dtors in IPA ICF (PR ipa/70306)

On Tue, Mar 22, 2016 at 11:24:34AM +0100, Martin Liška wrote: > On 03/21/2016 07:20 PM, Jan Hubicka wrote: > > OK, (it woudl make more sense to turn them into wrappers that can be easily > > done, too, but we can do that next stage1) > > thanks! > > > > Honza > > Sure, will do that in next stage1

Re: [PATCH] Skip static ctors/dtors in IPA ICF (PR ipa/70306)

On 03/21/2016 07:20 PM, Jan Hubicka wrote: > OK, (it woudl make more sense to turn them into wrappers that can be easily > done, too, but we can do that next stage1) > thanks! > > Honza Sure, will do that in next stage1. I've just bootstrapped and regtested the same patch on GCC-5 branch w/o obse

Re: [PATCH PR69042/01]Add IV candidate for use with constant offset stripped in base.

On Wed, Mar 16, 2016 at 10:06 AM, Richard Biener wrote: > > On Wed, Mar 16, 2016 at 10:48 AM, Bin Cheng wrote: > > Hi, > > When I tried to decrease # of IV candidates, I removed code that adds IV > > candidates for use with constant offset stripped in use->base. This is > > kind of too aggress

Re: [RFA][PATCH] Adding missing calls to bitmap_clear

On Mon, Mar 21, 2016 at 9:32 PM, Jeff Law wrote: > On 03/21/2016 01:10 PM, Bernd Schmidt wrote: >> >> On 03/21/2016 08:06 PM, Jeff Law wrote: >>> >>> >>> As noted last week, find_removable_extensions initializes several >>> bitmaps, but doesn't clear them. >>> >>> This is not strictly a leak as th

Re: Fix 70278 (LRA split_regs followup patch)

On 18 March 2016 at 17:51, Jeff Law wrote: > On 03/18/2016 06:25 AM, Bernd Schmidt wrote: >> >> This fixes an oversight in my previous patch here. I used biggest_mode >> in the assumption that if the reg was used in the function, it would be >> set to something other than VOIDmode, but that fails

Re: [PATCH, i386, AVX-512] Fix PR target/70325.

Hi Uroš. On 22 Mar 09:19, Uros Bizjak wrote: > OK with a suitable comment describing the reason for special handling. Thanks! > BTW: Looking through the builtins, I noticed that some builtin > descriptions contains duplicated flags (please see attached > pseudo-patch). Looks like typos to me, but

Re: [PATCH, i386, AVX-512] Fix PR target/70325.

On Mon, Mar 21, 2016 at 3:00 PM, Kirill Yukhin wrote: > Hello, > 1s in mask in i386.c/builtin_description enables > built-ins for corresponding bits. > So, actually if there're 2 1s in it - any bit set > enables built-in. > > AVX-512VL exploits mask in opposite way. > E.g.: > { OPTION_MASK_ISA_A

Re: [PATCH] Fix V64QImode multiplication with AVX512BW (PR target/70329)

Hi Jakub! On 21 Mar 21:16, Jakub Jelinek wrote: > The ix86_expand_vecop_qihi function has been adjusted for AVX512* just > by changing i < 32 to i < 64 (where both were sometimes wasteful), but > for !full_interleave that is even wrong, swapping the second and third > quarter is something that wor

[PING**2] [PATCH, libstdc++] Add missing free-standing headers to install rule

Hi, I am pinging for this patch, which addresses an admittedly minor regression for free-standing libstdc++ due to changed c++11 default settings. The proposed patch does only change the free-standing install rule, and has therefore no impact on other configurations. https://gcc.gnu.org/ml/lib