On Mon, Mar 21, 2016 at 3:00 PM, Kirill Yukhin <kirill.yuk...@gmail.com> wrote:
> Hello,
> 1s in mask in i386.c/builtin_description enables
> built-ins for corresponding bits.
> So, actually if there're 2 1s in it - any bit set
> enables built-in.
>
> AVX-512VL exploits mask in opposite way.
> E.g.:
> { OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
> CODE_FOR_avx512vl_loaddquv16hi_mask, "__builtin_ia32_loaddqu
> hi256_mask", IX86_BUILTIN_LOADDQUHI256_MASK, UNKNOWN, (int)
> V16HI_FTYPE_PCV16HI_V16HI_UHI },
>
> This means that built-in enabled if *both* bits are set to 1.
>
> So, I've added special handling for OPTION_MASK_ISA_AVX512VL
> into i386.c/def_builtin.
>
> Bootstrapped and regtested.
>
> Richard,
> is it ok for main trunk?
>
> PR target/70325
> gcc/
> * config/i386/i386.c (def_builtin): Handle
> OPTION_MASK_ISA_AVX512VL to be and-ed with other
> bits.
> gcc/testsuite/
> * gcc.target/i386/pr70325.c: New test.
OK with a suitable comment describing the reason for special handling.
BTW: Looking through the builtins, I noticed that some builtin
descriptions contains duplicated flags (please see attached
pseudo-patch). Looks like typos to me, but please review this
situation, if everything is OK.
Uros.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3d8dbc4..bce0c8b 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -34094,9 +34094,9 @@ static const struct builtin_description bdesc_args[] =
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_permvarv16hi_mask, "__builtin_ia32_permvarhi256_mask",
IX86_BUILTIN_VPERMVARHI256_MASK, UNKNOWN, (int)
V16HI_FTYPE_V16HI_V16HI_V16HI_UHI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_permvarv8hi_mask, "__builtin_ia32_permvarhi128_mask",
IX86_BUILTIN_VPERMVARHI128_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv16hi3_mask, "__builtin_ia32_vpermt2varhi256_mask",
IX86_BUILTIN_VPERMT2VARHI256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI
},
- { OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512BW |
OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_vpermt2varv16hi3_maskz,
"__builtin_ia32_vpermt2varhi256_maskz", IX86_BUILTIN_VPERMT2VARHI256_MASKZ,
UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI },
+ { OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv16hi3_maskz,
"__builtin_ia32_vpermt2varhi256_maskz", IX86_BUILTIN_VPERMT2VARHI256_MASKZ,
UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv8hi3_mask, "__builtin_ia32_vpermt2varhi128_mask",
IX86_BUILTIN_VPERMT2VARHI128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI },
- { OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512BW |
OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_vpermt2varv8hi3_maskz,
"__builtin_ia32_vpermt2varhi128_maskz", IX86_BUILTIN_VPERMT2VARHI128_MASKZ,
UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI },
+ { OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv8hi3_maskz,
"__builtin_ia32_vpermt2varhi128_maskz", IX86_BUILTIN_VPERMT2VARHI128_MASKZ,
UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI },
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermi2varv16hi3_mask, "__builtin_ia32_vpermi2varhi256_mask",
IX86_BUILTIN_VPERMI2VARHI256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI
},
{ OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermi2varv8hi3_mask, "__builtin_ia32_vpermi2varhi128_mask",
IX86_BUILTIN_VPERMI2VARHI128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_V8HI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_rcp14v4df_mask,
"__builtin_ia32_rcp14pd256_mask", IX86_BUILTIN_RCP14PD256, UNKNOWN, (int)
V4DF_FTYPE_V4DF_V4DF_UQI },
@@ -34811,9 +34811,9 @@ static const struct builtin_description bdesc_args[] =
{ OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_permvarv32qi_mask, "__builtin_ia32_permvarqi256_mask",
IX86_BUILTIN_VPERMVARQI256_MASK, UNKNOWN, (int)
V32QI_FTYPE_V32QI_V32QI_V32QI_USI },
{ OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_permvarv16qi_mask, "__builtin_ia32_permvarqi128_mask",
IX86_BUILTIN_VPERMVARQI128_MASK, UNKNOWN, (int)
V16QI_FTYPE_V16QI_V16QI_V16QI_UHI },
{ OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv32qi3_mask, "__builtin_ia32_vpermt2varqi256_mask",
IX86_BUILTIN_VPERMT2VARQI256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_V32QI_USI
},
- { OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VBMI |
OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_vpermt2varv32qi3_maskz,
"__builtin_ia32_vpermt2varqi256_maskz", IX86_BUILTIN_VPERMT2VARQI256_MASKZ,
UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_V32QI_USI },
+ { OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv32qi3_maskz,
"__builtin_ia32_vpermt2varqi256_maskz", IX86_BUILTIN_VPERMT2VARQI256_MASKZ,
UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_V32QI_USI },
{ OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv16qi3_mask, "__builtin_ia32_vpermt2varqi128_mask",
IX86_BUILTIN_VPERMT2VARQI128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI
},
- { OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VBMI |
OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_vpermt2varv16qi3_maskz,
"__builtin_ia32_vpermt2varqi128_maskz", IX86_BUILTIN_VPERMT2VARQI128_MASKZ,
UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI },
+ { OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermt2varv16qi3_maskz,
"__builtin_ia32_vpermt2varqi128_maskz", IX86_BUILTIN_VPERMT2VARQI128_MASKZ,
UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI },
{ OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermi2varv32qi3_mask, "__builtin_ia32_vpermi2varqi256_mask",
IX86_BUILTIN_VPERMI2VARQI256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_V32QI_USI
},
{ OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL,
CODE_FOR_avx512vl_vpermi2varv16qi3_mask, "__builtin_ia32_vpermi2varqi128_mask",
IX86_BUILTIN_VPERMI2VARQI128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI
},
};
