On Thu, May 21, 2015 at 5:41 AM, Tristan Gingold wrote:
>
> 2015-05-21 Tristan Gingold
>
> * pecoff.c: New file.
> * Makefile.am (FORMAT_FILES): Add pecoff.c and dependencies.
> * Makefile.in: Regenerate.
> * filetype.awk: Detect pecoff.
> * configure.ac:
I bootstrapped this on powerpc-ibm-aix7.1.0.0 and my colleagues
bootstrapped this on powerpc64-linux and powerpc64le-linux.
It works and produces reasonable instruction sequences.
We can iterate on the syntax, but the core concept seems to work correctly.
Thanks, David
The compiler currently ICEs when compiling a stdarg function with
+nofp, as reported in PR 66258.
The aarch64.md file disables FP instructions using TARGET_FLOAT, which
supports both -mgeneral-regs-only and +nofp. But there is code in
aarch64.c that checks TARGET_GENERAL_REGS_ONLY. This results
PING: https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01511.html
This only needs approval from Fortran maintainers.
On 17 May 2015 at 20:22, Manuel López-Ibáñez wrote:
> Hi,
>
> This patch finishes the conversion of Fortran diagnostics to use the
> common diagnostics by removing all gfc_error*_1 v
On 05/20/2015 08:04 PM, Thomas Preud'homme wrote:
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
From: Steven Bosscher [mailto:stevenb@gmail.com]
Sent: Tuesday, May 19, 2015 7:21 PM
Not OK.
This will break in move_invariants() whe
On Fri, May 22, 2015 at 3:11 PM, Andrew Chambers
wrote:
>
> I'm not suggesting breaking go conventions, I just think the default if no
> GOARCH is specified then it should match --target.
Sounds good to me.
> Perhaps we could check the symlink name for the target triple if no GOARCH
> is set.
W
On 22.05.2015 12:10, Marek Polacek wrote:
> Thanks, applied. Here's the final version.
By the way, we have a feature test macro, __cpp_attributes=200809 which
can be used to determine, whether C++11 attribute syntax is supported by
the compiler.
I propose to add something similar for this extens
On 05/21/2015 02:01 PM, Andreas Tobler wrote:
On 21.05.15 20:14, Andreas Tobler wrote:
On 20.05.15 22:30, Jeff Law wrote:
On 05/20/2015 11:04 AM, Andreas Tobler wrote:
Hi,
the attached patch enables some PIE tests on FreeBSD.
Ok for trunk?
Thanks,
Andreas
2015-05-20 Andreas Tobler
On 05/20/2015 10:41 AM, Jakub Jelinek wrote:
On Wed, May 20, 2015 at 10:36:25AM -0600, Jeff Law wrote:
These fix the remaining leaks in the threader that I'm aware of. We failed
to properly clean-up when we had to cancel certain jump threading
opportunities. So thankfully this wasn't a big le
This is the final patch to the PA backend to cleanup its handling of
shadd insns and scaled indexed addressing modes.
First, it removes the old non-canonical shadd insns.
Second, it removes some non-canonical peephole patterns. No idea what I
was thinking when I wrote them. Given they're n
This patch is the first in a series of patches that will eventually add support
for IEEE 128-bit floating point support to the PowerPC GCC compiler. At the
current time, we do not plan to change the default for long double. I added a
new type keyword (__float128) to get access to IEEE 128-bit flo
On Fri, May 22, 2015 at 2:01 PM, Andrew Chambers
wrote:
>>
>> For example, I've tested on an x86, built cross compilers for ppc64 and
>> ppc64le and then can invoke the native go tool (built to run on x86) to
>> compile with either target compiler by changing my GOARCH value. I don't
>> want to h
On Mon, 18 May 2015, Richard Biener wrote:
On Fri, May 15, 2015 at 7:22 PM, Marc Glisse wrote:
we already have the more complicated: x & ~(x & y) -> x & ~y (which I am
reindenting by the way) and the simpler: (~x | y) & x -> x & y, so I am
proposing this one for completeness. Regtested on ppc
On Wed, May 20, 2015 at 3:58 PM, Yunlian Jiang wrote:
> GCC bootstraps with this patch.
Committed as follows.
Ian
include/:
2015-05-22 Yunlian Jiang
* libiberty.h (asprintf): Don't declare if HAVE_DECL_ASPRINTF is
not defined.
libiberty/:
2015-05-22 Yunlian Jiang
* configure.ac: Add
On 05/22/2015 02:38 PM, Aditya K wrote:
Subject: Re: [PATCH] Print Pass Names
From: richard.guent...@gmail.com
Date: Fri, 22 May 2015 21:32:24 +0200
To: hiradi...@msn.com; gcc-patches@gcc.gnu.org
On May 22, 2015 6:32:38 PM GMT+02:00, Aditya K wrote:
> Subject: Re: [PATCH] Print Pass Names
> From: richard.guent...@gmail.com
> Date: Fri, 22 May 2015 21:32:24 +0200
> To: hiradi...@msn.com; gcc-patches@gcc.gnu.org
>
> On May 22, 2015 6:32:38 PM GMT+02:00, Aditya K wrote:
>>Currently, when we print the pa
These should have gone in with the first patch in the series.
Thankfully the splitters aren't terribly important anymore and thus
having them goof'd up for a couple days hasn't been a problem.
In fact, much like the hppa_legitimize_address code to handle
shift-add/scaled addressing modes, t
On 05/22/2015 09:45 AM, Segher Boessenkool wrote:
On Thu, May 21, 2015 at 09:24:37AM -0600, Jeff Law wrote:
When combine needs to split a complex insn, it will canonicalize a
simple (mult X (const_int Y)) where Y is a power of 2 into the expected
(ashift X (const_int Y')) if the (mult ...) is se
On 05/22/2015 02:27 AM, Mikhail Maltsev wrote:
This patch fixes a bug introduced by refactoring. A cast from rtx_insn
to rtx_jump_insn in fix_crossing_conditional_branches was placed before
the check, and that caused ICE if the instruction is actually a call,
rather than a jump.
Bootstrapped/reg
On 05/22/2015 09:42 AM, Richard Sandiford wrote:
This patch adjusts the fix for PR target/65689 along the lines suggested
in https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01559.html. The idea
is to reuse the existing gensupport.c routine to work out the codes
accepted by constraints.
I'd origin
On 05/22/2015 09:39 AM, Richard Sandiford wrote:
Eric Botcazou writes:
Some pieces of code create a temporary REG or MEM and only fill it
in later when they're testing the cost of a particular rtx. This patch
makes sure that even the dummy REG or MEM is valid, rather than force
the gen_* code
On May 22, 2015 6:32:38 PM GMT+02:00, Aditya K wrote:
>Currently, when we print the passes it does not print its name. This
>becomes confusing when we want to print all the passes at once (e.g.,
>-fdump-tree-all-all=stderr &> pass.dump).
>This patch adds functionality to print the pass name. It pa
Hi,
surprisingly, for NSDMIs we don't use reshape_init and we end-up
rejecting simple testcases like the below. It seems clear to me that we
should - consistently with the comment preceding digest_init too - but
I'm not 100% sure that digest_nsdmi_init is the best place for that.
Anyway, the
On 05/22/2015 10:36 AM, Jason Merrill wrote:
> It also seems unnecessary to load 8 bytes on any target; we could add a
> function to optabs.c that returns the smallest mode for which there's atomic
> load support?
No, while we do use an atomic_load pattern if it exists, we assume that
all loads no
On 05/19/2015 06:06 PM, Rich Felker wrote:
> And are the above indirect calls/jumps (1983+43) candidates for
> scheduling/hoisting the address load (that's not being done yet), or
> are they the ones the compiler opted not to schedule/hoist? The win
> from relaxation seems small here, but as long a
On 05/21/15 21:47, Jason Merrill wrote:
How about adding may_alias support to the code a bit lower down that copies the
abi_tag attribute?
Good idea. This keeps the non-copy behavior when the attribute is the last on
the source attribute list, and fixes up the case for when there are both
ma
On 22/05/15 16:21 +0100, Jonathan Wakely wrote:
On 22/05/15 17:13 +0200, Jakub Jelinek wrote:
On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote:
+ alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)];
Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all ta
On 05/22/2015 11:23 AM, Ramana Radhakrishnan wrote:
On 22/05/15 15:28, Jason Merrill wrote:
I do notice that get_guard_bits after build_atomic_load just won't work
on non-ARM targets, as it ends up trying to take the address of a value.
So on powerpc where targetm.guard_mask_bit is false - thi
On Fri, 2015-05-22 at 17:41 +0100, Matthew Wahab wrote:
> On 21/05/15 19:26, Torvald Riegel wrote:
> > On Thu, 2015-05-21 at 16:45 +0100, Matthew Wahab wrote:
> >> On 19/05/15 20:20, Torvald Riegel wrote:
> >>> On Mon, 2015-05-18 at 17:36 +0100, Matthew Wahab wrote:
> Hello,
>
> On 1
On Fri, May 22, 2015 at 11:23 AM, Ramana Radhakrishnan
wrote:
> So on powerpc where targetm.guard_mask_bit is false - this is what I see.
>
>
> {
> static int * p;
>
> static int * p;
> if (< __atomic_load_8 (&_ZGVZ1fvE1p, 2) == 0>>)
> {
> if (<>)
> {
> < TAR
On Fri, 2015-05-22 at 12:37 +0100, Ramana Radhakrishnan wrote:
> Hi,
>
> While writing atomic_word.h for the ARM backend to fix PR target/66200
> I
> thought it would make more sense to write it all up with atomic
> primitives instead of providing various fragile bits of inline
> asssembler. Th
On 21/05/15 19:26, Torvald Riegel wrote:
On Thu, 2015-05-21 at 16:45 +0100, Matthew Wahab wrote:
On 19/05/15 20:20, Torvald Riegel wrote:
On Mon, 2015-05-18 at 17:36 +0100, Matthew Wahab wrote:
Hello,
On 15/05/15 17:22, Torvald Riegel wrote:
This patch improves the documentation of the built
Currently, when we print the passes it does not print its name. This becomes
confusing when we want to print all the passes at once (e.g.,
-fdump-tree-all-all=stderr &> pass.dump).
This patch adds functionality to print the pass name. It passes bootstrap (with
default configurations).
Hope this
On May 22, 2015 5:13:16 PM GMT+02:00, Michael Matz wrote:
>Hi,
>
>between Richis improvements of grouped accesses, and mine to strided
>stores is an interaction that now leads to ICEs and wrong code after
>both
>are in, for instance PR66251. The added testcases reflects this
>situation, and us
The insns generated by hppa_legitimize_address for shift-add
calculations are never directly inserted into a MEM -- they're loaded
into a register first which may or may not be later combined into a
memory reference.
So... We should be using the ASHIFT form rather than the MULT form for
ins
On 05/22/2015 09:13 AM, Jakub Jelinek wrote:
On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote:
+ alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)];
Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all targets
(I mean, won't some target align the structu
Andreas Krebbel writes:
> On 05/17/2015 11:12 PM, Richard Sandiford wrote:
>> Andreas Krebbel writes:
>>> Hi Richard,
>>>
>>> I see regressions with the current IBM z13 vector patchset which appear to
>>> be related to the new
>>> genrecog.
>>>
>>> The following two insn definitions only differ
On 05/17/2015 11:12 PM, Richard Sandiford wrote:
> Andreas Krebbel writes:
>> Hi Richard,
>>
>> I see regressions with the current IBM z13 vector patchset which appear to
>> be related to the new
>> genrecog.
>>
>> The following two insn definitions only differ in the mode and predicate of
>> th
On Thu, May 21, 2015 at 09:24:37AM -0600, Jeff Law wrote:
> When combine needs to split a complex insn, it will canonicalize a
> simple (mult X (const_int Y)) where Y is a power of 2 into the expected
> (ashift X (const_int Y')) if the (mult ...) is selected as a split point.
>
> However if the
Eric Botcazou writes:
>> Some pieces of code create a temporary REG or MEM and only fill it
>> in later when they're testing the cost of a particular rtx. This patch
>> makes sure that even the dummy REG or MEM is valid, rather than force
>> the gen_* code to handle garbage values.
>>
>>
>> gcc
Hi,
PR 66181 is about ICE in verify_type that complains that type and its variant
differs
by TYPE_NO_FORCE_BLK. This flag is kind-of internal to stor-layout.c, so the
divergence
may not matter (I am not sure about it as C++ FE finalizes type variants
separately
and thus it may trip to different
This patch adjusts the fix for PR target/65689 along the lines suggested
in https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01559.html. The idea
is to reuse the existing gensupport.c routine to work out the codes
accepted by constraints.
I'd originally done this with an eye to using compute_test_co
This example which I wrote to test ifconversion, currently fails to if-convert
or vectorize:
int foo ()
{
for (int i = 0; i < 32 ; i++)
{
int m = (a[i] & i) ? 5 : 4;
b[i] = a[i] * m;
}
}
...because jump-threading in dom1 rearranged the loop into a form that neither
if-con
On 22/05/15 17:13 +0200, Jakub Jelinek wrote:
On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote:
>>+ alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)];
>
>Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all targets
>(I mean, won't some target align the st
On 22/05/15 15:28, Jason Merrill wrote:
On 05/22/2015 09:55 AM, David Edelsohn wrote:
On Fri, May 22, 2015 at 9:40 AM, Jason Merrill wrote:
On 05/22/2015 07:23 AM, Ramana Radhakrishnan wrote:
+ /* Load the guard value only through an atomic acquire load. */
+ guard = build_atomic_load (
I fixed a typo in gcc/config/openbsd.h. Here is the updated patch. The whole
patch is also on hjl/pie/master branch in GCC git mirror.
--
H.J.
From 64364101d6c888e20eb1146ee2baac4b08e684cf Mon Sep 17 00:00:00 2001
From: "H.J. Lu"
Date: Tue, 19 May 2015 10:12:20 -0700
Subject: [PATCH] Add --ena
Hi,
between Richis improvements of grouped accesses, and mine to strided
stores is an interaction that now leads to ICEs and wrong code after both
are in, for instance PR66251. The added testcases reflects this
situation, and uses both, narrowing and widening (narrowing would still
ICE, widen
On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote:
> >>+ alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)];
> >
> >Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all targets
> >(I mean, won't some target align the structure more than its only field)?
>
> H
On 22/05/15 16:29 +0200, Jakub Jelinek wrote:
On Fri, May 22, 2015 at 03:15:10PM +0100, Jonathan Wakely wrote:
--- a/libstdc++-v3/include/ext/aligned_buffer.h
+++ b/libstdc++-v3/include/ext/aligned_buffer.h
@@ -31,21 +31,23 @@
#pragma GCC system_header
-#if __cplusplus >= 201103L
-# include
On Fri, May 22, 2015 at 2:00 AM, Pedro Alves wrote:
> On 05/21/2015 11:02 PM, Sriraman Tallam wrote:
>> On Thu, May 21, 2015 at 2:51 PM, Pedro Alves wrote:
>>> On 05/21/2015 10:12 PM, Sriraman Tallam wrote:
My original proposal, for x86_64 only, was to add
-fno-plt=. This lets the
> > > + case OBJ_TYPE_REF:
> > > + {
> > > + if (!operand_equal_p (OBJ_TYPE_REF_EXPR (arg0),
> > > + OBJ_TYPE_REF_EXPR (arg1), flags))
> > > + return false;
> > > + if (flag_devirtualize && virtual_method_call_p (arg0))
> > > + {
> > > + if (t
Hello!
This patch splits SSE specific part of set_fast_math to its own
function, decorated with "fxsr,sse" target attribute. This way, we can
avoid compiling the whole file with -msse that implies generation of
possibly unsupported CMOVE insns.
Additionally, we can now use generic t-crtfm makefil
Hi James,
On 19/05/15 12:18, James Greenhalgh wrote:
On Mon, Apr 20, 2015 at 11:16:02AM +0100, Kyrylo Tkachov wrote:
Hi all,
The ICE in the PR happens when we pass a 1x(128-bit float) vector as an
argument.
The aarch64 backend erroneously classifies it as a composite type when in
fact it
is a
On Fri, May 22, 2015 at 03:15:10PM +0100, Jonathan Wakely wrote:
> --- a/libstdc++-v3/include/ext/aligned_buffer.h
> +++ b/libstdc++-v3/include/ext/aligned_buffer.h
> @@ -31,21 +31,23 @@
>
> #pragma GCC system_header
>
> -#if __cplusplus >= 201103L
> -# include
> -#else
> +#if __cplusplus < 2
On 05/22/2015 09:55 AM, David Edelsohn wrote:
On Fri, May 22, 2015 at 9:40 AM, Jason Merrill wrote:
On 05/22/2015 07:23 AM, Ramana Radhakrishnan wrote:
+ /* Load the guard value only through an atomic acquire load. */
+ guard = build_atomic_load (guard, MEMMODEL_ACQUIRE);
+
/* Check t
There are two problems involved in this PR.
First, as Clang's ubsan detects, we are using static_cast to convert
from _Rb_tree_node_base* to _Rb_tree_node<_Val>* in cases where there
is no _Rb_tree_node<_Val> at that address (_M_impl._M_header is just
an _Rb_tree_node_base). That's undefined beha
On 05/22/2015 07:23 AM, Richard Biener wrote:
On Wed, May 20, 2015 at 5:50 PM, Aldy Hernandez wrote:
On 05/18/2015 06:56 AM, Richard Biener wrote:
diff --git a/gcc/tree-core.h b/gcc/tree-core.h
index ad1bb23..2a9f417 100644
--- a/gcc/tree-core.h
+++ b/gcc/tree-core.h
@@ -1334,6 +1334,9 @@ st
On 22/05/15 14:40, Jason Merrill wrote:
On 05/22/2015 07:23 AM, Ramana Radhakrishnan wrote:
+ /* Load the guard value only through an atomic acquire load. */
+ guard = build_atomic_load (guard, MEMMODEL_ACQUIRE);
+
/* Check to see if the GUARD is zero. */
guard = get_guard_bits (gu
On Fri, May 22, 2015 at 9:40 AM, Jason Merrill wrote:
> On 05/22/2015 07:23 AM, Ramana Radhakrishnan wrote:
>>
>> + /* Load the guard value only through an atomic acquire load. */
>> + guard = build_atomic_load (guard, MEMMODEL_ACQUIRE);
>> +
>> /* Check to see if the GUARD is zero. */
>>
>
> And no, I'm hesitant to change operand_equal_p too much. It's
> very much deep-rooted into GENERIC.
OK, as another option, i can bring relevant logic from operand_equal_p
to ipa-icf and separate it into the compare_operand class like I did.
Use it in ipa-icf-gimple now and we can slowly turn
> > + case OBJ_TYPE_REF:
> > + {
> > + if (!operand_equal_p (OBJ_TYPE_REF_EXPR (arg0),
> > + OBJ_TYPE_REF_EXPR (arg1), flags))
> > + return false;
> > + if (flag_devirtualize && virtual_method_call_p (arg0))
> > + {
> > + if (t
This does some more cleanup and refactoring with two fixes, the
pure slp compute in vect_analyze_loop_operations was failing
to look at pattern stmts and the vect_is_slp_reduction hunk makes
reduction detection fail because the pattern state changes in
between reduction detection and vectoriztaion
OK.
Jason
Hi,
this is also by and large obvious, I think: in order to use the right
location for error messages about 'explicit', just use
declspecs->locations[ds_explicit]. Tested x86_64-linux.
Thanks,
Paolo.
PS: I'm pretty sure we do have similar issues for other decl-specifiers,
which can be likew
On 05/22/2015 07:23 AM, Ramana Radhakrishnan wrote:
+ /* Load the guard value only through an atomic acquire load. */
+ guard = build_atomic_load (guard, MEMMODEL_ACQUIRE);
+
/* Check to see if the GUARD is zero. */
guard = get_guard_bits (guard);
I wonder if these calls should be r
> > Index: emit-rtl.c
> > ===
> > --- emit-rtl.c (revision 223508)
> > +++ emit-rtl.c (working copy)
> > @@ -1787,8 +1787,15 @@ set_mem_attributes_minus_bitpos (rtx ref
> >memset (&attrs, 0, sizeof (attrs));
> >
> >
On 05/22/2015 07:26 AM, Richard Biener wrote:
On Wed, May 20, 2015 at 11:45 PM, Aldy Hernandez wrote:
On 05/20/2015 05:01 PM, Jan Hubicka wrote:
commit 8824b5ecba26cef065e47b34609c72677c3c36fc
Author: Aldy Hernandez
Date: Wed May 20 16:31:14 2015 -0400
Set DECL_IGNORED_P on tempora
On Fri, 22 May 2015, Jan Hubicka wrote:
> Hi,
> with aliasing sanity checks I got burnt again with ipa-icf-gimple's
> compare_operand doing alias set checks on all types it ever trips across.
>
> I always tought that we do not need two equality testers - operand_equal_p and
> compare_operand and
On Fri, 22 May 2015, Jan Hubicka wrote:
> Hi,
> I am working on patch that makes operand_equal_p replace logic from
> ipa-icf-gimple's compare_op via a valueizer hook. Currently the patch however
> cuts number of merges on firefox to half (apparently becuase it gives up on
> some tree codes too e
On Fri, 22 May 2015, Jan Hubicka wrote:
> Hi,
> this patch fixes few cases where we compute alias type and don't need to
> that are found by adding type_with_alias_set_p check to alias.c (I will send
> this patch separately as there is still one ICE caught by it I believe
> originating from ipa-ic
This is an internal change that renames the Has_Volatile_Full_Access flag into
Is_Volatile_Full_Access for the sake of consistency with similar flags.
No user-visible changes.
Tested on x86_64-pc-linux-gnu, committed on trunk
2015-05-22 Eric Botcazou
* einfo.ads (Has_Volatile_Full_Ac
This update makes sure that Volatile_Full_Access is treated like
Atomic in all cases except checking specific RM legality rules,
and controlling atomic synchronization.
Tested on x86_64-pc-linux-gnu, committed on trunk
2015-05-22 Robert Dewar
* exp_ch5.adb, layout.adb, einfo.adb, einf
This patch updates the implementation of anonymous masters that support
finalization actions of anonymous access-to-controlled type allocations
to handle package instantiations that act as a compilation unit.
-- Source --
-- q.ads
package Q is
type Obj_T is tagged nu
The 'Size of a discrete subtype with a null range should be zero. The
following test:
1. with Ada.Text_IO; use Ada.Text_IO;
2. procedure Static_Null_Range_Size is
3.subtype Static_Null_Range is
4. Integer range 5 .. 0;
5.Dummy : Static_Null_Range;
6. begi
In full warning mode, when an unchecked conversion is applied to types of
different sizes, the compiler issues a warning describing the effects of
the conversion on the additional or missing bits.
When the source is smaller than the target, it was issuing a specific warning
if the target is of a d
On Mon, Apr 20, 2015 at 5:28 PM, Kyrill Tkachov wrote:
> Hi all,
>
> A pet project of mine is to get to the point where backend rtx costs
> functions won't have
> to handle rtxes that don't match down to any patterns/expanders we have. Or
> at least limit such cases.
> A case dealt with in this pa
Hi,
with aliasing sanity checks I got burnt again with ipa-icf-gimple's
compare_operand doing alias set checks on all types it ever trips across.
I always tought that we do not need two equality testers - operand_equal_p and
compare_operand and given that it turns out to be non-trivial to fix issu
Hi,
I am working on patch that makes operand_equal_p replace logic from
ipa-icf-gimple's compare_op via a valueizer hook. Currently the patch however
cuts number of merges on firefox to half (apparently becuase it gives up on
some tree codes too early)
The patch bellow merges code from ipa-icf-gim
This patch reimplements the generation of anonymous finalization masters used
in servicing anonymous access-to-controlled type allocations. The modification
prevents the generation of a duplicate anonymous master in certain cases.
-- Source --
-- gen_pack.ads
with Ada.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2015-05-22 Richard Biener
PR tree-optimization/66251
* tree-vect-stmts.c (vectorizable_conversion): Properly
set STMT_VINFO_VEC_STMT even for the SLP case.
* gfortran.fortran-torture/compi
On 05/22/2015 04:31 AM, Eric Botcazou wrote:
My apologies for the delay on Ada. I have reworked the patch to leave
the first pass on the TYPE_DECLs which are definitely needed. I also
optimized things a bit, since we don't need to save all the globals any
more.
Thanks, this looks fine modulo
Hi,
this patch fixes few cases where we compute alias type and don't need to
that are found by adding type_with_alias_set_p check to alias.c (I will send
this patch separately as there is still one ICE caught by it I believe
originating from ipa-icf-gimple, I have more involved fix for that)
The p
> > + /* No need for canonical types of functions and methods; those are never
> > + accessed as memory locations. */
> > + if (TREE_CODE (t) == FUNCTION_TYPE || TREE_CODE (t) == METHOD_TYPE)
> > +return;
>
> Just occured to me that it might make sense to remove the
> FUNCTION/METHOD_TY
> Now we have it spelled out 4 times ... makes sense to create a new
> macro for it? (though I cannot think of a good name...
> UNACCESSIBLE_TYPE_P ()?)
Yep, actually I already made that version of patch yesterday but then got
hooked by beers. This is better version (also with more sensible comm
On 22/05/15 12:26, Ramana Radhakrishnan wrote:
Ok for trunk?
I can't approve but do you mind taking care of -march=armv8-a in the
arm backend too as that would have the same issues.
Will do,
Matthew
machmode.def has
/* Allow the target to specify additional modes of various kinds. */
/* Complex modes. */
COMPLEX_MODES (INT);
COMPLEX_MODES (FLOAT);
/* Decimal floating point modes. */
DECIMAL_FLOAT_MODE (SD, 4, decimal_single_format);
DECIMAL_FLOAT_MODE (DD, 8, decimal_double_format);
DECI
On Wed, May 20, 2015 at 11:41 AM, Bin Cheng wrote:
> Hi,
> As we know, GCC is too conservative when checking overflow behavior in SCEV
> and loop related optimizers. Result is some variable can't be recognized as
> scalar evolution and thus optimizations are missed. To be specific,
> optimizers
Hi,
While writing atomic_word.h for the ARM backend to fix PR target/66200 I
thought it would make more sense to write it all up with atomic
primitives instead of providing various fragile bits of inline
asssembler. Thus this patch came about. I intend to ask for a
specialized version of this
On Wed, May 20, 2015 at 11:45 PM, Aldy Hernandez wrote:
> On 05/20/2015 05:01 PM, Jan Hubicka wrote:
>>>
>>>
>>> commit 8824b5ecba26cef065e47b34609c72677c3c36fc
>>> Author: Aldy Hernandez
>>> Date: Wed May 20 16:31:14 2015 -0400
>>>
>>> Set DECL_IGNORED_P on temporary arrays created in the
>
> Ok for trunk?
I can't approve but do you mind taking care of -march=armv8-a in the
arm backend too as that would have the same issues.
Ramana
> Matthew
>
> gcc/
> 2015-05-21 Matthew Wahab
>
> * config/aarch64/aarch64.c (aarch64_emit_post_barrier): New.
> (aarch64_split_ato
Bah ! now with patch attached.
Ramana
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 1ba99d0..857c9ac 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -9987,12 +9987,6 @@ alpha_atomic_assign_expand_fenv (tree *hold, tree
*clear, tree *update)
#unde
On Wed, May 20, 2015 at 5:50 PM, Aldy Hernandez wrote:
> On 05/18/2015 06:56 AM, Richard Biener wrote:
>
> BTW, thanks for the review.
>
>> On Fri, May 8, 2015 at 2:40 AM, Aldy Hernandez wrote:
>>>
>>> As seen on TV.
>>
>>
>> +/* FIRST_TIME is set to TRUE for the first time we are called for a
>>
All,
This patch removes the special casing for targets with relaxed memory
ordering and handles guard accesses with equivalent atomic load acquire
operations. In this process we change the algorithm to load the guard
variable with an atomic load that has ACQUIRE semantics. I'm not
terribly
Hi Arnaud,
Index: exp_util.adb
===
--- exp_util.adb(revision 223476)
+++ exp_util.adb(working copy)
@@ -204,6 +204,13 @@
when others => null;
end case;
+ -- Nothing to do for the identifier in
This patch causes default initialization of objects of types
Constant_Reference_Type and Reference_Type in the containers packages to raise
Program_Error as required by the RM.
Tested on x86_64-pc-linux-gnu, committed on trunk
2015-05-22 Bob Duff
* a-cborma.ads, a-cidlli.ads, a-cimutr
It is not allowed to rename a component of a composite object to which
pragma Volatile_Full_Access has been applied. The following is compiled
with -gnatj55
1. package RenamVFA is
2.type Int8_t is mod 2**8;
3.type Rec is record
4. A,B,C,D : Int8_t;
5.end r
On 21/05/15 06:33, Sandra Loosemore wrote:
ARM testing shares the AArch64 advsimd-intrinsics execution tests. On
ARM, though, the NEON support being tested is optional -- some arches
are compatible with the NEON compilation options but hardware available
for testing might or might not be able
This patch modifies the treatment of constants within the state space of a
package. Constants that appear in the hidden state space may or may not act
as constituents or possess indicator Part_Of. This is because the compiler
cannot accurately determine whether a constant has variable input which i
This patch removes the (incorrect) implementation of the following rule:
SPARK RM 6.9 (11) - A non-ghost library unit package or generic package
specification shall not require a completion solely because of ghost
declarations. [In other words, if a library unit package or generic package
This patch implements the following rule with respect to constants:
SPARK RM 7.1.1(2) - The hidden state of a package P consists of:
* any variables, or constants with variable inputs, declared immediately in
the private part or body of P.
Constants without variable input are not conside
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