Jeff Law :
> On 01/13/15 17:40, Martin Uecker wrote:
> > Jeff Law :
> >> On 01/13/15 10:34, Martin Uecker wrote:
> >>> Mon, 12 Jan 2015 11:00:44 -0700
> >>> Jeff Law :
> On 11/11/14 23:13, Martin Uecker wrote:
> >
> > ...
> >
> Has this patch been bootstrapped and regression tested, if s
On 01/13/15 11:55, Eric Botcazou wrote:
(1) we have a non-paradoxical subreg;
(2) both (reg:ymode xregno) and (reg:xmode xregno) occupy full
hard registers (no padding or unused upper bits);
(3) (reg:ymode xregno) and (reg:xmode xregno) store the same number
of bytes (X) in each const
"Maciej W. Rozycki" writes:
> On Tue, 13 Jan 2015, Matthew Fortune wrote:
>
>> > >> I have tested this for both mips and micromips, and the tests now
>> > >> pass successfully.
>> > >> The ChangeLog and patch are below.
>> > >
>> > > Hmm, instead of trying to avoid testing microMIPS code generati
On 01/10/15 06:05, Richard Sandiford wrote:
Sorry for the slow response. Jeff has approved the patch in the
meantime, but I didn't want to go ahead and apply it while there
was still disagreement...
Thanks. I didn't realize there was a disagreement when I approved.
Let's continue to hash this
On 01/13/15 14:27, H.J. Lu wrote:
-fprofile -mfentry works with PIE if gcrt1.o is compiled with -fPIC. A
glibc has been filed, PR 17836, and a glibc patch has been submitted.
OK for trunk?
Thanks.
H.J.
--
* gcc.target/i386/fentry-override.c: Properly place {} in target
selecto
On 01/13/15 15:56, Andrew MacLeod wrote:
On 01/13/2015 02:06 PM, Andrew MacLeod wrote:
On 01/13/2015 01:38 PM, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod
wrote:
> On 09/12/14 08:17, Yangfei (Felix) wrote:
> >> On 28 November 2014 at 09:23, Yangfei (Felix)
> wrote:
> >>> Hi,
> >>>This patch converts vpmaxX & vpminX intrinsics to use builtin
> >>> functions
> >> instead of the previous inline assembly syntax.
> >>>Regtested with aarch64-linux-gnu on
On 01/13/15 17:40, Martin Uecker wrote:
Jeff Law :
On 01/13/15 10:34, Martin Uecker wrote:
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law :
On 11/11/14 23:13, Martin Uecker wrote:
...
Has this patch been bootstrapped and regression tested, if so on what
platform.
x86_64-unknown-linux-gnu
Appr
On 01/13/15 09:18, Jakub Jelinek wrote:
Hi!
My PR60663 fix unfortunately stopped CSE of all inline-asms, even when
they e.g. only have the clobbers added by default.
This patch attempts to restore the old behavior, with the exceptions:
1) as always, asm volatile is not CSEd
2) inline-asm with m
Hi, all,
The nds32 target supports two features, fp-as-gp and ex9, designed
for code size optimizations. They are majorly performed by linker
so that compiler is merely to give some hints or directives with
-mforce-fp-as-gp, -mforbid-fp-as-gp, and -mex9 options.
However, those two features are n
On 01/13/15 17:03, Segher Boessenkool wrote:
On Tue, Jan 13, 2015 at 03:17:08PM -0700, Jeff Law wrote:
And finally there is the case of non-volatile asm with "memory" clobber
with
no memory stores in between the two - the posted (safer) patch will not
allow to CSE the two, while in theory we cou
On 01/13/15 15:42, Joseph Myers wrote:
On Tue, 13 Jan 2015, Jeff Law wrote:
In many ways having the compiler or assembler spitting out an error here is
preferable to silently compiling the code. That would also help explain why
As usual, an error is incorrect in such a case that only has und
Hi,
I would like to ping the patch to fix divergence between a type and its main
variant introduced by C++ FE.
https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01202.html
Honza
Hi,
this workaround actually triggers bug in quite recent golds, so it seems
to be good motivation to finally drop it. The bug is long fixed.
Bootstrapped/regtested x86_64-linux, will commit it shortly.
Honza
* tree-profile.c (init_ic_make_global_vars): Drop workaround
for bintu
Hi,
Please find attached the patch that fixes abitest for ilp32.
"testfunc_ptr" is a 32bit pointer in ILP32 but is being loaded as 64bit.
Hence some of the func-ret testcases FAIL's for ILP32.
Please review the patch and let us know if its okay?
Regression tested on aarch64-elf.
Thanks,
Navee
This patch fixes the above PR where it was reported that the C++
frontend does not reject the malformed class declaration
struct X<5>;
Instead of rejecting it, the FE treats this declaration as if it were a
forward declaration of a template specialization, i.e. as if it were
written
temp
Hi,
in December I conditoinally disabled expensive sanity checking in inliner.
This triggeres bootstrap miscompare because caches are getting out of sync.
This patch fixes the problem found by sanity check - the node growth cache
was removed from use in badness calculation by Richard a while ago, b
2015-01-14 6:22 GMT+08:00 Joseph Myers :
> On Tue, 13 Jan 2015, Chung-Ju Wu wrote:
>
>> To fix this issue, we are going to use -mcmodel=X options, which probably
>> gives more flexibility to support varied code model on code generation.
>> The -mgp-direct option now becomes meaningless and can be d
Eric Botcazou writes:
> Some ports are missing (lm32, moxie, nios2, nvptx, rl78, rx) so the relevant
> maintainers are CCed (see 6.3.9 Anatomy of a Target Back End in the doc).
I think I got this right
| Characteristics
Target | HMSLQNFICBD lqrcpfgmbdiates
---+-
Jeff Law :
> On 01/13/15 10:34, Martin Uecker wrote:
> > Mon, 12 Jan 2015 11:00:44 -0700
> > Jeff Law :
> >> On 11/11/14 23:13, Martin Uecker wrote:
...
> >> Has this patch been bootstrapped and regression tested, if so on what
> >> platform.
> >
> > x86_64-unknown-linux-gnu
> Approved. Please i
On Tue, Jan 13, 2015 at 03:17:08PM -0700, Jeff Law wrote:
> >And finally there is the case of non-volatile asm with "memory" clobber
> >with
> >no memory stores in between the two - the posted (safer) patch will not
> >allow to CSE the two, while in theory we could CSE them into just one asm.
> I
> -Original Message-
> From: Matthew Fortune [mailto:matthew.fort...@imgtec.com]
> Sent: Monday, January 05, 2015 6:09 PM
> To: Moore, Catherine
> Cc: 'gcc-patches@gcc.gnu.org' (gcc-patches@gcc.gnu.org)
> Subject: [MIPS] Re-enable ABI->ISA inference
>
> The R6 patch introduced MIPS_ISA_L
On Tue, Jan 13, 2015 at 5:03 AM, H.J. Lu wrote:
> On Mon, Jan 12, 2015 at 11:50:41PM +, Joseph Myers wrote:
>> On Mon, 12 Jan 2015, H.J. Lu wrote:
>>
>> > +if test x$enable_default_pie = xyes; then
>> > + AC_MSG_CHECKING(if $target supports default PIE)
>> > + enable_default_pie=no
>> > + c
On 01/13/2015 02:06 PM, Andrew MacLeod wrote:
On 01/13/2015 01:38 PM, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod
wrote:
Lengthy discussion :
https://gcc.gnu.org/b
> H - you could argue a hardware implementation does not exist as it's a
> virtual target, but it can obviously be compiled down to run on
> hardware that does exist.
Agreed.
> Q - "registers" are typed and you can declare 64 bit registers, so
> probably this is true
OK.
> f - No
On Tue, Jan 13, 2015 at 2:41 PM, Rasmus Villemoes
wrote:
> [My first attempt at submitting a patch for gcc, so please forgive me
> if I'm not following the right protocol.]
There are a few things missing. For one, a testcase or two for the
added optimizations.
>
> Sometimes rounding a variable
On Tue, 13 Jan 2015, Jeff Law wrote:
> In many ways having the compiler or assembler spitting out an error here is
> preferable to silently compiling the code. That would also help explain why
As usual, an error is incorrect in such a case that only has undefined
behavior at runtime (but it may
[My first attempt at submitting a patch for gcc, so please forgive me
if I'm not following the right protocol.]
Sometimes rounding a variable to the next even integer is written x += x
& 1. This usually means using an extra register (and hence at least an
extra mov instruction) compared to the equ
On Tue, 13 Jan 2015, Andrew MacLeod wrote:
> It seems that it should be safe to move back to the original patch, and remove
> that error test for using consume on an exchange...
I don't think there should be any such errors, for any of the atomic
built-in functions, only warnings (with the model
On Tue, Jan 13, 2015 at 12:45:27PM -0700, Jeff Law wrote:
> On 01/13/15 09:38, Segher Boessenkool wrote:
> >On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
> >>3) on request from Richard (which Segher on IRC argues against), "memory"
> >>clobber also prevents CSE;
> >
> >As exten
On Tue, 13 Jan 2015, Chung-Ju Wu wrote:
> To fix this issue, we are going to use -mcmodel=X options, which probably
> gives more flexibility to support varied code model on code generation.
> The -mgp-direct option now becomes meaningless and can be discarded.
If you add or remove command-line op
When debugging libgccjit or client code, the recipe for reproducing a bug
can be very awkward. For example, consider client code, linked against
many libraries, which parses some source file into some internal
representation, and then walks this IR, calling into libgccjit. If this
encounters a bu
On 01/13/15 13:13, Jakub Jelinek wrote:
On Tue, Jan 13, 2015 at 12:45:27PM -0700, Jeff Law wrote:
On 01/13/15 09:38, Segher Boessenkool wrote:
On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
3) on request from Richard (which Segher on IRC argues against), "memory"
clobber al
On 01/09/15 06:39, Jiong Wang wrote:
the bug testcase is
===
typedef short U __attribute__((may_alias, aligned (1)));
struct S
{
_Complex float d __attribute__((aligned (8)));
};
void bar(struct S);
void f5 (int x)
{
struct S s;
((U *)((char *) &s.d + 1))[3] = x;
ba
-fprofile -mfentry works with PIE if gcrt1.o is compiled with -fPIC. A
glibc has been filed, PR 17836, and a glibc patch has been submitted.
OK for trunk?
Thanks.
H.J.
--
* gcc.target/i386/fentry-override.c: Properly place {} in target
selector. Remove nonpic.
* gcc.tar
Hi,
I checked in this patch to add dg-require-profiling to gcc.dg/aru-2.c
as an obvious fix.
H.J.
---
Index: ChangeLog
===
--- ChangeLog (revision 219560)
+++ ChangeLog (working copy)
@@ -1,5 +1,9 @@
2015-01-13 H.J. Lu
+
Hi all,
the attached patch fixes an ICE-on-invalid problem with
procedure-pointer components by making sure that we continue resolving
all components of a derived type, even after an error is thrown.
Regtested on x86_64-unknown-linux-gnu. Ok for trunk?
Cheers,
Janus
2015-01-13 Janus Weil
On 01/13/2015 01:46 PM, Paolo Carlini wrote:
In fact, I noticed today that this is a 4.8/4.9 Regression too. Shall I
try to apply the patchlet to 4_9-branch too and, if testing passes,
commit there and close the bug?
OK.
Jason
On 01/13/15 13:47, Martin Liška wrote:
Hello.
As pointed out in the following PR64307, IPA ICF is missing support for
aforementioned TREE types. Apart from that, the patch also fixes
BIT_FIELD_REF, which was broken.
Tested on x86_64-linux-pc and no regression has been seen.
Ready for trunk?
Th
On 01/13/15 13:42, H.J. Lu wrote:
since check_profiling_available result is cached. It is wrong to use the
cached result from -m32 for -m64. Here is the updated patch. Tested
with RUNTESTFLAGS="--target_board='unix{-m32,-m64}'. OK for
trunk?
Yes, the updated patch is OK.
jeff
On 13.01.15 11:25, Ramana Radhakrishnan wrote:
On Thu, Jan 8, 2015 at 8:51 PM, Andreas Tobler wrote:
On 08.01.15 17:27, Richard Earnshaw wrote:
On 29/12/14 18:44, Andreas Tobler wrote:
All,
here is the third attempt to support ARM with FreeBSD.
In the meantime we found another issue in th
In this testcase we are iterating through an array which is a local
variable in a constexpr function. So its address is not constant, but
we can still do arithmetic on it to get to the address of an element and
then pull out the value of the element; we shouldn't reject the
evaluation as non-c
On 12/01/15 13:50, Ramana Radhakrishnan wrote:
In principle ok, but I'd like a comment in there explaining why we've
done this. Can you also post under what configurations these have been
tested ?
Is this better?
I tested it by running the vect.exp tests with a variety of -mcpu flags.
Andrew
Hi,
this patch fixes ICE in inline_small_functions checking consistency of the
growth cache. When removing speculation the cache needs to be reset because
the frequencies of edges change.
Bootstrapped/regtested x86_64-linux, comitted.
Honza
PR ipa/64565
* g++.dg/torture/pr64565.
Hello.
As pointed out in the following PR64307, IPA ICF is missing support for
aforementioned TREE types. Apart from that, the patch also fixes
BIT_FIELD_REF, which was broken.
Tested on x86_64-linux-pc and no regression has been seen.
Ready for trunk?
Thanks,
Martin
>From 036a27ec12ad556160
The code I added for dealing with fixed parameter packs wasn't dealing
properly with zero-length packs: if there were any elements we would see
the pack expansion argument and punt, but we need to do that in the
zero-length case as well.
Tested x86_64-pc-linux-gnu, applying to trunk and 4.9.
c
On Tue, Jan 13, 2015 at 11:27 AM, Jeff Law wrote:
> On 01/13/15 05:54, H.J. Lu wrote:
>>
>> On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
>>>
>>> On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
>
> On Mon, Jan 12, 2015 at 12:0
The special rules for deduction of std::initializer_list don't support a
pack expansion, but we shouldn't crash.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit a1607c38aaf6e04c2a601ee78dca67984e179986
Author: Jason Merrill
Date: Mon Jan 12 13:27:20 2015 -0500
PR c++/64520
*
On 13 January 2015 at 22:02, Prathamesh Kulkarni
wrote:
> On 13 January 2015 at 16:06, Prathamesh Kulkarni
> wrote:
>> On 13 January 2015 at 15:34, Richard Biener wrote:
>>> On Sun, 11 Jan 2015, Prathamesh Kulkarni wrote:
>>>
Hi,
This is a revamped expr.h flattening flattening patch re
On Tue, 13 Jan 2015, Matthew Fortune wrote:
> > >> I have tested this for both mips and micromips, and the tests now
> > >> pass successfully.
> > >> The ChangeLog and patch are below.
> > >
> > > Hmm, instead of trying to avoid testing microMIPS code generation
> > > just to satisfy the test sui
On Tue, Jan 13, 2015 at 12:45:27PM -0700, Jeff Law wrote:
> On 01/13/15 09:38, Segher Boessenkool wrote:
> >On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
> >>3) on request from Richard (which Segher on IRC argues against), "memory"
> >>clobber also prevents CSE;
> >
> >As exten
Richard Sandiford writes:
> "Maciej W. Rozycki" writes:
> > On Tue, 13 Jan 2015, Andrew Bennett wrote:
> >
> >> The call-saved-{4-6}.c tests in the mips testsuite fail for
> micromips.
> >> The reason is
> >> that micromips uses the swm and lwm instructions to save/restore the
> >> call-saved re
"Maciej W. Rozycki" writes:
> On Tue, 13 Jan 2015, Andrew Bennett wrote:
>
>> The call-saved-{4-6}.c tests in the mips testsuite fail for micromips.
>> The reason is
>> that micromips uses the swm and lwm instructions to save/restore the
>> call-saved registers
>> rather than using the sw and lw i
On 01/13/15 09:38, Segher Boessenkool wrote:
On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
3) on request from Richard (which Segher on IRC argues against), "memory"
clobber also prevents CSE;
As extend.texi used to say:
"
If your assembler instructions access memory in an
On 01/13/15 05:54, H.J. Lu wrote:
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't know if -pg will
On 01/13/15 05:52, H.J. Lu wrote:
On Mon, Jan 12, 2015 at 03:04:20PM -0700, Jeff Law wrote:
On 01/12/15 14:51, Magnus Granberg wrote:
måndag 12 januari 2015 12.11.17 skrev H.J. Lu:
On Mon, Jan 12, 2015 at 12:03 PM, Jeff Law wrote:
On 01/12/15 12:59, H.J. Lu wrote:
I don't know if -pg will
On 01/13/15 09:28, Marek Polacek wrote:
We ICE on this testcase, because the usage of #pragma GCC ivdep
pulls in the ANNOTATE internal functions which don't have underlying
fndecls, hence we segv on a NULL_TREE. This patch makes get_attrs_for
be prepared for such a scenario. The callers of get_
On 01/13/15 09:11, Jakub Jelinek wrote:
On Mon, Jan 12, 2015 at 02:29:53PM -0700, Jeff Law wrote:
On 01/12/15 12:59, Jakub Jelinek wrote:
Hi!
As mentioned in the PR, giving up for all vector mode extensions
is unnecessary, but unlike scalar integer extensions, where the low part
of the extende
On 01/13/2015 01:38 PM, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod wrote:
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
Basically we can
On 01/13/15 10:34, Martin Uecker wrote:
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law :
On 11/11/14 23:13, Martin Uecker wrote:
...
* gcc/tree-vrp.c (check_array_ref): Emit more warnings
for warn_array_bounds >= 2.
* gcc/testsuite/gcc.dg/Warray-bounds-11.c: New test-case.
* gcc/c-fami
On 01/13/15 11:01, Zamyatin, Igor wrote:
Is it really sufficient here to verify that all the defs are on latch
predecessors,
what about the case where there is a predecessor without a def. How do
you guarantee domination in that case?
ISTM that given the structure for the code you're writing
On 01/13/15 11:38, Torvald Riegel wrote:
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
On 01/13/2015 09:59 AM, Richard Biener wrote:
On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod wrote:
Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
Basically we can gene
> Sorry for the slow response. Jeff has approved the patch in the
> meantime, but I didn't want to go ahead and apply it while there
> was still disagreement...
I still think that it isn't appropriate to short-circuit the main computation
as the patch does, but I don't want to block it after Jef
Hi,
On 06/09/2014 04:46 PM, Jason Merrill wrote:
On 06/09/2014 10:32 AM, Marc Glisse wrote:
On Mon, 9 Jun 2014, Jason Merrill wrote:
On 06/09/2014 10:18 AM, Marc Glisse wrote:
I doubt the patch can be wrong, but it may be that this is a situation
that is not supposed to happen and should be
On Tue, 2015-01-13 at 10:11 -0500, Andrew MacLeod wrote:
> On 01/13/2015 09:59 AM, Richard Biener wrote:
> > On Tue, Jan 13, 2015 at 3:56 PM, Andrew MacLeod wrote:
> >> Lengthy discussion : https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59448
> >>
> >> Basically we can generate incorrect code for an
On Tue, 13 Jan 2015, Andrew Bennett wrote:
> The call-saved-{4-6}.c tests in the mips testsuite fail for micromips. The
> reason is
> that micromips uses the swm and lwm instructions to save/restore the
> call-saved registers
> rather than using the sw and lw instructions. The swm and lwm in
Nowadays, just storing the (bigendian-corrected) vector element to the address,
generates exactly the same assembler for all cases except
{float,int,uint}64x1_t, where
st1 {v0.d}[0], [x0]
becomes
str d0, [x0]
This is not a problem, and the change will be much better for optimization
through th
>
> Is it really sufficient here to verify that all the defs are on latch
> predecessors,
> what about the case where there is a predecessor without a def. How do
> you guarantee domination in that case?
>
> ISTM that given the structure for the code you're writing that you'd want to
> verify t
On Tue, Jan 13, 2015 at 10:51:27AM +0100, Richard Biener wrote:
> IMHO SHIFT_COUNT_TRUNCATED should be removed and instead
> backends should provide shift patterns with a (and:QI ...) for the
> shift amount which simply will omit that operation if suitable.
Note that that catches less though, e.g.
Mon, 12 Jan 2015 11:00:44 -0700
Jeff Law :
> On 11/11/14 23:13, Martin Uecker wrote:
...
> >
> >
> > * gcc/tree-vrp.c (check_array_ref): Emit more warnings
> > for warn_array_bounds >= 2.
> > * gcc/testsuite/gcc.dg/Warray-bounds-11.c: New test-case.
> > * gcc/c-family/c.opt: New option -
Hi,
The call-saved-{4-6}.c tests in the mips testsuite fail for micromips. The
reason is
that micromips uses the swm and lwm instructions to save/restore the call-saved
registers
rather than using the sw and lw instructions. The swm and lwm instructions
only list
the range of registers to
On 09/12/14 08:17, Yangfei (Felix) wrote:
On 28 November 2014 at 09:23, Yangfei (Felix) wrote:
Hi,
This patch converts vpmaxX & vpminX intrinsics to use builtin functions
instead of the previous inline assembly syntax.
Regtested with aarch64-linux-gnu on QEMU. Also passed the glorious
On Tue, Jan 13, 2015 at 05:06:35PM +, Richard Sandiford wrote:
> Jakub Jelinek writes:
> > Patch too large to attach uncompressed, this
> > has been created with update-copyright.py --this-year.
> > Note, I had to temporarily move away gcc/jit/docs/conf.py,
> > the python script dies on that a
Jakub Jelinek writes:
> Patch too large to attach uncompressed, this
> has been created with update-copyright.py --this-year.
> Note, I had to temporarily move away gcc/jit/docs/conf.py,
> the python script dies on that and leaves almost all files unchanged.
Thanks for doing the update. Is the p
On Tue, 13 Jan 2015 17:22:23, Jakub Jelinek wrote:
>
>
> So do you mean following? I've bootstrapped/regtested on x86_64-linux and
> i686-linux, but haven't tried any special testcases on it. If it works for
> you, I'll commit it.
>
OK.
Thanks
Bernd.
> 2015-01-13 Jakub Jelinek
>
> * sanitizer_
On Tue, Jan 13, 2015 at 05:18:19PM +0100, Jakub Jelinek wrote:
> 3) on request from Richard (which Segher on IRC argues against), "memory"
>clobber also prevents CSE;
As extend.texi used to say:
"
If your assembler instructions access memory in an unpredictable
fashion, add @samp{memory} to t
On 01/13/15 02:51, Richard Biener wrote:
On a SHIFT_COUNT_TRUNCATED target, I don't think it's ever OK to widen a
shift, variable or constant.
In the case of a variable shift, we could easily have eliminated the masking
code before or during combine. For a constant shift amount we could have
ad
Hi Richard.
I'm chasing my tail here looking at an LTO + debug problem, and for the
life of me I can't figure out how all this partition business affects a
symbol's `analyzed' bit. Anyways... the documentation for all these
functions is wrong.
Can you look at this patch and tell me if it ma
On 13 January 2015 at 16:06, Prathamesh Kulkarni
wrote:
> On 13 January 2015 at 15:34, Richard Biener wrote:
>> On Sun, 11 Jan 2015, Prathamesh Kulkarni wrote:
>>
>>> Hi,
>>> This is a revamped expr.h flattening flattening patch rebased on
>>> tree.h and tree-core.h flattening patch (r219402).
>>
Jakub Jelinek wrote:
> With VALUE attr, the PARM_DECLs hold the values and thus are (usually) not
> read-only, therefore telling the middle-end they are read-only leads to
> invalid IL.
>
> Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
> trunk?
OK. Thanks for the pat
We ICE on this testcase, because the usage of #pragma GCC ivdep
pulls in the ANNOTATE internal functions which don't have underlying
fndecls, hence we segv on a NULL_TREE. This patch makes get_attrs_for
be prepared for such a scenario. The callers of get_attrs_for already
check for NULL_TREE. I
Hi!
With VALUE attr, the PARM_DECLs hold the values and thus are (usually) not
read-only, therefore telling the middle-end they are read-only leads to
invalid IL.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?
2015-01-13 Jakub Jelinek
PR fortran/64
> Hello.
>
> Following patch adds support for target and optimization nodes comparison,
> which is
> based on Honza's newly added infrastructure.
>
> Apart from that, there's a small hunk that corrects formatting and removes
> unnecessary
> call to a comparison function.
>
> Hope it can be app
On Mon, Jan 12, 2015 at 09:55:15PM +0100, Jakub Jelinek wrote:
> > specific changes from there.
>
> Yes, I'll try to cherry-pick those tomorrow.
>
> > I am especially interested in fixing these two issues, but there may be
> > other important improvements too:
> >
> >
> > https://gcc.gnu.org/b
Hi!
My PR60663 fix unfortunately stopped CSE of all inline-asms, even when
they e.g. only have the clobbers added by default.
This patch attempts to restore the old behavior, with the exceptions:
1) as always, asm volatile is not CSEd
2) inline-asm with multiple outputs are not CSEd
3) on request
On Mon, Jan 12, 2015 at 02:29:53PM -0700, Jeff Law wrote:
> On 01/12/15 12:59, Jakub Jelinek wrote:
> >Hi!
> >
> >As mentioned in the PR, giving up for all vector mode extensions
> >is unnecessary, but unlike scalar integer extensions, where the low part
> >of the extended value is the original val
On 13/01/15 15:58, Renlin Li wrote:
> Hi all,
>
> This patch update CLZ_DEFINED_VALUE_AT_ZERO and
> CTZ_DEFINED_VALUE_AT_ZERO to make them return 2 in
> arm back-end.
>
> Here are the explanations from GCC documentation:
>
> CLZ_DEFINED_VALUE_AT_ZERO (mode, value)
> CTZ_DEFINED_VALUE_AT_ZERO (m
Hi all,
This patch update CLZ_DEFINED_VALUE_AT_ZERO and
CTZ_DEFINED_VALUE_AT_ZERO to make them return 2 in
arm back-end.
Here are the explanations from GCC documentation:
CLZ_DEFINED_VALUE_AT_ZERO (mode, value)
CTZ_DEFINED_VALUE_AT_ZERO (mode, value)
A C expression that indicates whether the
On 13/01/15 15:53, Renlin Li wrote:
> Hi all,
>
> This is a backport patch for
> https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=213864
>
> arm-none-eabi regression test has been done, no new issues.
> Okay for branch 4.8?
>
> gcc/ChangeLog
> Fix PR target/61413
> Backport from mainline.
Hi all,
This is a backport patch for
https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=213864
arm-none-eabi regression test has been done, no new issues.
Okay for branch 4.8?
gcc/ChangeLog
Fix PR target/61413
Backport from mainline.
2014-08-12 Ramana Radhakrishnan
PR target/61413
On 01/13/2015 07:35 AM, H.J. Lu wrote:
> Can I apply it to GCC trunk?
Please.
r~
* gcc.target/aarch64/advsimd-intrinsics/vmull_n.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_n.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_n.c
new file mode 100644
index 000..df28a94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/
On Mon, Jan 12, 2015 at 5:13 PM, Richard Henderson wrote:
> On 01/12/2015 04:57 PM, H.J. Lu wrote:
>> The problem is my x86_64-*-linux-gnux32 patch
>>
>> https://gcc.gnu.org/ml/gcc-patches/2012-08/msg01083.html
>>
>> was never accepted upstream. Can I apply it to config.guess
>> in GCC?
>
> Ah.
On 01/13/2015 10:20 AM, Torvald Riegel wrote:
On Tue, 2015-01-13 at 09:56 -0500, Andrew MacLeod wrote:
The problem with the patch in the PR is the memory model is immediately
promoted from consume to acquire. This happens *before* any of the
memmodel checks are made. If a consume is illegall
On 01/12/2015 09:38 PM, Kaz Kojima wrote:
> 2015-01-13 Kaz Kojima
>
> * configure.host: Remove extra brackets for sh.
Ok, thanks.
r~
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vtrn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vuzp.c: Use code from
vshuffle.inc.
* gcc.target/aarch64/advsimd-intrinsics/vzip.c: Use code fro
* gcc.target/aarch64/advsimd-intrinsics/vmlX.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmla.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmls.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlX.inc
b/gcc/testsuite/gcc.ta
On Tue, 2015-01-13 at 09:56 -0500, Andrew MacLeod wrote:
> The problem with the patch in the PR is the memory model is immediately
> promoted from consume to acquire. This happens *before* any of the
> memmodel checks are made. If a consume is illegally specified (such as
> in a compare_exch
* gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c
new file mode 100644
index 000..12f2a6b
--- /dev/null
+++ b/gcc/testsu
* gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: New file.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull.c
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull.c
new file mode 100644
index 000..e71a624
--- /dev/null
+++ b/gcc/testsuite/gcc.target/
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