Attached is an extended version of the patch, it brings a 100% improvement in
make -j32 -k check-gcc (down from 20min to <10min) by modification of
check_gcc_parallelize.
It includes one non-trivial part, namely a split of the target exps. They are
now all split using a common choice (based on
Alessandro Fanfarillo wrote:
This email follows the previous without subject (sorry about that).
I think I'd prefer the following patch, which avoids a temporary if none
is required. "value" is a pointer if the kind is the same (see kind
check before) and if it is not a literal. Otherwise, it
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, September 05, 2014 12:45 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, ira] Miss checks in split_live_ranges_for_shrink_wrap
>
> On 09/01/14 02:13, Zhenqiang Chen wrote:
> >
> >
On 09/07/2014 11:26 PM, Tobias Burnus wrote:
> sorry for the slow review.
No problem. I've been focusing on the subroutine clause lately.
> On 22 August 2014 17:08, Cesar Philippidis wrote:
>>> In OpenMP, one has (OMP 4.0, 2.14.3): "A list item that specifies a
>>> given variable may not appear
> On 09/08/2014 03:51 PM, Jan Hubicka wrote:
> >You did not attach the patch.
>
> Oops.
OK,
thanks!
Honza
>
>
> commit e57303b73d20fa75ffc535bbc219dc0f6472e431
> Author: Jason Merrill
> Date: Mon Sep 8 13:11:58 2014 -0400
>
> PR c++/61214
> PR c++/62224
> gcc/
> * gim
On 09/05/14 02:00, Richard Biener wrote:
[jason: C++ questions throughout.]
On Fri, Sep 5, 2014 at 4:38 AM, Aldy Hernandez wrote:
On 09/04/14 03:42, Richard Biener wrote:
On Wed, Sep 3, 2014 at 7:54 PM, Aldy Hernandez wrote:
I meant that LATE_WRITE_GLOBALS shouldn't be a langhook
at all
On Sat, 6 Sep 2014, Andreas Schwab wrote:
> Mike Stump writes:
>
> > Index: config/pa/pa64-hpux.h
> > ===
> > --- config/pa/pa64-hpux.h (revision 214981)
> > +++ config/pa/pa64-hpux.h (working copy)
> > @@ -336,7 +336,7 @@ do {
When reload decides it needs to reload something that was assigned a
register before it will only look at the contraint, not the predicate.
This means that for the *bool3 I added with predicate logical_operand
(that is registers, and unsigned numbers that have only the low 16 or next
16 bits set) a
This email follows the previous without subject (sorry about that).
The attached patch solves the problem raised by the following code:
program atomic
use iso_fortran_env
implicit none
integer :: me
integer(atomic_int_kind) :: atom[*]
me = this_image()
call atomic_define(atom[1],0)
sync all
call
On Tue, Sep 2, 2014 at 1:40 PM, Richard Henderson wrote:
> On 06/20/2014 05:17 PM, Sriraman Tallam wrote:
>> Index: config/i386/i386.c
>> ===
>> --- config/i386/i386.c(revision 211826)
>> +++ config/i386/i386.c(working
Thanks, your suggestion fixes the problem.
I just noticed that I missed the subject description; I'll send the
new patch in a different email.
2014-09-08 15:50 GMT-06:00 Tobias Burnus :
> Alessandro Fanfarillo wrote:
>
> the following code produces a wrong invocation to libcaf for
> caf_atomic_op
gcc/ChangeLog:
* rtl.h (single_set_2): Strengthen first param from const_rtx to
const rtx_insn *, and move prototype to above...
(single_set): ...this. Convert this from a macro to an inline
function, enforcing the requirement that the param is a const
rtx_i
gcc/
* rtl.h (INSN_LOCATION): Strengthen param from const_rtx to
const rtx_insn *, and from rtx to rtx_insn * for the other
overloaded variant.
(RTL_LOCATION): Add a checked cast to rtx_insn * when invoking
INSN_LOCATION, since we know INSN_P holds.
(
gcc/ChangeLog:
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_
gcc/
* ira.c (ira_update_equiv_info_by_shuffle_insn): Use NULL rather
than NULL_RTX.
(no_equiv): Likewise.
(update_equiv_regs): Likewise.
(setup_reg_equiv): Likewise. Strengthen locals "elem",
"prev_elem", "next_elem" from rtx to rtx_insn_list *, and
gcc/ChangeLog:
* combine.c (try_combine): Eliminate checked cast on result of
gen_rtx_INSN.
* emit-rtl.c (gen_rtx_INSN): New function, improving over the prior
autogenerated one by strengthening the return type and params 2 and 3
from rtx to rtx_insn *, and b
Here's another 5 patches that make use of rtx_def subclasses, which
are non-trivial enough *not* to fall under the pre-approval Jeff
granted.
In particular, patches 4 and 5 update the signature of recog_memoized
and single_set respectively to require an rtx_insn * rather than
just an rtx. These l
Dear all,
the following code produces a wrong invocation to libcaf for
caf_atomic_op (atomic_add):
program atomic
use iso_fortran_env
implicit none
integer :: me
integer(atomic_int_kind) :: atom[*]
me = this_image()
call atomic_define(atom[1],0)
sync all
call ATOMIC_ADD (atom[1], me)
if(me == 1)
The attached trivial patch updates the signature of control_flow_insn_p,
since all in-tree users now pass in an rtx_insn * rather than just an
rtx.
This falls under the pre-approval granted by Jeff here:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01310.html
Bootstrapped on x86_64-unknown-lin
The attached patch to gcse.c merely strengthens various things from rtx
to rtx_insn *, and thus falls under the pre-approval granted by Jeff
here:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01310.html
Bootstrapped on x86_64-unknown-linux-gnu (Fedora 20), and has been
rebuilt as part of a conf
In this testcase, asking for the value of the static data member
involves instantiating Derived in order to look up X::Type, which
instantiation depends on the value of the static data member. But the
recursion ends there, since the second time through we just try to look
it up in the partiall
On 09/08/2014 03:51 PM, Jan Hubicka wrote:
You did not attach the patch.
Oops.
commit e57303b73d20fa75ffc535bbc219dc0f6472e431
Author: Jason Merrill
Date: Mon Sep 8 13:11:58 2014 -0400
PR c++/61214
PR c++/62224
gcc/
* gimple-fold.c (can_refer_decl_in_current_unit_p): Do
> My fix for 61214 to clear DECL_EXTERNAL on inline virtual functions
> when devirtualizing caused 62224: devirtualizing and inlining such a
> function in the testcase causes an additional external reference,
> which in the submitter's library is to a hidden symbol.
>
> I think this is what we wan
> > Minor bit of docs for an msp430 option. OK for trunk and 4.9 branch?
>
> Ok.
>
> > * doc/invoke.texi (MSP430 Options): Add -minrt.
Thanks! Committed.
My fix for 61214 to clear DECL_EXTERNAL on inline virtual functions when
devirtualizing caused 62224: devirtualizing and inlining such a function
in the testcase causes an additional external reference, which in the
submitter's library is to a hidden symbol.
I think this is what we want for 5.
On September 8, 2014 9:09:56 PM CEST, Jakub Jelinek wrote:
>Hi!
>
>Cong's patch fixes these two PRs, I've bootstrapped/regtested the
>backport
>on 4.8 branch together with the new tests, ok for 4.8?
>Are the new tests ok for trunk/4.9?
OK.
Thanks,
Richard.
>2014-09-08 Jakub Jelinek
>
>
Hi!
Cong's patch fixes these two PRs, I've bootstrapped/regtested the backport
on 4.8 branch together with the new tests, ok for 4.8?
Are the new tests ok for trunk/4.9?
2014-09-08 Jakub Jelinek
PR tree-optimization/60196
PR tree-optimization/63189
Backported from main
Hi!
I've backported this fix to 4.8 branch, acked by Vlad on IRC,
bootstrapped/regtested on x86_64-linux and i686-linux, committed to 4.8
branch.
2014-09-08 Jakub Jelinek
Backported from mainline
2014-08-06 Vladimir Makarov
PR debug/61923
* haifa-sched.c (a
Hi,
On 05 Sep 19:09, Ilya Verbin wrote:
> I hope that it will not affect the regular LTO compilation. At least, the
> 'make check' did not reveal any regression on the system with linker plugin.
I found that relying on -flto option in lto-wrapper was a bad idea.
E.g., this simple case is not wor
Rainer Orth writes:
> Hi Richard,
>> Several targets define a function like i386's get_some_local_dynamic_name.
>> The function looks through the current output function and returns the first
>> (arbitrary) local-dynamic symbol that it finds. The result can be used in
>> a call to __tls_get_addr,
On Sat, Sep 6, 2014 at 1:50 PM, Bill Schmidt
wrote:
> Hi,
>
> Here's one more case of special handling that allows us to optimize more
> vectorized loops in analyze_swaps. UNSPEC_VSPLT_DIRECT is used in some
> cases to avoid the possibility of an endian fixup. We can still handle
> this by swapp
> Thanks! Jakub noticed a potential problem in this area a while back,
> but I never came up with any code to trigger and have kept that issue on
> my todo list ever since.
>
> Rather than ensuring the inserted copy write a single register, it seems
> to me we're better off ensuring that the numb
avr-gcc puts jump tables in section .progmem.gcc_sw_table and assumes that
.text starts at 0, i.e. LPM is on order to read table entries.
This is no more the case if .text starts ata higher address like typically used
with boot loaders.
This patch adds the few instructions to set RAMPZ and ma
Now that float64x1 is a vector type, we can convert between it and other
same-sized vector types with a simple cast, as is already done for all other
reinterprets not involving float64x1.
This allows to remove the reinterpretv1df and reinterpret<*>v1df builtins in
aarch64-simd-builtins.def, an
The vset(q?)_lane_XXX intrinsics are presently implemented using inline asm
blocks containing "ins" instructions - which are opaque to the mid-end. This
patch replaces them with simple writes using gcc vector extension operations,
with a lane-flip on bigendian (where ARM intrinsic lanes are inde
This adds a test thath checks the result of a vset_lane intrinsic is identical
to the input apart from one value being changed.
Test checks only one index per vset_lane_xxx in a somewhat adhoc fashion as the
index has to be a compile-time immediate and I felt that doing a loop using
macros did
On 8 September 2014 16:36, Venkataramanan Kumar
wrote:
> Hi Marcus,
>
> I up streamed the changes to trunk.
>
> There is no support for stack protection in FSF GCC 4.9 branch yet.
Quite right, ignore my back port request.
Cheers
/Marcus
Similarly, the ushr_n_u64 and ushrd_n_u64 intrinsics, allow to perform an
unsigned-shift-right of a 64-bit value by 64 places. This is not supported by
the standard lshr pattern, which masks the shift amount with 63. However, a
shift-by-64 always produces zero, so this patch moves in a constant
Patch attached.
Alan Lawrence wrote:
The sshr_n_64 intrinsics allow performing a signed shift right by 64 places. The
standard ashrdi3 pattern masks the sign amount with 63, so cannot be used.
However, such a shift fills the result by the sign bit, which is identical to
shifting right by 63. T
The sshr_n_64 intrinsics allow performing a signed shift right by 64 places. The
standard ashrdi3 pattern masks the sign amount with 63, so cannot be used.
However, such a shift fills the result by the sign bit, which is identical to
shifting right by 63. This patch just simplifies the code to s
Hmmm, thanks for the heads-up. Now reproduced. Looks like a TCL regexp issue,
should have a fix shortly.
Cheers,
--Alan
Christophe Lyon wrote:
Hi Alan,
In my cross-testing I've noticed that your new test:
gcc.target/aarch64/simd/int_comparisons_1.c scan-assembler-not not
is PASS for targets aa
Ping.
Original Message
Subject: Re: [PATCH] Fix libbacktrace and libiberty tests fail on
sanitized GCC due to wrong link options.
Date: Mon, 01 Sep 2014 12:33:09 +0400
From: Maxim Ostapenko
To: Jakub Jelinek
CC: Bernhard Reutner-Fischer , Yury Gribov
, GCC Patche
Hi Marcus,
I up streamed the changes to trunk.
There is no support for stack protection in FSF GCC 4.9 branch yet.
So I need to back port r209712 and this change together.
regards,
Venkat.
On 5 September 2014 21:17, Marcus Shawcroft wrote:
> On 4 September 2014 19:19, Venkataramanan Kumar
>
On 09/08/2014 05:04 PM, Pierre-Marie de Rodat wrote:
It updates statements and shell commands to get/update/combine Binutils
sources, which are now managed under a Git repository.
Here is an update: Tristan pointed out on the other thread that the code
for the simulators (formerly in src/sim)
On 09/08/2014 10:24 AM, Chen Gang wrote:
> On 09/07/2014 11:17 PM, Chen Gang wrote:
>>> On 8/13/14 23:10, Michael Eager wrote:
On 07/06/14 03:26, Chen Gang wrote:
>
>* microblaze/mocroblaze.md (call_value_intern): Use 'SI' instead of
>'VOID' for operand 1, just like 'call_i
This patch adds a destructor to target_ira_int, so that the data structures
it points to are freed when the parent target_globals is freed. It fixes
a memory leak with non-default subtargets.
Tested on x86_64-linux-gnu. OK to install?
Thanks,
Richard
gcc/
* ira.h (ira_finish_once): De
This is a prerequisite for a cleaned-up version of the patch in:
https://gcc.gnu.org/ml/gcc/2014-03/msg00163.html . Thanks to Trevor's
recent(ish) changes, it's now possible for GC structures to have
destructors. This means that we can go back to xmalloc()ing the parts
of target_globals that don'
The patch below is following up the "Trouble trying to test GCC on a
simulator" thread I started on g...@gcc.gnu.org.
It updates statements and shell commands to get/update/combine Binutils
sources, which are now managed under a Git repository.
The updated page has been validated as XHTML 1.0
On Mon, 8 Sep 2014, Richard Biener wrote:
> On Fri, 5 Sep 2014, Richard Biener wrote:
>
> > On Wed, 3 Sep 2014, Richard Biener wrote:
> >
> > >
> > > Ok, so with recent activity in that mgrid bug (PR55334) I tried
> > > to remember what solution we thought of after determining that
> > > ADD_RE
Hi all,
Kasan developers has asked for an option to override offset of Asan
shadow memory region. This should simplify experimenting with memory
layouts on 64-bit architectures.
I've bootstrapped and regtested this on x64.
Ok to commit?
-Y
commit 95d37bbfcb9f7e35c64f3b708b120d70f220e1d2
Aut
On Mon, 8 Sep 2014, Richard Biener wrote:
>
> The following patch makes sure we don't inline / copy a CFG with
> loops needing fixups. In the particular case function versioning
> after IPA-CP made a CFG portion dead, removing a loop.
>
> The patch also makes the bogus loop removal detection un
Pushed as r215015.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.c
(aarch64_types_cmtst_qualifiers, TYPES_TST): Remove as unused.
-
Index: gcc/config/aarch64/aarch64-builtins.c
===
--- gcc/config/aarch64/aar
On 5 September 2014 15:28, Alan Lawrence wrote:
> Some manual editing of patch required due to e.g. int64x1 changes present on
> trunk but not on the 4.9 branch; new patch attached.
>
> I've done a quick smoke test of aarch64.exp+simd.exp (check-gcc) and the g++
> neon ABI test, as these ought to
On 05/09/14 20:48, Jeff Law wrote:
On 09/04/14 08:15, Jiong Wang wrote:
this patch relax the restriction on src to accept any one of the following:
+ REG
+ CONST_OBJ, like SYMBOL_REF
+ combination of single REG and any other CONST_OBJs.
(reg def/use calculation will not affect
ping!
On Mon, Sep 1, 2014 at 11:30 AM, Kito Cheng wrote:
> Hi all:
>
> In arm-*-elf target some variable will missing size directive,
>
> for example:
>
> foo.c:
>
> void foo (void) {
> static char bufbuf[8];
> }
>
> $ arm-none-eabi-gcc ./foo.c -S -o -
>
> ...
> .align 2
> bufbuf.4078:
> .spac
ping!
On Tue, Sep 2, 2014 at 12:37 AM, Kito Cheng wrote:
> Hi Joseph:
>
> Thanks for your review, I've reverted the part of gsyslimits.h,
> here is updated patch and ChangeLog :)
>
> bootstrap ok for x86_64
>
> 2014-09-01 Kito Cheng
>
> except.h: Fix header guard.
> addresses.h: Add mi
(No regressions in check-gcc or check-g++ on aarch64-none-elf.)
--Alan
Alan Lawrence wrote:
Some manual editing of patch required due to e.g. int64x1 changes present on
trunk but not on the 4.9 branch; new patch attached.
I've done a quick smoke test of aarch64.exp+simd.exp (check-gcc) and th
On Fri, Aug 15, 2014 at 2:02 PM, Yuri Rumyantsev wrote:
> Richard!
> Here is updated patch with the following changes:
>
> 1. Any restrictions on phi-function were eliminated for extended conversion.
> 2. Put predicate for critical edges to 'aux' field of edge, i.e.
> negate_predicate was deleted
Hi Alan,
In my cross-testing I've noticed that your new test:
gcc.target/aarch64/simd/int_comparisons_1.c scan-assembler-not not
is PASS for targets aarch64-none-elf and aarch64_be-none-elf, but
FAIL for aarch64-none-linux-gnu.
It seems this is not what you saw in your own validations?
Christoph
Hi Jan-Benedict,
2014-09-04 Jan-Benedict Glaw
* config/rx/rx.h (HARD_REGNO_MODE_OK): Add braces.
Approved - please apply - thanks!
Cheers
Nick
Hi Richard,
> Several targets define a function like i386's get_some_local_dynamic_name.
> The function looks through the current output function and returns the first
> (arbitrary) local-dynamic symbol that it finds. The result can be used in
> a call to __tls_get_addr, since all local-dynamic s
Hi Vladimir,
Sorry, I forgot to CC you on this as it's your code. It's my first attempt at
submitting patches to gcc so I'm still learning as I go!
Kind Regards,
David Sherwood.
-Original Message-
From: David Sherwood [mailto:david.sherw...@arm.com]
Sent: 05 September 2014 15:52
To: 'gc
This adds a test of all the variants of vst2, vst2q, vst3, vst3q, vst4, and
vst4q. These all use typexNxM structs and the OI/CI/XImode mechanism, so the
test cross-checks this against plain ol' vld1(q?).
Cross-tested on aarch64-none-elf (passing), also on aarch64_be-none-elf (failing
as per h
Richard,
Did you have a chance to look at this?
Thanks.
2014-08-15 16:02 GMT+04:00 Yuri Rumyantsev :
> Richard!
> Here is updated patch with the following changes:
>
> 1. Any restrictions on phi-function were eliminated for extended conversion.
> 2. Put predicate for critical edges to 'aux' fie
At present there is no test coverage of the vld2_lane, vld2q_lane, vld3_lane,
vld3q_lane, vld4_lane, vld4q_lane intrinsics. So this adds a test using the vld1
and vst1 intrinsics.
Passing on aarch64-none-elf.
Failing on aarch64_be-none-elf; I believe because the intrinsic is [modifying
the] w
This adds a test of the vld2_dup, vld2q_dup, vld3_dup, vld3q_dup, vld4_dup and
vld4q_dup instrinsics.
Passing on aarch64-none-elf and aarch64_be-none-elf.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vldN_dup_1.c: New test.diff --git a/gcc/testsuite/gcc.target/aarch64/vldN_dup_1.c b/g
The existing vld1/vst1_1.c test in gcc.target/aarch64 covers only vld1_s8 and
vld1q_s16. This extends it to cover all int/float variants via token-pasting.
Passing on aarch64-none-elf and aarch64_be-none-elf.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/vld1-vst1_1.c: Rewrite to test
This adds a test of all the variants of vld2, vld2q, vld3, vld3q, vld4, and
vld4q. These all use typexNxM structs and the OI/CI/XImode mechanism, so the
test cross-checks this against plain ol' vst1(q?).
Cross-tested on aarch64-none-elf (passing), also on aarch64_be-none-elf
(https://gcc.gnu.o
Hi all,
The included testcase currently ICEs at -O0 because vget_lane_f64 is a
function, so if it's properly called with a constant argument but without
constant propagation it will not be recognised as constant, causing an ICE.
This patch changes it to use the macro version directly.
I think
The following patch makes use of the new multi-id for in builtin
math fn patterns related to POW to show how we can address the
usual triplets of fnF, fn, fnL simplifications with it. It's
still quite explicit of course.
The patch also supplies locations to some parser error calls
and removes a
On Sun, Sep 7, 2014 at 11:53 PM, Prathamesh Kulkarni
wrote:
> Changes syntax of for pattern to:
> (for op (list1...) op2 (list2...) opN (listN...)
>patterns)
>
> Number of operator substitutions must be same.
Indeed.
Thanks - applied.
Richard.
> * genmatch.c (peek_ident): Change id to defa
On Fri, 5 Sep 2014, Richard Biener wrote:
> On Wed, 3 Sep 2014, Richard Biener wrote:
>
> >
> > Ok, so with recent activity in that mgrid bug (PR55334) I tried
> > to remember what solution we thought of after determining that
> > ADD_RESTRICT is a no-go.
> >
> > The following very prototypish
PING
On Wed, Aug 27, 2014 at 7:50 PM, Evgeny Stupachenko wrote:
> The rotate insn appeared right after expand.
> I've done it similar to define_insn_and_split "*avx_vperm_broadcast_".
> I don't see any potential losses on splitting that after reload.
>
> On Tue, Aug 26, 2014 at 8:29 PM, Richard H
On Sun, Sep 7, 2014 at 11:50 AM, Kugan
wrote:
> On 05/09/14 19:50, Richard Biener wrote:
>
>> Well - the best way would be to expose the target specifics to GIMPLE
>> at some point in the optimization pipeline. My guess would be that it's
>> appropriate after loop optimizations (but maybe before
Hi!
On Fri, 5 Sep 2014 18:35:23 +0200, Bernd Schmidt
wrote:
> This removes some remnants from the accel-gcc support that turned out
> not to be viable for ptx. Ilya Verbin has confirmed the patch doesn't
> break their setup either, so I've committed it on the branch.
In gomp-4_0-branch's rr21
On Sun, Sep 7, 2014 at 7:36 PM, John David Anglin wrote:
> The attached patch fixes bootstrap on hpux which doesn't have the atoll
> function.
>
> Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11.
>
> OK for trunk?
"ll" is not portable (it's GNU), I think BSD uses "q" and windows may
use s
On Sat, Sep 6, 2014 at 12:07 AM, Joseph S. Myers
wrote:
> This patch replaces the target macros SF_SIZE, DF_SIZE, XF_SIZE and
> TF_SIZE, used to tell libgcc the number of bits in the mantissas of
> floating-point modes, with __LIBGCC_SF_MANT_DIG__ etc. macros defined
> if -fbuilding-libgcc for all
On Fri, Sep 5, 2014 at 11:16 PM, DJ Delorie wrote:
>
> Minor bit of docs for an msp430 option. OK for trunk and 4.9 branch?
Ok.
Thanks,
Richard.
> * doc/invoke.texi (MSP430 Options): Add -minrt.
>
> Index: doc/invoke.texi
> ==
On Fri, Sep 5, 2014 at 7:21 PM, Joseph S. Myers wrote:
> This patch removes some fp-bit target macros that are no longer
> needed:
>
> * __make_dp was not really designed as a target macro, but CRIS
> defined it in cris.h anyway for optimization purposes (so making it
> show up on lists of tar
The following patch makes sure we don't inline / copy a CFG with
loops needing fixups. In the particular case function versioning
after IPA-CP made a CFG portion dead, removing a loop.
The patch also makes the bogus loop removal detection unconditional
as gengtype doesn't seem to be able to hand
On Fri, 5 Sep 2014, Andreas Schwab wrote:
> Richard Biener writes:
>
> > 2014-09-05 Richard Biener
> >
> > * cfgloop.c (mark_loop_for_removal): Record former header
> > when ENABLE_CHECKING.
> > * cfgloop.h (strut loop): Add former_header member when
> > ENABLE_CHECKING.
> >
On Fri, Aug 29, 2014 at 07:16:55PM +0200, Manuel López-Ibáñez wrote:
> On 19 August 2014 00:06, Joseph S. Myers wrote:
> > On Tue, 12 Aug 2014, Marek Polacek wrote:
> >
> >> This then is the version with both issues fixed (and new test).
> >>
> >> Bootstrapped/regtested on x86_64-linux, ok for tru
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