[gcc r16-3806] testsuite: Add tests for PR c/107419 and PR c++/107393

2025-09-20 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:9eab6c6f223808ceeebb55b5453c75782224cd9e commit r16-3806-g9eab6c6f223808ceeebb55b5453c75782224cd9e Author: H.J. Lu Date: Mon Sep 8 15:10:02 2025 -0700 testsuite: Add tests for PR c/107419 and PR c++/107393 Both C and C++ frontends should set a tentative TLS m

[gcc r16-3841] lra: Stop constraint processing on error [PR121205]

2025-09-19 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f8b6f1d83ba8fd4186100e1e357ba7eb8124bdb7 commit r16-3841-gf8b6f1d83ba8fd4186100e1e357ba7eb8124bdb7 Author: Stefan Schulze Frielinghaus Date: Thu Jul 24 12:03:43 2025 +0200 lra: Stop constraint processing on error [PR121205] It looks like we didn't have a test

[gcc r16-3857] x86: Don't align destination for a single instruction

2025-09-17 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:32b8d1312382e3f179df4f76eca840486d6608e8 commit r16-3857-g32b8d1312382e3f179df4f76eca840486d6608e8 Author: H.J. Lu Date: Sat Sep 13 06:38:44 2025 -0700 x86: Don't align destination for a single instruction If a single instruction can store or move the whole b

[gcc r16-3829] sparc: Compile TLS LD tests with -fPIC

2025-09-12 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:5d6ddba76434a9f0dc105d2e6c38954739ccbcb6 commit r16-3829-g5d6ddba76434a9f0dc105d2e6c38954739ccbcb6 Author: H.J. Lu Date: Wed Sep 10 05:12:31 2025 -0700 sparc: Compile TLS LD tests with -fPIC After commit 8cad8f94b450be9b73d07bdeef7fa1778d3f2b96 A

[gcc r16-3804] c++: Don't upgrade TLS model if TLS model isn't set.

2025-09-11 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:0b0ffa44c1881a52e5c624d369a090403919e61a commit r16-3804-g0b0ffa44c1881a52e5c624d369a090403919e61a Author: H.J. Lu Date: Wed Sep 10 12:47:47 2025 -0700 c++: Don't upgrade TLS model if TLS model isn't set. Don't upgrade TLS model when cplus_decl_attributes is

[gcc r16-3809] pr107421.f90: Require PIE and pass -fPIE for non-x86 targets

2025-09-11 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:46028a2f40329bbc6a7d7638b5bab6b3bb282009 commit r16-3809-g46028a2f40329bbc6a7d7638b5bab6b3bb282009 Author: H.J. Lu Date: Mon Sep 8 07:47:35 2025 -0700 pr107421.f90: Require PIE and pass -fPIE for non-x86 targets -mno-direct-extern-access is used to disable di

[gcc r16-3678] x86: Enable SSE4.1 ceil/floor/trunc for -Os

2025-09-09 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:1d1396559e2683c849fb5dba5c8f56f2a4a1ff64 commit r16-3678-g1d1396559e2683c849fb5dba5c8f56f2a4a1ff64 Author: H.J. Lu Date: Mon Sep 8 13:19:45 2025 -0700 x86: Enable SSE4.1 ceil/floor/trunc for -Os Enable SSE4.1 ceil/floor/trunc for -Os to replace a function cal

[gcc r16-3673] c: Update TLS model after processing a TLS variable

2025-09-08 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:8cad8f94b450be9b73d07bdeef7fa1778d3f2b96 commit r16-3673-g8cad8f94b450be9b73d07bdeef7fa1778d3f2b96 Author: H.J. Lu Date: Fri Sep 5 15:40:51 2025 -0700 c: Update TLS model after processing a TLS variable Set a tentative TLS model in grokvardecl and update TLS

[gcc r16-3637] c++: Update TLS model after processing a TLS variable

2025-09-07 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:a0344144dbf039f431a368f486f9dc6813ab commit r16-3637-ga0344144dbf039f431a368f486f9dc6813ab Author: H.J. Lu Date: Thu Jul 31 07:38:48 2025 -0700 c++: Update TLS model after processing a TLS variable Set a tentative TLS model in grokvardecl and update T

[gcc r16-3471] x86-64: Use UNSPEC_DTPOFF to check source operand in TLS64_COMBINE

2025-08-30 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:e91990c1bcafdbb026c28297ac2b84c597a22b22 commit r16-3471-ge91990c1bcafdbb026c28297ac2b84c597a22b22 Author: H.J. Lu Date: Fri Aug 29 16:48:44 2025 -0700 x86-64: Use UNSPEC_DTPOFF to check source operand in TLS64_COMBINE Since the first operand of PLUS in the s

[gcc r16-3458] x86-64: Improve source operand check for TLS_CALL

2025-08-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:62843b3453ee30f77ceb7e09769e0cea9920a2cd commit r16-3458-g62843b3453ee30f77ceb7e09769e0cea9920a2cd Author: H.J. Lu Date: Wed Aug 27 19:14:13 2025 -0700 x86-64: Improve source operand check for TLS_CALL Source operands of 2 TLS_CALL patterns in (insn

[gcc r16-3460] x86: Allow by_pieces op when expanding memcpy/memset epilogue

2025-08-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:881df7a0b1e8e8c1454309fe23c0edd026296b8b commit r16-3460-g881df7a0b1e8e8c1454309fe23c0edd026296b8b Author: H.J. Lu Date: Thu Aug 28 17:55:46 2025 -0700 x86: Allow by_pieces op when expanding memcpy/memset epilogue Since commit 401199377c50045ede560da

[gcc r16-3459] x86: Handle constant in any modes in setmem_epilogue_gen_val

2025-08-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:207a506ee50d6510ff4c53db39a52ba1082842e4 commit r16-3459-g207a506ee50d6510ff4c53db39a52ba1082842e4 Author: H.J. Lu Date: Thu Aug 28 20:30:35 2025 -0700 x86: Handle constant in any modes in setmem_epilogue_gen_val Since the constant passed to setmem_epilogue_g

[gcc r16-3409] x86-64: Emit the TLS call after debug marker

2025-08-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:a9509987d137bea52b7df8adc58c2c89902fb937 commit r16-3409-ga9509987d137bea52b7df8adc58c2c89902fb937 Author: H.J. Lu Date: Tue Aug 26 15:29:25 2025 -0700 x86-64: Emit the TLS call after debug marker For a basic block with only a debug marker: (note 3 0

[gcc r16-3408] Move pr121656.c to gcc.dg/torture

2025-08-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:775ecdb237d312e82fa5f3bcd6a5b8693249524a commit r16-3408-g775ecdb237d312e82fa5f3bcd6a5b8693249524a Author: H.J. Lu Date: Tue Aug 26 15:56:47 2025 -0700 Move pr121656.c to gcc.dg/torture Move pr121656.c to gcc.dg/torture and replace weak attribute with noipa

[gcc r16-3380] Add a test for PR tree-optimization/121656

2025-08-25 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:1b6b27536311afefaebf57ff77ed20a8bb41eadd commit r16-3380-g1b6b27536311afefaebf57ff77ed20a8bb41eadd Author: H.J. Lu Date: Mon Aug 25 08:20:00 2025 -0700 Add a test for PR tree-optimization/121656 PR tree-optimization/121656 * gcc.dg/pr12165

[gcc r16-3356] x86: Compile noplt-(g|l)d-1.c with -mtls-dialect=gnu

2025-08-23 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:05b1727c06b70386988182259f461bf7e5b239dc commit r16-3356-g05b1727c06b70386988182259f461bf7e5b239dc Author: H.J. Lu Date: Sat Aug 23 12:50:33 2025 -0700 x86: Compile noplt-(g|l)d-1.c with -mtls-dialect=gnu Compile noplt-gd-1.c and noplt-ld-1.c with -mtls-diale

[gcc r16-3345] Emit the TLS call after NOTE_INSN_FUNCTION_BEG

2025-08-22 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:e12208722dabdad25cc13bb580991b5bf511a104 commit r16-3345-ge12208722dabdad25cc13bb580991b5bf511a104 Author: H.J. Lu Date: Fri Aug 22 05:56:42 2025 -0700 Emit the TLS call after NOTE_INSN_FUNCTION_BEG For the beginning basic block: (note 4 0 2 2 [bb 2]

[gcc r16-3327] x86-64: Emit the TLS call after NOTE_INSN_BASIC_BLOCK

2025-08-21 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:7dfb3a59fea4a9f423d62d8c604b6bd87cea6095 commit r16-3327-g7dfb3a59fea4a9f423d62d8c604b6bd87cea6095 Author: H.J. Lu Date: Wed Aug 20 12:45:18 2025 -0700 x86-64: Emit the TLS call after NOTE_INSN_BASIC_BLOCK For a basic block with only a label: (code_l

[gcc r16-3290] x86: Place the TLS call before all register setting BBs

2025-08-19 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:2ecaeee92414e6687ef6ce1f63fd16fcff3c5961 commit r16-3290-g2ecaeee92414e6687ef6ce1f63fd16fcff3c5961 Author: H.J. Lu Date: Sat Aug 16 14:04:33 2025 -0700 x86: Place the TLS call before all register setting BBs We can't place a TLS call before a conditional jump

[gcc r16-3235] x86: Add target("80387") function attribute

2025-08-16 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:38e8115dd2bfaa05146f8d085106189f46c25f52 commit r16-3235-g38e8115dd2bfaa05146f8d085106189f46c25f52 Author: H.J. Lu Date: Thu Aug 14 19:04:33 2025 -0700 x86: Add target("80387") function attribute Add target("80387") attribute to enable and disable x87 instruc

[gcc r16-3230] fortran: Set DECL_TLS_MODEL after processing a variable

2025-08-16 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:2e567a06555ac92105e6264fc219a2d5131e1b4e commit r16-3230-g2e567a06555ac92105e6264fc219a2d5131e1b4e Author: H.J. Lu Date: Fri Aug 1 05:00:51 2025 -0700 fortran: Set DECL_TLS_MODEL after processing a variable Call set_decl_tls_model only after a variable has be

[gcc r13-9835] x86: Pass -mno-80387 to compile pr121208-1(a|b).c

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:852c15f629a470195220c2485389beba82939f7e commit r13-9835-g852c15f629a470195220c2485389beba82939f7e Author: H.J. Lu Date: Tue Jul 29 09:11:34 2025 -0700 x86: Pass -mno-80387 to compile pr121208-1(a|b).c Pass -mno-80387 to compile pr121208-1(a|b).c to silence

[gcc r13-9834] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:0867befa57d18b19a087c8d10f81f050fad9b790 commit r13-9834-g0867befa57d18b19a087c8d10f81f050fad9b790 Author: H.J. Lu Date: Thu Jul 24 07:38:13 2025 -0700 x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers __tls_get_addr doesn't preserve vector regis

[gcc r14-11953] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:5a11b0fa070298854cb59d659f8ebe0711184e87 commit r14-11953-g5a11b0fa070298854cb59d659f8ebe0711184e87 Author: H.J. Lu Date: Thu Jul 24 07:38:13 2025 -0700 x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers __tls_get_addr doesn't preserve vector regi

[gcc r14-11954] x86: Pass -mno-80387 to compile pr121208-1(a|b).c

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:32960f98e639b4d0feed429b13c5f037261560d5 commit r14-11954-g32960f98e639b4d0feed429b13c5f037261560d5 Author: H.J. Lu Date: Tue Jul 29 09:11:34 2025 -0700 x86: Pass -mno-80387 to compile pr121208-1(a|b).c Pass -mno-80387 to compile pr121208-1(a|b).c to silence

[gcc r15-10227] x86: Pass -mno-80387 to compile pr121208-1(a|b).c

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:e5905a527f523c76b8d7cc2ebe88717fa0ff7d40 commit r15-10227-ge5905a527f523c76b8d7cc2ebe88717fa0ff7d40 Author: H.J. Lu Date: Tue Jul 29 09:11:34 2025 -0700 x86: Pass -mno-80387 to compile pr121208-1(a|b).c Pass -mno-80387 to compile pr121208-1(a|b).c to silence

[gcc r15-10226] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:afd88fad1615032b5bea2a1916757eee6edaeac9 commit r15-10226-gafd88fad1615032b5bea2a1916757eee6edaeac9 Author: H.J. Lu Date: Thu Jul 24 07:38:13 2025 -0700 x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers __tls_get_addr doesn't preserve vector regi

[gcc r16-3198] x86: Disallow MMX and 80387 in no_caller_saved_registers function

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:9d7f45e9806c50bf6d8f0f6f93fa657dc418401b commit r16-3198-g9d7f45e9806c50bf6d8f0f6f93fa657dc418401b Author: H.J. Lu Date: Wed Aug 13 14:18:26 2025 -0700 x86: Disallow MMX and 80387 in no_caller_saved_registers function commit 9804b23198b39f85a7258be556c5e8aed4

[gcc r16-3190] x86-64: Remove redundant TLS calls

2025-08-13 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:5cf1b9a03ec5b617af8c50c1e9c0d223083fd7f2 commit r16-3190-g5cf1b9a03ec5b617af8c50c1e9c0d223083fd7f2 Author: H.J. Lu Date: Fri Aug 19 11:50:41 2022 -0700 x86-64: Remove redundant TLS calls For TLS calls: 1. UNSPEC_TLS_GD: (parallel [

[gcc r16-3170] x86: Convert integer constant to mode of move

2025-08-12 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:9e30860f8c77309c9f74742fe8866d2ca0d0fe7a commit r16-3170-g9e30860f8c77309c9f74742fe8866d2ca0d0fe7a Author: H.J. Lu Date: Tue Aug 12 05:19:24 2025 -0700 x86: Convert integer constant to mode of move For (set (reg/v:DI 106 [ k ]) (const_int 30

[gcc r16-3112] asm-hard-reg-5.c: Compile for x86 !ia32

2025-08-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:a4ca04c4a8b897c6292a7a04bfb6119432d0814f commit r16-3112-ga4ca04c4a8b897c6292a7a04bfb6119432d0814f Author: H.J. Lu Date: Sat Aug 9 14:54:06 2025 -0700 asm-hard-reg-5.c: Compile for x86 !ia32 Since i?86 and x86_64 GCC can generate codes for ia32, x32 and lp64,

[gcc r16-3113] asm-hard-reg-6.c: Adjust scan for x86 with ia32, lp64 and x32

2025-08-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:57ea630ecd043eb9e27b3b4db4359d78a85f09ad commit r16-3113-g57ea630ecd043eb9e27b3b4db4359d78a85f09ad Author: H.J. Lu Date: Sat Aug 9 14:55:19 2025 -0700 asm-hard-reg-6.c: Adjust scan for x86 with ia32, lp64 and x32 Since i?86 and x86_64 GCC can generate codes f

[gcc r16-3111] asm-hard-reg-4.c: Compile for x86 with -msse2 and scan x86

2025-08-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f6718f9ac24e5dc8349054b668e519d1128ac8ed commit r16-3111-gf6718f9ac24e5dc8349054b668e519d1128ac8ed Author: H.J. Lu Date: Sat Aug 9 14:51:41 2025 -0700 asm-hard-reg-4.c: Compile for x86 with -msse2 and scan x86 Since i?86 and x86_64 GCC can generate codes for

[gcc r16-3110] asm-hard-reg-2.c: Compile for x86 !ia32 and scan x86

2025-08-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:d9cb1da4d7749218c7874851ae261a20d43092ae commit r16-3110-gd9cb1da4d7749218c7874851ae261a20d43092ae Author: H.J. Lu Date: Sat Aug 9 14:49:19 2025 -0700 asm-hard-reg-2.c: Compile for x86 !ia32 and scan x86 Since i?86 and x86_64 GCC can generate codes for ia32,

[gcc r16-3109] asm-hard-reg-1.c: Adjust scan for x86 with ia32, x32 and lp64

2025-08-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:07ad8f1298aa1983aec8cd87e1b8d877c44e3c03 commit r16-3109-g07ad8f1298aa1983aec8cd87e1b8d877c44e3c03 Author: H.J. Lu Date: Sat Aug 9 14:44:36 2025 -0700 asm-hard-reg-1.c: Adjust scan for x86 with ia32, x32 and lp64 Since i?86 and x86_64 GCC can generate codes f

[gcc r16-3105] asm-hard-reg-2.c: Use long long on z to trigger RA error

2025-08-09 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:07959996dd859af79e51494ee04329b0e538fb94 commit r16-3105-g07959996dd859af79e51494ee04329b0e538fb94 Author: H.J. Lu Date: Sat Aug 9 14:00:47 2025 -0700 asm-hard-reg-2.c: Use long long on z to trigger RA error Use long long on z to trigger error: 'asm'

[gcc r16-3015] x86: Get the widest vector mode from STORE_MAX_PIECES for memset

2025-08-05 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:40da83e4a770f0a05ef6ace4cdd75397609e5bde commit r16-3015-g40da83e4a770f0a05ef6ace4cdd75397609e5bde Author: H.J. Lu Date: Tue Aug 5 06:27:15 2025 -0700 x86: Get the widest vector mode from STORE_MAX_PIECES for memset commit 050b1708ea532ea4840e97d85fad4ca63d4c

[gcc r16-2786] x86: Update *one_cmplqi_ext_1

2025-08-05 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:a58d770fa1d17ead3c38417b299cce3f19f392db commit r16-2786-ga58d770fa1d17ead3c38417b299cce3f19f392db Author: H.J. Lu Date: Fri Aug 1 08:34:49 2025 -0700 x86: Update *one_cmplqi_ext_1 After commit 965564eafb721f813a3112f1bba8d8fae32b Author: Ric

[gcc r16-2727] x86: Don't hoist non all 0s/1s vector set outside of loop

2025-08-03 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:09f0768b55b96c861811a8989d7c1cc59b4c29b6 commit r16-2727-g09f0768b55b96c861811a8989d7c1cc59b4c29b6 Author: H.J. Lu Date: Fri Aug 1 05:02:18 2025 -0700 x86: Don't hoist non all 0s/1s vector set outside of loop Don't hoist non all 0s/1s vector set outside of th

[gcc r13-9817] x86: Transform to "pushq $-1; popq reg" for -Oz

2025-07-30 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:1afe5101b179339cf0021f26786bb77f272dc1a2 commit r13-9817-g1afe5101b179339cf0021f26786bb77f272dc1a2 Author: H.J. Lu Date: Tue Jul 29 11:22:35 2025 -0700 x86: Transform to "pushq $-1; popq reg" for -Oz commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 Author:

[gcc r14-11924] x86: Transform to "pushq $-1; popq reg" for -Oz

2025-07-30 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:8b959ca27ee95ba32e5a587e0490f6cb49ef9760 commit r14-11924-g8b959ca27ee95ba32e5a587e0490f6cb49ef9760 Author: H.J. Lu Date: Tue Jul 29 11:22:35 2025 -0700 x86: Transform to "pushq $-1; popq reg" for -Oz commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 Author

[gcc r15-10164] x86: Transform to "pushq $-1; popq reg" for -Oz

2025-07-30 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:94ca071cba4078aa783e6c134277515a4e46709e commit r15-10164-g94ca071cba4078aa783e6c134277515a4e46709e Author: H.J. Lu Date: Tue Jul 29 11:22:35 2025 -0700 x86: Transform to "pushq $-1; popq reg" for -Oz commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 Author

[gcc r16-2642] x86: Transform to "pushq $-1; popq reg" for -Oz

2025-07-30 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:71dae74158d05b75e367629ce21da3f0a2945576 commit r16-2642-g71dae74158d05b75e367629ce21da3f0a2945576 Author: H.J. Lu Date: Tue Jul 29 11:22:35 2025 -0700 x86: Transform to "pushq $-1; popq reg" for -Oz commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 Author:

[gcc r16-2617] x86: Pass -mno-80387 to compile pr121208-1(a|b).c

2025-07-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:c6d1f58da7eb72e8bac307d342e4655012b36a89 commit r16-2617-gc6d1f58da7eb72e8bac307d342e4655012b36a89 Author: H.J. Lu Date: Tue Jul 29 09:11:34 2025 -0700 x86: Pass -mno-80387 to compile pr121208-1(a|b).c Pass -mno-80387 to compile pr121208-1(a|b).c to silence

[gcc r13-9812] x86: Enable *mov_(and|or) only for -Oz

2025-07-28 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:2cc4fb21caab94663741d9bb236bc2ea28f9f0cb commit r13-9812-g2cc4fb21caab94663741d9bb236bc2ea28f9f0cb Author: H.J. Lu Date: Sun May 25 07:40:29 2025 +0800 x86: Enable *mov_(and|or) only for -Oz commit ef26c151c14a87177d46fd3d725e7f82e040e89f Author: Roger Sa

[gcc r14-11918] x86: Enable *mov_(and|or) only for -Oz

2025-07-28 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:b7e9ac6549ec5c73ea1a7ae7514ad1a049e801f1 commit r14-11918-gb7e9ac6549ec5c73ea1a7ae7514ad1a049e801f1 Author: H.J. Lu Date: Sun May 25 07:40:29 2025 +0800 x86: Enable *mov_(and|or) only for -Oz commit ef26c151c14a87177d46fd3d725e7f82e040e89f Author: Roger S

[gcc r15-10081] x86: Enable *mov_(and|or) only for -Oz

2025-07-28 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:6e5195734f1da534c206bc142d5be06c5ed7f40f commit r15-10081-g6e5195734f1da534c206bc142d5be06c5ed7f40f Author: H.J. Lu Date: Sun May 25 07:40:29 2025 +0800 x86: Enable *mov_(and|or) only for -Oz commit ef26c151c14a87177d46fd3d725e7f82e040e89f Author: Roger S

[gcc r16-2589] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-07-28 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:5760ddbce26ff9c5c8851b6b2089ad65981d5078 commit r16-2589-g5760ddbce26ff9c5c8851b6b2089ad65981d5078 Author: H.J. Lu Date: Thu Jul 24 07:38:13 2025 -0700 x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers __tls_get_addr doesn't preserve vector regis

[gcc r15-10012] libstdc++: Update some baseline_symbols.txt (x32)

2025-07-19 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f000ed0a034cc99cdc17eb5cfc8f8258f883ed44 commit r15-10012-gf000ed0a034cc99cdc17eb5cfc8f8258f883ed44 Author: H.J. Lu Date: Wed Jul 9 09:43:52 2025 +0800 libstdc++: Update some baseline_symbols.txt (x32) * config/abi/post/x86_64-linux-gnu/x32/baseline_s

[gcc r13-9799] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

2025-07-17 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:7e6a220b18df8ef13dde7c19407f4341ff16f091 commit r13-9799-g7e6a220b18df8ef13dde7c19407f4341ff16f091 Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_6

[gcc r13-9798] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

2025-07-17 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:536ed87cfb3a1453730411f217fa119b87ffaf90 commit r13-9798-g536ed87cfb3a1453730411f217fa119b87ffaf90 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get_

[gcc r14-11896] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

2025-07-17 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:59db34888d289dae8fae2bcbf5e435be53da0edc commit r14-11896-g59db34888d289dae8fae2bcbf5e435be53da0edc Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_

[gcc r14-11895] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

2025-07-17 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:4d929cd27e66c7d9c519cbcd77f12e1d58e85689 commit r14-11895-g4d929cd27e66c7d9c519cbcd77f12e1d58e85689 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get

[gcc r16-2321] x86: Don't change mode for XOR in ix86_expand_ternlog

2025-07-17 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:c139a8814456f4f13202170600f2e28b1498830b commit r16-2321-gc139a8814456f4f13202170600f2e28b1498830b Author: H.J. Lu Date: Sun Mar 2 09:10:57 2025 +0800 x86: Don't change mode for XOR in ix86_expand_ternlog There is no need to change mode for XOR in ix86_expand

[gcc r16-2305] x86: Convert MMX integer loads from constant vector pool

2025-07-16 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:11f73c82f178beb9f3f29cbfe2e0a5e592e40b69 commit r16-2305-g11f73c82f178beb9f3f29cbfe2e0a5e592e40b69 Author: Uros Bizjak Date: Tue Jul 15 05:05:10 2025 +0800 x86: Convert MMX integer loads from constant vector pool For MMX 16-bit, 32-bit and 64-bit constant vec

[gcc r16-2304] x86: Warn -pg without -mfentry only on glibc targets

2025-07-16 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:44680038685d3747e7cef45abdcf8192bfcb5bb2 commit r16-2304-g44680038685d3747e7cef45abdcf8192bfcb5bb2 Author: H.J. Lu Date: Tue Jul 15 22:49:12 2025 -0700 x86: Warn -pg without -mfentry only on glibc targets Since only glibc targets support -mfentry, warn -pg wi

[gcc r16-2233] x86: Check all 0s/1s vectors with standard_sse_constant_p

2025-07-14 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:dc07752af00f9e8ce3c9b25bf7dd4941a5df682d commit r16-2233-gdc07752af00f9e8ce3c9b25bf7dd4941a5df682d Author: Uros Bizjak Date: Mon Jul 14 17:16:36 2025 +0800 x86: Check all 0s/1s vectors with standard_sse_constant_p commit 77473a27bae04da99d6979d43e7bd0a8106f45

[gcc r16-2232] x86-64: Add --enable-x86-64-mfentry

2025-07-14 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:07d8de9174c421d719649639a1452b8b9f2eee32 commit r16-2232-g07d8de9174c421d719649639a1452b8b9f2eee32 Author: H.J. Lu Date: Wed Jul 2 08:58:23 2025 +0800 x86-64: Add --enable-x86-64-mfentry When profiling is enabled with shrink wrapping, the mcount call may not

[gcc r15-9967] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

2025-07-14 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:fcc6ce1a4934a45bfd4e8e21e118d3f1046d3d85 commit r15-9967-gfcc6ce1a4934a45bfd4e8e21e118d3f1046d3d85 Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_6

[gcc r15-9966] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

2025-07-14 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:3f6e48cdb1969dc718d702d045cc4d349f53f239 commit r15-9966-g3f6e48cdb1969dc718d702d045cc4d349f53f239 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get_

[gcc r16-2072] check-function-bodies: Support "^[0-9]+:"

2025-07-07 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:3e34c54d72f6e3723601bcd936409af4a42d17b8 commit r16-2072-g3e34c54d72f6e3723601bcd936409af4a42d17b8 Author: H.J. Lu Date: Wed Jul 2 08:51:47 2025 +0800 check-function-bodies: Support "^[0-9]+:" While working on https://gcc.gnu.org/bugzilla/show_bug.cg

[gcc r16-2047] x86: Improve vector_loop/unrolled_loop for memset/memcpy

2025-07-07 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:401199377c50045ede560daf3f6e8b51749c2a87 commit r16-2047-g401199377c50045ede560daf3f6e8b51749c2a87 Author: H.J. Lu Date: Tue Jun 17 10:17:17 2025 +0800 x86: Improve vector_loop/unrolled_loop for memset/memcpy 1. Don't generate the loop if the loop count is 1.

[gcc r16-1971] x86: Emit label only for __mcount_loc section

2025-07-03 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:349da53f13de274864d01b6ccc466961c472dbe1 commit r16-1971-g349da53f13de274864d01b6ccc466961c472dbe1 Author: H.J. Lu Date: Thu Jul 3 10:13:48 2025 +0800 x86: Emit label only for __mcount_loc section commit ecc81e33123d7ac9c11742161e128858d844b99d Author: An

[gcc r16-1917] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

2025-07-03 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:d8d5e2a8031e74f08f61ccdd727476f97940c5a6 commit r16-1917-gd8d5e2a8031e74f08f61ccdd727476f97940c5a6 Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_6

[gcc r16-1914] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

2025-07-02 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:7710d513a552f1fa1b7485ec6b318bafaa6d4cd7 commit r16-1914-g7710d513a552f1fa1b7485ec6b318bafaa6d4cd7 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get_

[gcc r16-1840] Fix "void debug (const tree_node *ptr)"

2025-07-01 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:76671eb3142f9827691fcb08ca7938624221104e commit r16-1840-g76671eb3142f9827691fcb08ca7938624221104e Author: H.J. Lu Date: Tue Jul 1 08:14:09 2025 +0800 Fix "void debug (const tree_node *ptr)" Calling "debug (const tree_node *ptr)" does nothing. Change it to

[gcc r16-1771] x86: Preserve frame pointer for no_callee_saved_registers attribute

2025-06-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:9a602ce3f4c95648c0c48d3f26fc52f69d012505 commit r16-1771-g9a602ce3f4c95648c0c48d3f26fc52f69d012505 Author: H.J. Lu Date: Sat Jun 28 09:39:41 2025 +0800 x86: Preserve frame pointer for no_callee_saved_registers attribute Update functions with no_callee_saved_r

[gcc r16-1766] shrink_wrap_separate_check_lea.c: Scan lea(l|q)

2025-06-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:0cd06c1da7a706330045e54a7516de2601341bc7 commit r16-1766-g0cd06c1da7a706330045e54a7516de2601341bc7 Author: H.J. Lu Date: Mon Jun 30 04:11:13 2025 +0800 shrink_wrap_separate_check_lea.c: Scan lea(l|q) Scan "lea(l|q)", instead of "leaq", to support x32.

[gcc r16-1762] Add "void debug (tree)"

2025-06-28 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:5e5de088f99319aa755ef2af3def30a4ccd5765a commit r16-1762-g5e5de088f99319aa755ef2af3def30a4ccd5765a Author: H.J. Lu Date: Sat Jun 28 07:32:01 2025 +0800 Add "void debug (tree)" Add "void debug (tree)" to support: (gdb) call debug (expr)

[gcc r16-1725] x86: Handle vector broadcast source

2025-06-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:64c55a99746ef8efa37937ee0fef29de4f081f25 commit r16-1725-g64c55a99746ef8efa37937ee0fef29de4f081f25 Author: H.J. Lu Date: Thu Jun 26 10:05:30 2025 +0800 x86: Handle vector broadcast source Use the inner scalar mode of vector broadcast source in: (se

[gcc r16-1694] x86: Also handle all 1s float vector constant

2025-06-25 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:77473a27bae04da99d6979d43e7bd0a8106f4557 commit r16-1694-g77473a27bae04da99d6979d43e7bd0a8106f4557 Author: H.J. Lu Date: Thu Jun 26 06:08:51 2025 +0800 x86: Also handle all 1s float vector constant Since float vector constant (const_vector:V4SF [(con

[gcc r16-1693] x86: Handle REG_EH_REGION note in DEF_INSN

2025-06-25 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:62a80185db84f20f3efb05c81598bffa95bcd63d commit r16-1693-g62a80185db84f20f3efb05c81598bffa95bcd63d Author: H.J. Lu Date: Wed Jun 25 12:50:53 2025 +0800 x86: Handle REG_EH_REGION note in DEF_INSN For tcpsock_test.go in libgo tests, commit aba3b9d3a48a

[gcc r16-1692] x86: Add preserve_none and update no_caller_saved_registers attributes

2025-06-25 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:9804b23198b39f85a7258be556c5e8aed44b9efc commit r16-1692-g9804b23198b39f85a7258be556c5e8aed44b9efc Author: H.J. Lu Date: Sun Apr 13 11:38:24 2025 -0700 x86: Add preserve_none and update no_caller_saved_registers attributes Add preserve_none attribute which is

[gcc r16-1690] x86: Add debug dump for the remove_redundant_vector pass

2025-06-25 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:b8b08a8514003280050003d6d56657cb1b71fb88 commit r16-1690-gb8b08a8514003280050003d6d56657cb1b71fb88 Author: H.J. Lu Date: Sat May 10 16:57:58 2025 +0800 x86: Add debug dump for the remove_redundant_vector pass Add debug dump for the remove_redundant_vector pas

[gcc r16-1667] x86: Update -mtune=intel for Diamond Rapids/Clearwater Forest

2025-06-24 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:7fd6cb3c8488465ae0529f543f5309584961503d commit r16-1667-g7fd6cb3c8488465ae0529f543f5309584961503d Author: H.J. Lu Date: Wed Jun 25 07:40:31 2025 +0800 x86: Update -mtune=intel for Diamond Rapids/Clearwater Forest -mtune=intel is used to generate a single bin

[gcc r16-1643] x86: Update memcpy/memset inline strategies for -mtune=generic

2025-06-24 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:d073bb6cfc219d4b6c283a0b527ee88b42e640e0 commit r16-1643-gd073bb6cfc219d4b6c283a0b527ee88b42e640e0 Author: H.J. Lu Date: Thu Mar 18 18:43:10 2021 -0700 x86: Update memcpy/memset inline strategies for -mtune=generic Update memcpy and memset inline strategies f

[gcc r16-1644] x86: Extend the remove_redundant_vector pass

2025-06-23 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:aba3b9d3a48a0703fd565f7c5f0caf604f59970b commit r16-1644-gaba3b9d3a48a0703fd565f7c5f0caf604f59970b Author: H.J. Lu Date: Fri May 9 07:17:07 2025 +0800 x86: Extend the remove_redundant_vector pass Extend the remove_redundant_vector pass to handle vector broadc

[gcc r16-1620] x86: Don't use vmovdqu16/vmovdqu8 with non-EVEX registers

2025-06-22 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:919f073ae5f45e9cc328be8a914cd80b3a0bc12d commit r16-1620-g919f073ae5f45e9cc328be8a914cd80b3a0bc12d Author: H.J. Lu Date: Fri Jun 20 16:07:18 2025 +0800 x86: Don't use vmovdqu16/vmovdqu8 with non-EVEX registers Don't use vmovdqu16/vmovdqu8 with non-EVEX regist

[gcc r16-1619] x86: Add PROCESSOR_XXX comments to processor_cost_table

2025-06-22 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f9bef66f690d8f1206086c30154af33347c80065 commit r16-1619-gf9bef66f690d8f1206086c30154af33347c80065 Author: H.J. Lu Date: Mon Jun 23 10:55:49 2025 +0800 x86: Add PROCESSOR_XXX comments to processor_cost_table Add a PROCESSOR_XXX comment to each entry in proces

[gcc r16-1588] x86: Get the widest vector mode from MOVE_MAX

2025-06-20 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:050b1708ea532ea4840e97d85fad4ca63d4cd631 commit r16-1588-g050b1708ea532ea4840e97d85fad4ca63d4cd631 Author: H.J. Lu Date: Thu Jun 19 05:03:48 2025 +0800 x86: Get the widest vector mode from MOVE_MAX Since MOVE_MAX defines the maximum number of bytes that an in

[gcc r16-1575] x86: Enable *mov_(and|or) only for -Oz

2025-06-19 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:4c80062d7b8c272e2e193b8074a8440dbb4fe588 commit r16-1575-g4c80062d7b8c272e2e193b8074a8440dbb4fe588 Author: H.J. Lu Date: Sun May 25 07:40:29 2025 +0800 x86: Enable *mov_(and|or) only for -Oz commit ef26c151c14a87177d46fd3d725e7f82e040e89f Author: Roger Sa

[gcc r16-1493] mcore: Don't use gen_rtx_MEM on __attribute__((dllimport))

2025-06-12 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:11059b4a4e8d4a19e7b554817f7cf0f68e3d54bb commit r16-1493-g11059b4a4e8d4a19e7b554817f7cf0f68e3d54bb Author: H.J. Lu Date: Sun Jun 8 14:23:09 2025 +0800 mcore: Don't use gen_rtx_MEM on __attribute__((dllimport)) On mcore-elf, mcore_mark_dllimport generated

[gcc r16-1097] Use MEM_EXPR only if MEM_P is true

2025-06-04 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f7df645956459c559f254d622090d4dd09159890 commit r16-1097-gf7df645956459c559f254d622090d4dd09159890 Author: H.J. Lu Date: Wed Jun 4 08:48:40 2025 +0800 Use MEM_EXPR only if MEM_P is true On s390x, for input: (call_insn/u 7 6 11 2 (parallel [

[gcc r16-1092] Always add REG_CALL_DECL note for CALL

2025-06-03 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:e1390c2c45186e4843b927e77a102d39a599374a commit r16-1092-ge1390c2c45186e4843b927e77a102d39a599374a Author: H.J. Lu Date: Tue Jun 3 05:56:37 2025 +0800 Always add REG_CALL_DECL note for CALL Always add REG_CALL_DECL note for CALL so that get_call_fndecl works

[gcc r16-1070] x86: Add g++.target/i386/pr103750.C

2025-06-03 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:4ab36e8e56280d774d4b5ef07b0838020ba20a6a commit r16-1070-g4ab36e8e56280d774d4b5ef07b0838020ba20a6a Author: H.J. Lu Date: Tue Jun 3 17:17:57 2025 +0800 x86: Add g++.target/i386/pr103750.C Add a test for PR target/103750 fixed by r16-170-ga670ebde399548.

[gcc r16-1041] Move get_call_rtx_from to final.c

2025-06-01 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:2da641d01700907d600ff9027ecfc82500342428 commit r16-1041-g2da641d01700907d600ff9027ecfc82500342428 Author: H.J. Lu Date: Sun Jun 1 09:29:48 2025 +0800 Move get_call_rtx_from to final.c Move get_call_rtx_from to final.c and call call_from_call_insn.

[gcc r16-535] x86: Remove df_insn_rescan after emit_insn_*

2025-05-11 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:9506c28a557bcea34af13478f05d2d9fc3727072 commit r16-535-g9506c28a557bcea34af13478f05d2d9fc3727072 Author: H.J. Lu Date: Mon May 12 10:02:24 2025 +0800 x86: Remove df_insn_rescan after emit_insn_* Since df_insn_rescan has been called by emit_insn_*, there is n

[gcc r16-519] x86: Change dest to src in replace_vector_const

2025-05-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:ba9d228a92057d3b839e7ea32b12c93fcfc5ff1e commit r16-519-gba9d228a92057d3b839e7ea32b12c93fcfc5ff1e Author: H.J. Lu Date: Sun May 11 06:17:45 2025 +0800 x86: Change dest to src in replace_vector_const Replace rtx dest = SET_SRC (set); with

[gcc r16-436] x86: Insert extra move for mode size smaller than natural size

2025-05-07 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:b8c4b6aa8e0521770c6f9fd48dd13dd85e3a2fc9 commit r16-436-gb8c4b6aa8e0521770c6f9fd48dd13dd85e3a2fc9 Author: H.J. Lu Date: Thu May 1 06:30:41 2025 +0800 x86: Insert extra move for mode size smaller than natural size When generating a SUBREG from V16QI to V2HF, v

[gcc r16-275] target.def: Remove TARGET_PROMOTE_FUNCTION_RETURN reference

2025-04-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:0f3a6b3972f6e6886297e59fcaf85f374859ca46 commit r16-275-g0f3a6b3972f6e6886297e59fcaf85f374859ca46 Author: H.J. Lu Date: Tue Apr 29 09:44:29 2025 +0800 target.def: Remove TARGET_PROMOTE_FUNCTION_RETURN reference Since TARGET_PROMOTE_FUNCTION_RETURN is no longe

[gcc r16-271] x86: Add a pass to remove redundant all 0s/1s vector load

2025-04-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:d1cada7481420a23fbec525548ef5bdf64839a34 commit r16-271-gd1cada7481420a23fbec525548ef5bdf64839a34 Author: H.J. Lu Date: Fri Nov 29 18:22:14 2024 +0800 x86: Add a pass to remove redundant all 0s/1s vector load For all different modes of all 0s/1s vectors, we c

[gcc r16-270] i386: Add ix86_expand_unsigned_small_int_cst_argument

2025-04-29 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:a0a64aa5da0af5ecb022675cdb9140ccfa098ce3 commit r16-270-ga0a64aa5da0af5ecb022675cdb9140ccfa098ce3 Author: H.J. Lu Date: Tue Nov 12 09:03:31 2024 +0800 i386: Add ix86_expand_unsigned_small_int_cst_argument When passing 0xff as an unsigned char function argumen

[gcc r16-194] x86: Properly find the maximum stack slot alignment

2025-04-28 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:b9ea3b2ef98048f93b02fcd6ff51777bce1676c2 commit r16-194-gb9ea3b2ef98048f93b02fcd6ff51777bce1676c2 Author: H.J. Lu Date: Tue Mar 14 11:41:51 2023 -0700 x86: Properly find the maximum stack slot alignment Don't assume that stack slots can only be accessed by st

[gcc r16-172] vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86

2025-04-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f9f81d5017adc5d860b24f67aeb89b4e79c7ebdb commit r16-172-gf9f81d5017adc5d860b24f67aeb89b4e79c7ebdb Author: H.J. Lu Date: Sun Nov 10 16:41:10 2024 +0800 vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86 Since the C frontend no longer promotes char a

[gcc r16-170] Drop targetm.promote_prototypes from C, C++ and Ada frontends

2025-04-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:a670ebde3995481225ec62b29686ec07a21e5c10 commit r16-170-ga670ebde3995481225ec62b29686ec07a21e5c10 Author: H.J. Lu Date: Thu Nov 21 07:54:35 2024 +0800 Drop targetm.promote_prototypes from C, C++ and Ada frontends Remove the targetm.calls.promote_prototypes ca

[gcc r16-171] i386: Adjust apx-ndd.c for frontend promotion removal

2025-04-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:cdb239bd213524a43b38ad8fca8e7ed0b5fb41eb commit r16-171-gcdb239bd213524a43b38ad8fca8e7ed0b5fb41eb Author: H.J. Lu Date: Sun Nov 10 11:27:14 2024 +0800 i386: Adjust apx-ndd.c for frontend promotion removal Since the C frontend no longer promotes integer argume

[gcc r16-174] ssa-fre-4.c: Enable for all targets and adjust scan match

2025-04-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:f962f594e9006651379dafc9ef039be9654e6291 commit r16-174-gf962f594e9006651379dafc9ef039be9654e6291 Author: H.J. Lu Date: Sun Nov 10 17:55:20 2024 +0800 ssa-fre-4.c: Enable for all targets and adjust scan match Since the C frontend no longer promotes char argum

[gcc r16-169] Honor TARGET_PROMOTE_PROTOTYPES during RTL expand

2025-04-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:78db4753c9646a372512e6a951fced12f74de0bc commit r16-169-g78db4753c9646a372512e6a951fced12f74de0bc Author: H.J. Lu Date: Thu Nov 21 08:11:06 2024 +0800 Honor TARGET_PROMOTE_PROTOTYPES during RTL expand Promote integer arguments smaller than int if TARGET_PROMO

[gcc r16-173] scev-cast.c: Enable for all targets and adjust scan matches

2025-04-26 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:de8648def762e3b54200dd3cd5c6fb480b228579 commit r16-173-gde8648def762e3b54200dd3cd5c6fb480b228579 Author: H.J. Lu Date: Sun Nov 10 16:50:46 2024 +0800 scev-cast.c: Enable for all targets and adjust scan matches Since the C frontend no longer promotes char arg

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