[Bug target/70117] ppc long double isinf() is wrong?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70117 --- Comment #13 from Michael Meissner --- In gcc/builtins.c it is probably better to use: const struct real_format *fmt = FLOAT_MODE_FORMAT (mode); if (fmt == &ibm_extended_double) { // ... }

[Bug target/70381] On powerpc, -mfloat128 is on by default for all VSX systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70381 Michael Meissner changed: What|Removed |Added Status|RESOLVED|REOPENED Last reconfirmed|

[Bug target/70589] New: PowerPC target attribute/pragma cannot set/disable -mfloat128

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- The new -mfloat128 support in PowerPC GCC 6 cannot be set via a target attribute or a target pragma. The reason for this is the

[Bug target/70381] On powerpc, -mfloat128 is on by default for all VSX systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70381 --- Comment #4 from Michael Meissner --- Author: meissner Date: Fri Apr 8 21:49:17 2016 New Revision: 234841 URL: https://gcc.gnu.org/viewcvs?rev=234841&root=gcc&view=rev Log: Merge in pr 70381 fix; update documentation Modified: branches/

[Bug target/70381] On powerpc, -mfloat128 is on by default for all VSX systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70381 --- Comment #5 from Michael Meissner --- Author: meissner Date: Fri Apr 8 21:51:58 2016 New Revision: 234842 URL: https://gcc.gnu.org/viewcvs?rev=234842&root=gcc&view=rev Log: Merge in pr 70381 fix; update documentation Modified: branches/

[Bug target/70381] On powerpc, -mfloat128 is on by default for all VSX systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70381 --- Comment #6 from Michael Meissner --- Author: meissner Date: Fri Apr 8 21:53:48 2016 New Revision: 234843 URL: https://gcc.gnu.org/viewcvs?rev=234843&root=gcc&view=rev Log: Merge in __float128 complex support; Merge in PR 70381 fix Added:

[Bug target/70381] On powerpc, -mfloat128 is on by default for all VSX systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70381 --- Comment #7 from Michael Meissner --- Author: meissner Date: Mon Apr 11 19:45:35 2016 New Revision: 234884 URL: https://gcc.gnu.org/viewcvs?rev=234884&root=gcc&view=rev Log: [gcc] 2016-04-11 Michael Meissner PR target/70381

[Bug target/70381] On powerpc, -mfloat128 is on by default for all VSX systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70381 Michael Meissner changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|---

[Bug target/70640] New: IEEE 128-bit floating point negative/abs has two thinkos

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- In applying the second fix for PR 70381, I noticed that the test float128-1.c does not run on the pre-gcc7 branch, which is a branch I am

[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640 --- Comment #1 from Michael Meissner --- Created attachment 38247 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38247&action=edit Proposed patch to fix the problem

[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640 Michael Meissner changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED

[Bug target/70669] New: PowerPC __float128 does not support direct move

: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- KFmode (i.e. __float128) does not have reload handlers to allow the compiler to do a direct move operation to move the values between GPRs and vector registers in a few

[Bug target/70669] PowerPC __float128 does not support direct move

dot gnu.org Host||powerpc64le-unknown-linux-g ||nu Assignee|unassigned at gcc dot gnu.org |meissner at gcc dot gnu.org Ever confirmed|0 |1 Build

[Bug target/70670] New: Duplicate code in rs6000_secondary_reload_direct_move in rs6000.c

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- In tracking down the bug in 70669, I noticed that rs6000_secondary_reload_direct_move has duplicated code. The code looks like: if

[Bug target/70670] Duplicate code in rs6000_secondary_reload_direct_move in rs6000.c

, ||wschmidt at gcc dot gnu.org Host||powerpc64le-unknown-linux-g ||nu Assignee|unassigned at gcc dot gnu.org |meissner at gcc dot gnu.org Ever confirmed|0

[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640 --- Comment #4 from Michael Meissner --- Author: meissner Date: Thu Apr 14 20:05:58 2016 New Revision: 234988 URL: https://gcc.gnu.org/viewcvs?rev=234988&root=gcc&view=rev Log: 2016-04-14 Michael Meissner PR target/70640 * gc

[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640 Michael Meissner changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|---

[Bug target/70669] PowerPC __float128 does not support direct move

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70669 --- Comment #1 from Michael Meissner --- Created attachment 38275 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38275&action=edit Proposed patch to fix the problem

[Bug target/70669] PowerPC __float128 does not support direct move

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70669 --- Comment #3 from Michael Meissner --- Fixed in subversion id 234995.

[Bug target/70669] PowerPC __float128 does not support direct move

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70669 --- Comment #2 from Michael Meissner --- Author: meissner Date: Thu Apr 14 23:21:30 2016 New Revision: 234995 URL: https://gcc.gnu.org/viewcvs?rev=234995&root=gcc&view=rev Log: [gcc] 2016-04-14 Michael Meissner PR target/70669

[Bug target/70669] PowerPC __float128 does not support direct move

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70669 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/70915] New: Improve loading 0/-1 in VSX registers on PowerPC

: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- Right now, the GCC compiler uses XXLXOR to zero a VSX register, and XXLORC (on power8 and above) to set a register to all 1's. It might be better to prefer to us

[Bug target/70928] New: Load simple float constants via VSX operations on PowerPC

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- With Power8 (and to a lesser extent Power7), we can create simple integer values in VSX registers without doing a load in a few instructions

[Bug target/70915] Improve loading 0/-1 in VSX registers on PowerPC

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70915 --- Comment #1 from Michael Meissner --- Author: meissner Date: Wed May 18 14:04:32 2016 New Revision: 236394 URL: https://gcc.gnu.org/viewcvs?rev=236394&root=gcc&view=rev Log: [gcc] 2016-05-18 Michael Meissner PR target/70915

[Bug target/70915] Improve loading 0/-1 in VSX registers on PowerPC

|--- |FIXED Assignee|unassigned at gcc dot gnu.org |meissner at gcc dot gnu.org --- Comment #2 from Michael Meissner --- Fixed in subversion id 236394.

[Bug target/70670] Duplicate code in rs6000_secondary_reload_direct_move in rs6000.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70670 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/71201] New: PowerPC XXPERM instruction fails on ISA 3.0 system.

Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- GCC 6.1 added support for the XXPERM instruction for the PowerPC ISA 3.0. The XXPERM instruction is essentially a 4 operand instruction, with only 3 operands in the

[Bug target/71201] PowerPC XXPERM instruction fails on ISA 3.0 system.

||2016-05-19 Assignee|unassigned at gcc dot gnu.org |meissner at gcc dot gnu.org Ever confirmed|0 |1

[Bug target/71201] PowerPC XXPERM instruction fails on ISA 3.0 system.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71201 --- Comment #3 from Michael Meissner --- Author: meissner Date: Mon May 23 23:42:52 2016 New Revision: 236617 URL: https://gcc.gnu.org/viewcvs?rev=236617&root=gcc&view=rev Log: [gcc] 2016-05-23 Michael Meissner PR target/71201

[Bug target/71294] [6/7 Regression] ICE in gen_add2_insn, at optabs.c:4442 on powerpc64le-linux

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71294 Michael Meissner changed: What|Removed |Added CC||meissner at gcc dot gnu.org

[Bug target/71294] [6/7 Regression] ICE in gen_add2_insn, at optabs.c:4442 on powerpc64le-linux

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71294 --- Comment #7 from Michael Meissner --- Created attachment 38580 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38580&action=edit Proposed patch to fix the problem This patch fixes the problem by copying frame related registers into a tem

[Bug rtl-optimization/69847] Spec 2006 403.gcc slows down with -mlra vs. reload on PowerPC

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69847 --- Comment #11 from Michael Meissner --- Thanks for the update.

[Bug target/71186] PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71186 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/70589] PowerPC target attribute/pragma cannot set/disable -mfloat128

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70589 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/71186] PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71186 --- Comment #1 from Michael Meissner --- Created attachment 38617 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38617&action=edit Proposed patch to fix the problem

[Bug target/71186] PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71186 --- Comment #2 from Michael Meissner --- Author: meissner Date: Wed Jun 1 20:09:35 2016 New Revision: 237006 URL: https://gcc.gnu.org/viewcvs?rev=237006&root=gcc&view=rev Log: [gcc] 2016-05-31 Michael Meissner PR target/71186

[Bug target/71186] PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71186 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/71201] PowerPC XXPERM instruction fails on ISA 3.0 system.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71201 --- Comment #4 from Michael Meissner --- Author: meissner Date: Wed Jun 1 23:23:42 2016 New Revision: 237021 URL: https://gcc.gnu.org/viewcvs?rev=237021&root=gcc&view=rev Log: [gcc] 2016-06-01 Michael Meissner Back port from trunk

[Bug target/71390] New: PowerPC GCC should warn if use does -mcpu=, and an old assembler was used

: enhancement Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- When you configure a PowerPC compiler with an old assembler, it configures the compiler so it does not generate the new

[Bug target/71390] PowerPC GCC should warn if use does -mcpu=, and an old assembler was used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71390 Michael Meissner changed: What|Removed |Added Priority|P3 |P4 CC|

[Bug target/71395] New: PowerPC vec_init of 4 SFmode values could be improved on Power8

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- The code for combining 4 SFmode values into a V4SFmode could be improved in GCC. For example: #include vector combine (float a

[Bug target/70915] Improve loading 0/-1 in VSX registers on PowerPC

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70915 --- Comment #3 from Michael Meissner --- Author: meissner Date: Thu Jun 9 23:28:23 2016 New Revision: 237281 URL: https://gcc.gnu.org/viewcvs?rev=237281&root=gcc&view=rev Log: [gcc] 2016-06-09 Michael Meissner Back port from trunk

[Bug target/71186] PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71186 --- Comment #4 from Michael Meissner --- Author: meissner Date: Thu Jun 9 23:28:23 2016 New Revision: 237281 URL: https://gcc.gnu.org/viewcvs?rev=237281&root=gcc&view=rev Log: [gcc] 2016-06-09 Michael Meissner Back port from trunk

[Bug target/81193] PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81193 --- Comment #14 from Michael Meissner --- Author: meissner Date: Wed Jul 19 20:31:53 2017 New Revision: 250368 URL: https://gcc.gnu.org/viewcvs?rev=250368&root=gcc&view=rev Log: [gcc] 2017-07-19 Michael Meissner Back port from trunk

[Bug target/81193] PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81193 --- Comment #15 from Michael Meissner --- Author: meissner Date: Wed Jul 19 22:05:20 2017 New Revision: 250371 URL: https://gcc.gnu.org/viewcvs?rev=250371&root=gcc&view=rev Log: [gcc] 2017-07-19 Michael Meissner Back port from trunk

[Bug target/81193] PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81193 Michael Meissner changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/81593] New: Optimize PowerPC vector set from vector extract

: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- Created attachment 41851 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41851&action=edit File to show the problem. If we doing a vector set for 64-bit DF/

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 --- Comment #1 from Michael Meissner --- Created attachment 41852 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41852&action=edit Proposed patch to fix the problem Checked on power7 big endian and power8 little endian.

[Bug target/81594] New: Optimize PowerPC vector set and store

Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- Created attachment 41853 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41853&action=edit Example code that code be optimized. On PowerPC VSX systems, optimize cases wh

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/81594] Optimize PowerPC vector set and store

||2017-07-27 CC||dje at gcc dot gnu.org, ||meissner at gcc dot gnu.org, ||segher at gcc dot gnu.org

[Bug target/81594] Optimize PowerPC vector set and store

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81594 --- Comment #1 from Michael Meissner --- Created attachment 41854 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41854&action=edit Proposed patch to fix the problem

[Bug target/81594] Optimize PowerPC vector set and store

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81594 Michael Meissner changed: What|Removed |Added Severity|normal |enhancement

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 --- Comment #2 from Michael Meissner --- Author: meissner Date: Mon Aug 7 23:51:27 2017 New Revision: 250936 URL: https://gcc.gnu.org/viewcvs?rev=250936&root=gcc&view=rev Log: [gcc] 2017-08-07 Michael Meissner PR target/81593

[Bug target/81872] New: Enable __float128 by default on PowerPC Linux systems

Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- In GCC 8.0, we should ensure that __float128 is enabled by default for PowerPC linux systems without having to use the -mfloat128 option.

[Bug target/81872] Enable __float128 by default on PowerPC Linux systems

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81872 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/81959] New: PowerPC __float128 optimization fails with integer PRE_INC addresses

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- Created attachment 42033 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42033&action=edit Sample test If you are d

[Bug target/81959] PowerPC __float128 optimization fails with integer PRE_INC addresses

, ||meissner at gcc dot gnu.org, ||segher at gcc dot gnu.org, ||wschmidt at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |meissner at gcc dot

[Bug target/81959] PowerPC __float128 optimization fails with integer PRE_INC addresses

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81959 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/82015] New: PowerPC should check if 2nd argument to __builtin_unpackv1ti and similar functions is 0 or 1

Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- If you have the code: vector __int128_t a[10] = { 1,2,3,4,5,6,7,8,9,0 }; vector __int128_t foo

[Bug target/82015] PowerPC should check if 2nd argument to __builtin_unpackv1ti and similar functions is 0 or 1

||2017-08-28 CC||dje at gcc dot gnu.org, ||meissner at gcc dot gnu.org, ||segher at gcc dot gnu.org

[Bug target/82015] PowerPC should check if 2nd argument to __builtin_unpackv1ti and similar functions is 0 or 1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82015 --- Comment #1 from Michael Meissner --- Author: meissner Date: Tue Aug 29 20:25:57 2017 New Revision: 251432 URL: https://gcc.gnu.org/viewcvs?rev=251432&root=gcc&view=rev Log: [gcc] 2017-08-29 Michael Meissner PR target/82015

[Bug target/81193] PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81193 --- Comment #17 from Michael Meissner --- Author: meissner Date: Tue Aug 29 21:06:21 2017 New Revision: 251437 URL: https://gcc.gnu.org/viewcvs?rev=251437&root=gcc&view=rev Log: [gcc] 2017-07-13 Michael Meissner Back port from trun

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 --- Comment #3 from Michael Meissner --- Author: meissner Date: Wed Aug 30 01:12:21 2017 New Revision: 251445 URL: https://gcc.gnu.org/viewcvs?rev=251445&root=gcc&view=rev Log: [gcc] 2017-08-29 Michael Meissner Back port from trunk

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 --- Comment #4 from Michael Meissner --- Author: meissner Date: Wed Aug 30 01:14:05 2017 New Revision: 251446 URL: https://gcc.gnu.org/viewcvs?rev=251446&root=gcc&view=rev Log: 2017-08-29 Michael Meissner Back port from trunk

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 --- Comment #5 from Michael Meissner --- Author: meissner Date: Wed Aug 30 13:38:27 2017 New Revision: 251532 URL: https://gcc.gnu.org/viewcvs?rev=251532&root=gcc&view=rev Log: [gcc] 2017-08-30 Michael Meissner Back port from trunk

[Bug target/81593] Optimize PowerPC vector set from vector extract

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81593 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/82015] PowerPC should check if 2nd argument to __builtin_unpackv1ti and similar functions is 0 or 1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82015 --- Comment #2 from Michael Meissner --- Author: meissner Date: Wed Aug 30 18:09:51 2017 New Revision: 251539 URL: https://gcc.gnu.org/viewcvs?rev=251539&root=gcc&view=rev Log: 2017-08-30 Michael Meissner PR target/82015 * gc

[Bug libquadmath/81848] Add PowerPC support to libquadmath

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81848 --- Comment #1 from Michael Meissner --- Author: meissner Date: Fri Sep 1 22:10:57 2017 New Revision: 251613 URL: https://gcc.gnu.org/viewcvs?rev=251613&root=gcc&view=rev Log: 2017-09-01 Michael Meissner PR libquadmath/81848

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #9 from Michael Meissner --- Author: meissner Date: Mon Sep 18 22:47:49 2017 New Revision: 252956 URL: https://gcc.gnu.org/viewcvs?rev=252956&root=gcc&view=rev Log: Refix pr 71977 Modified: branches/ibm/xscvdpsp/gcc/ChangeLog.me

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #10 from Michael Meissner --- I believe this was ultimately due to reassociation, so Aaron probably should chime in if it is believed to be fixed.

[Bug libquadmath/81848] Add PowerPC support to libquadmath

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81848 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug libfortran/82292] [8 Regression] bootstrap fails in libgfortran on powerpc64le-linux-gnu

||2017-09-23 CC||meissner at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #5 from Michael Meissner --- In the GCC build, if you want to disable libquadmath completely, you need to use both --disable

[Bug target/80099] ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80099 --- Comment #3 from Michael Meissner --- Author: meissner Date: Tue Apr 18 16:41:06 2017 New Revision: 246972 URL: https://gcc.gnu.org/viewcvs?rev=246972&root=gcc&view=rev Log: [gcc] 2017-04-18 Michael Meissner PR target/80099

[Bug target/80099] ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80099 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/68163] GCC on power8 does not issue the stxsspx instruction on power8

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68163 --- Comment #2 from Michael Meissner --- Author: meissner Date: Tue Apr 18 17:08:16 2017 New Revision: 246974 URL: https://gcc.gnu.org/viewcvs?rev=246974&root=gcc&view=rev Log: Add initial patch for pr 68163 Added: branches/ibm/meissner-gcc

[Bug target/80510] New: Optimize Power7/power8 Altivec load/stores

Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- In looking at PR target/68163, I noticed that if the register allocator wanted to store a scalar value in a traditional Altivec register, it would generate the following code

[Bug target/79038] Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79038 Michael Meissner changed: What|Removed |Added Attachment #40827|0 |1 is obsolete|

[Bug target/79203] Update PowerPC double->int conversions to know about -mvsx-small-integer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79203 --- Comment #2 from Michael Meissner --- Author: meissner Date: Fri May 5 20:21:15 2017 New Revision: 247657 URL: https://gcc.gnu.org/viewcvs?rev=247657&root=gcc&view=rev Log: [gcc] 2017-05-05 Michael Meissner PR target/79038

[Bug target/79038] Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79038 --- Comment #7 from Michael Meissner --- Author: meissner Date: Fri May 5 20:21:15 2017 New Revision: 247657 URL: https://gcc.gnu.org/viewcvs?rev=247657&root=gcc&view=rev Log: [gcc] 2017-05-05 Michael Meissner PR target/79038

[Bug target/79202] On Power8, consider using vupkhsw/xxpermdi to sign extend an int in a vector register instead of mfvsrwz/mtvsrwa

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79202 --- Comment #6 from Michael Meissner --- Author: meissner Date: Fri May 5 20:21:15 2017 New Revision: 247657 URL: https://gcc.gnu.org/viewcvs?rev=247657&root=gcc&view=rev Log: [gcc] 2017-05-05 Michael Meissner PR target/79038

[Bug target/68163] GCC on power8 does not issue the stxsspx instruction on power8

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68163 --- Comment #3 from Michael Meissner --- Author: meissner Date: Tue May 9 21:25:23 2017 New Revision: 247819 URL: https://gcc.gnu.org/viewcvs?rev=247819&root=gcc&view=rev Log: [gcc] 2017-05-09 Michael Meissner PR target/68163

[Bug target/80697] New: On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- After GCC 7.1 came out, I ran the spec 2006 benchmark suite. The milc benchmark had a 5.6% regression

[Bug target/79203] Update PowerPC double->int conversions to know about -mvsx-small-integer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79203 --- Comment #3 from Michael Meissner --- Author: meissner Date: Tue May 9 23:49:37 2017 New Revision: 247820 URL: https://gcc.gnu.org/viewcvs?rev=247820&root=gcc&view=rev Log: [gcc] 2017-05-09 Michael Meissner Back port from mainlin

[Bug target/79202] On Power8, consider using vupkhsw/xxpermdi to sign extend an int in a vector register instead of mfvsrwz/mtvsrwa

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79202 --- Comment #7 from Michael Meissner --- Author: meissner Date: Tue May 9 23:49:37 2017 New Revision: 247820 URL: https://gcc.gnu.org/viewcvs?rev=247820&root=gcc&view=rev Log: [gcc] 2017-05-09 Michael Meissner Back port from mainlin

[Bug target/79038] Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79038 --- Comment #8 from Michael Meissner --- Author: meissner Date: Tue May 9 23:49:37 2017 New Revision: 247820 URL: https://gcc.gnu.org/viewcvs?rev=247820&root=gcc&view=rev Log: [gcc] 2017-05-09 Michael Meissner Back port from mainlin

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #3 from Michael Meissner --- Created attachment 41342 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41342&action=edit Preprocessed C source for the mult_adj_su3_mat_vec function To reproduce, you need to use the -O3 -ffast-mat

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #4 from Michael Meissner --- Created attachment 41343 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41343&action=edit Assembler output from gcc 6.3.0

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #5 from Michael Meissner --- Created attachment 41344 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41344&action=edit Assembler output from gcc 7.1.0

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #6 from Michael Meissner --- Author: meissner Date: Fri May 12 00:00:50 2017 New Revision: 247940 URL: https://gcc.gnu.org/viewcvs?rev=247940&root=gcc&view=rev Log: Attempt to fix pr 80697 Modified: branches/ibm/meissner-work/gc

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #7 from Michael Meissner --- Author: meissner Date: Fri May 12 00:05:24 2017 New Revision: 247941 URL: https://gcc.gnu.org/viewcvs?rev=247941&root=gcc&view=rev Log: Attempt to fix pr 80697 Modified: branches/ibm/meissner-work/gc

[Bug target/80697] On PowerPC, the spec 2006 benchmark milc had a 5.6% regression under GCC 7.1 compared to GCC 6.3.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80697 --- Comment #8 from Michael Meissner --- I forgot to mention that I ran the MILC benchmark on a little endian power8 system, using -mcpu=power8 in addition to -O3 and -ffast-math.

[Bug target/80718] New: GCC generates slow code for offsettable vec_duplicate

Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- In looking at bug 80697, I noticed on power8, there were loads to a GPR register and move directs to vector registers. I tracked this down to the load with splat

[Bug target/80718] GCC generates slow code for offsettable vec_duplicate

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80718 --- Comment #1 from Michael Meissner --- Author: meissner Date: Fri May 12 19:48:54 2017 New Revision: 247994 URL: https://gcc.gnu.org/viewcvs?rev=247994&root=gcc&view=rev Log: Rework pr 80718 Modified: branches/ibm/meissner-work/gcc/Change

[Bug target/80718] GCC generates slow code for offsettable vec_duplicate

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80718 --- Comment #2 from Michael Meissner --- Author: meissner Date: Fri May 12 19:54:03 2017 New Revision: 247995 URL: https://gcc.gnu.org/viewcvs?rev=247995&root=gcc&view=rev Log: Rework pr 80718 Modified: branches/ibm/meissner-work/gcc/config

[Bug target/80510] Optimize Power7/power8 Altivec load/stores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80510 --- Comment #1 from Michael Meissner --- Author: meissner Date: Thu May 18 19:34:13 2017 New Revision: 248254 URL: https://gcc.gnu.org/viewcvs?rev=248254&root=gcc&view=rev Log: [gcc] 2017-05-18 Michael Meissner PR target/80510

[Bug target/80834] New: PowerPC gcc -mcpu=power9 seems to turn off vectorization that -mcpu=power8 enables

Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: meissner at gcc dot gnu.org Target Milestone: --- Created attachment 41391 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41391&action=edit File from sp

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