https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79038
Michael Meissner <meissner at gcc dot gnu.org> changed:
What |Removed |Added
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Attachment #40827|0 |1
is obsolete| |
--- Comment #6 from Michael Meissner <meissner at gcc dot gnu.org> ---
Created attachment 41273
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41273&action=edit
Updated patch
This patch, addresses the remaining issues on 3 PRs (79038, 79202, and 79203).
It allows the register allocator to chose to do sign extension of a 32-bit
integer in a vector register if the value happens to be in the vector register,
rather than doing a direct move to a GPR to do the sign extension.
It also rewrites the floating point -> 32-bit integer and 32-bit integer ->
floating point conversions to be more natural on power8, since we now allow
32-bit integers in the vector registers on power8. Previously, we had to use a
technique (UNSPEC) to hide the fact that we were dealing with 32-bit integers
in the vector registers. We still need to use the UNSPECs for 8/16-bit integer
types on power8, but the same code will allow the more natural use on power9
(where 8/16-bit integers can also go in vector registers).
On Spec 2006, it gives minor (1%) gains on astar, povray, and sphinx3.
