[Bug tree-optimization/109777] New: [14 regression] Compare-debug failure after recent changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109777 Bug ID: 109777 Summary: [14 regression] Compare-debug failure after recent changes Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Pr

[Bug testsuite/109776] [14 Regression] pr81192 fails on some targets after recent propagator changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109776 --- Comment #7 from Jeffrey A. Law --- Thanks. That took care of the xstormy16 issues.

[Bug target/109777] [14 regression] Compare-debug failure after recent changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109777 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 --- Comment #4 from Jeffrey A. Law

[Bug rtl-optimization/109592] Failure to recognize shifts as sign/zero extension

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592 --- Comment #6 from Jeffrey A. Law --- I would still rather not introduce special cases for SUBREGs if we can avoid it. I think the question remains whether or not patching simplify-rtx's canonicalize_shift is sufficient to fix this problem (pe

[Bug tree-optimization/109848] New: [14 Regression] Recent change causing testsuite ICE on csky port

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109848 Bug ID: 109848 Summary: [14 Regression] Recent change causing testsuite ICE on csky port Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug tree-optimization/114511] [11/12/13/14 Regression] Missed optimization: x = -y; x = c + x + y; ==> x=c;

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114511 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Prior

[Bug target/114591] [12/13/14 Regression] register allocators introduce an extra load operation since gcc-12

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114591 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Prior

[Bug tree-optimization/114559] [11/12/13/14 Regression] After function inlining some optimizations missing

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114559 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC|

[Bug tree-optimization/114545] [11/12/13/14 Regression] Missed optimization for CSE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114545 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC|

[Bug rtl-optimization/114415] [13 Regression] wrong code with -Oz -fno-dce -fno-forward-propagate -flive-range-shrinkage -fweb since r13-1826

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114415 Jeffrey A. Law changed: What|Removed |Added Summary|[13/14 Regression] wrong|[13 Regression] wrong code

[Bug rtl-optimization/114415] [13 Regression] wrong code with -Oz -fno-dce -fno-forward-propagate -flive-range-shrinkage -fweb since r13-1826

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114415 --- Comment #9 from Jeffrey A. Law --- Yea. I think my first one in this space was in the mid 90s on the PA. Sigh.

[Bug target/113742] ICE: RTL check: expected elt 1 type 'i' or 'n', have 'e' (rtx set) in riscv_macro_fusion_pair_p, at config/riscv/riscv.cc:8416 with -O2 -finstrument-functions -mtune=sifive-p600-se

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113742 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Resolut

[Bug libstdc++/84568] libstdc++-v3 configure checks for atomic operations fail on riscv

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84568 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Stat

[Bug target/89835] The RISC-V target uses amoswap.w for relaxed stores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89835 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Stat

[Bug target/114676] [12/13/14 Regression] DSE removes assignment that is used later

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114676 Jeffrey A. Law changed: What|Removed |Added Ever confirmed|0 |1 CC|

[Bug libgcc/114689] [14 Regression] libgcc/config/m68k/fpgnulib.c:305: Suspicious coding ?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114689 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4

[Bug c++/114634] [11/12/13/14 Regression] Crash Issue Encountered in GCC Compilation of Template Code with Aligned Attribute

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114634 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC|

[Bug target/114621] [11/12/13/14 Regression] ICE: in extract_insn, at recog.cc:2812 (unrecognizable insn) with -O -fpie and _Thread_local with large offset

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114621 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC|

[Bug debug/114608] [14 Regression] Undefined reference in output asm with -fipa-reference -fipa-reference-addressable -fsection-anchors -gbtf

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114608 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Sta

[Bug lto/114574] [14 regression] ICE when building curl with LTO (fld_incomplete_type_of, at ipa-free-lang-data.cc:257) since r14-9763

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114574 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Prior

[Bug tree-optimization/112723] [11/12/13/14 Regression] Missed optimization for invariants 'c+c' when c += -2147483647-1 and c is a global variable

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112723 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Prior

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-04-15 Status|UNCONFIR

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #7 from Jeffrey A. Law --- Yes, there are different algorithms. I looked at them a while back when we first noticed the problems with spilling and x264. There was very little difference for specint when we varied the algorithms. I

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #8 from Jeffrey A. Law --- I didn't even notice you had that testcase attached! I haven't done a deep dive, but the first thing that jumps out is the number of instructions in the ready queue, most likely because of the addressing o

[Bug target/114741] [14 regression] aarch64 sve: unnecessary fmov for scalar int bit operations

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114741 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Prior

[Bug c++/114709] [12/13/14 Regression] Incorrect handling of inactive union member access via pointer to member in constant evaluated context

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114709 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC|

[Bug analyzer/114677] [13/14 Regression] -Wanalyzer-fd-leak false positive writing to int * param

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114677 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC|

[Bug fortran/113956] [13/14 Regression] ice in gfc_trans_pointer_assignment, at fortran/trans-expr.cc:10524

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113956 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Prior

[Bug ipa/113291] [14 Regression] compilation never (?) finishes with recursive always_inline functions at -O and above since r14-2172

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113291 Jeffrey A. Law changed: What|Removed |Added Priority|P1 |P2 CC|

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #11 from Jeffrey A. Law --- Yup. -fsched-verbose=99 is *very* verbose. But that's the point, to see all the gory details. It can be dialed down, but I've never done so myself. What stands out to me is this: ;;| Pressure co

[Bug tree-optimization/114787] [14 Regression] wrong code at -O1 on x86_64-linux-gnu (the generated code hangs)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114787 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC|

[Bug target/114506] RISC-V: expect M8 but M4 generated with dynamic LMUL

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114506 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/114885] RISC-V: ICE of unrecog insn when graphite for both the c/c++ and fortran

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114885 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug rtl-optimization/114996] New: [15 Regression] [RISC-V] 2->2 combination no longer occurring

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114996 Bug ID: 114996 Summary: [15 Regression] [RISC-V] 2->2 combination no longer occurring Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug rtl-optimization/114996] [15 Regression] [RISC-V] 2->2 combination no longer occurring

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114996 --- Comment #2 from Jeffrey A. Law --- I don't care about the terminology. We have 3 insns in play. A, B and C. We try to combine A -> B which succeeded before resulting in A, B' and C and which in turn allowed a subsequent A -> C combination

[Bug tree-optimization/115017] New: [15 Regression] Ranger ICE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115017 Bug ID: 115017 Summary: [15 Regression] Ranger ICE Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization

[Bug rtl-optimization/115013] [15 Regression] LRA: PR114810 fix result in ICE in the RISC-V Vector

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Tar

[Bug tree-optimization/115009] [15 regression] AVR: ICE in alloc, at value-range-storage.cc:598

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115009 Jeffrey A. Law changed: What|Removed |Added Target|avr |avr, rl78 --- Comment #5 from Jeffrey

[Bug tree-optimization/115009] [15 regression] AVR: ICE in alloc, at value-range-storage.cc:598

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115009 --- Comment #8 from Jeffrey A. Law --- And on msp430-elf we're getting a codegen correctness issue on msp430-elf. gcc.dg/pr66444.c fails in the simulator. The -O2 code difference looks like: *** good.s Thu May 9 20:41:37 2024 --- bad.s

[Bug tree-optimization/115026] [15 Regression] msp430-elf fails gcc.dg/pr66444.c with prange enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115026 --- Comment #7 from Jeffrey A. Law --- So what's the magic to re-enable prange? I can do that and spin a fresh build.

[Bug rtl-optimization/115013] [15 Regression] LRA: PR114810 fix result in ICE in the RISC-V Vector

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug rtl-optimization/115013] [15 Regression] LRA: PR114810 fix result in ICE in the RISC-V Vector

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013 --- Comment #5 from Jeffrey A. Law --- So this seems to have fixed the RISC-V port. Thanks! I'm still seeing some problems on the PRU port though: Tests that now fail, but worked before (1 tests): pru-sim: gcc: gcc.dg/pr71478.c (test for exc

[Bug tree-optimization/92539] [11/12/13/14/15 Regression] -Warray-bounds false positive with -O3 (loop unroll?)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92539 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #12

[Bug other/115110] [15 regression] several failures after r15-512-g9b7cad5884f21c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115110 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #3

[Bug target/115123] [15 Regression] RISCV vector scan-assembler failures

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115123 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 --- Comment #2 from Jeffrey A. Law --- So just one high level note. Nobody is ever going to do something like "-ftree-ter" without having one of the optimization levels on. It's an option combination that just doesn't make sense. But we still

[Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-05-18 Status|UNCONFIR

[Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4

[Bug target/115142] [14 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 --- Comment #5 from Jeffrey A. Law --- Yes, sorry. I should have removed the 15 tag.

[Bug rtl-optimization/115038] [14/15 regression] internal error in seh_cfa_offset with -O2 -fno-omit-frame-pointer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115038 --- Comment #8 from Jeffrey A. Law --- Yea, I would think we want to avoid anything marked as frame related. Otherwise we have to go back and fixup the CFI nodes and such. Eric, do you want to handle the final bootstrap+regression test? Or do

[Bug tree-optimization/115220] [15 Regression] RISC-V: newlib targets ICE during sink pass triggered in verify_ssa

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115220 Jeffrey A. Law changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED

[Bug tree-optimization/115298] New: [15 Regression] Various targets failing DSE tests after recent changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115298 Bug ID: 115298 Summary: [15 Regression] Various targets failing DSE tests after recent changes Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug tree-optimization/115298] [15 Regression] Various targets failing DSE tests after recent changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115298 --- Comment #2 from Jeffrey A. Law --- What still doesn't make sense is why nds32 would be special here. It doesn't do anything special with flag_delete_null_pointer_checks and I don't think it uses any of the address space hooks. So why does

[Bug tree-optimization/115298] [15 Regression] Various targets failing DSE tests after recent changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115298 --- Comment #4 from Jeffrey A. Law --- Agh. I was looking in the main config directory, not common/config. So it all makes sense now. So if we go back to your original analysis, I think we can say things are behaving correctly and we just nee

[Bug tree-optimization/115298] [15 Regression] Various targets failing DSE tests after recent changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115298 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4

[Bug rtl-optimization/114996] [15 Regression] [RISC-V] 2->2 combination no longer occurring

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114996 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4

[Bug rtl-optimization/114996] [15 Regression] [RISC-V] 2->2 combination no longer occurring

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114996 Jeffrey A. Law changed: What|Removed |Added Priority|P4 |P3

[Bug target/113357] [14/15 regression] m68k-linux bootstrap failure in stage2 due to segfault compiling unwind-dw2.c since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113357 --- Comment #11 from Jeffrey A. Law --- That's not the way we do things. And my bootstraps on m68k are working fine. Last one was 6 days ago. This needs to be debugged by someone with the time/interest on the m68k.

[Bug middle-end/111777] [14 regression] build breaks after r14-4558-g400efdddf3d849

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111777 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug middle-end/111777] [14 regression] build breaks after r14-4558-g400efdddf3d849

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111777 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/111798] New: [14 Regression] Recent change causing testsuite regression and poor code on mcore-elf

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111798 Bug ID: 111798 Summary: [14 Regression] Recent change causing testsuite regression and poor code on mcore-elf Product: gcc Version: unknown Status: UNCONFIRMED

[Bug target/111466] RISC-V: redundant sign extensions despite ABI guarantees

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111466 Jeffrey A. Law changed: What|Removed |Added Status|ASSIGNED|RESOLVED CC|

[Bug libstdc++/107885] H8/300: libsupc++/hash_bytes.cc fix shift-count-overflow warning

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107885 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Resolut

[Bug target/112298] New: Poor code for DImode operations on H8 port

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112298 Bug ID: 112298 Summary: Poor code for DImode operations on H8 port Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: targe

[Bug target/112298] Poor code for DImode operations on H8 port

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112298 Jeffrey A. Law changed: What|Removed |Added Target||h8300 Priority|P3

[Bug tree-optimization/112320] [14 Regression] crash from insert_debug_temp_for_var_def since r14-5032-ge3da1d7bb288c8

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112320 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW CC|

[Bug tree-optimization/112320] [14 Regression] crash from insert_debug_temp_for_var_def since r14-5032-ge3da1d7bb288c8

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112320 --- Comment #6 from Jeffrey A. Law --- Created attachment 56480 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=56480&action=edit Testcase for fr30-elf -Os -g

[Bug rtl-optimization/104387] aarch64: Redundant SXTH for “bag of bits” moves

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104387 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #5

[Bug rtl-optimization/109035] meaningless memory store on RISC-V and LoongArch

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109035 --- Comment #8 from Jeffrey A. Law --- No spills on rv64 either.

[Bug target/111311] RISC-V regression testsuite errors with --param=riscv-autovec-preference=scalable

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111311 --- Comment #14 from Jeffrey A. Law --- As Andrew said, if there's a test that depends on behavior of -INT_MIN, then the test needs to be fixed. That's undefined behavior.

[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #6 from Jeffrey A. Law --- Do we have assembly code around the faulting point (x/20i $pc) and a register dump (i r)? The biggest concern I'd have with f-m-o on the PA would be the implicit segment selection that happens on the base

[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #19 from Jeffrey A. Law --- f-m-o runs post-allocation, so the scope of where it's behavior can change things is narrower. So testing with -fno-schedule-insns isn't going to be useful, but -fno-schedule-insns2 might. I'm a bit conc

[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #26 from Jeffrey A. Law --- As a compiler junkie, I tend to think compiler first until I can prove it otherwise. I wouldn't get too hung up on aliasing issues and such at this point. Do we already have a dump for the key function?

[Bug target/112462] New: RISC-V zicond cost model enhancements

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112462 Bug ID: 112462 Summary: RISC-V zicond cost model enhancements Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target

[Bug tree-optimization/112468] New: [14 Regression] Missed phi-opt after recent change

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112468 Bug ID: 112468 Summary: [14 Regression] Missed phi-opt after recent change Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Componen

[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #31 from Jeffrey A. Law --- IIRC r21 is call-clobbered. So I guess the question turns into what was the sequence before f-m-o got involved -- was it assuming r21 would be preserved, or did f-m-o make r21 live across the call?

[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #41 from Jeffrey A. Law --- I would agree. In fact,the whole point of the f-m-o pass is to bring those immediates into the memory reference. It'd be really useful to know why that isn't happening. The only thing I can think of wou

[Bug bootstrap/112497] [14 Regression] Bootstrap comparison failure: gcc/analyzer/constraint-manager.o differs on loongarch64-linux-gnu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112497 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #3

[Bug bootstrap/112497] [14 Regression] Bootstrap comparison failure: gcc/analyzer/constraint-manager.o differs on loongarch64-linux-gnu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112497 --- Comment #5 from Jeffrey A. Law --- This failure means the stage1 and stage2 compilers generated different code for the same input. So when I need to debug this I usually start by first getting that source code. Based in the title of this b

[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #43 from Jeffrey A. Law --- I would expect allowing larger offsets before reload to be a significant problem. The core issue is integer memory operations allow 14 bits while FP only allows 5. During reloading we don't know if any g

[Bug target/112478] riscv: asm clobbers not honored

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112478 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #11

[Bug tree-optimization/112530] New: [14 Regression] New ICE in gimple->rtl expansion after recent change

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112530 Bug ID: 112530 Summary: [14 Regression] New ICE in gimple->rtl expansion after recent change Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug tree-optimization/112530] [14 Regression] New ICE in gimple->rtl expansion after recent change

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112530 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481 --- Comment #14 from Jeffrey A. Law --- *** Bug 112530 has been marked as a duplicate of this bug. ***

[Bug debug/112674] [14 Regression] Compare-debug failure after recent change on c6x

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112674 --- Comment #1 from Jeffrey A. Law --- And possibly more interesting than the compare-debug failure is this patch seems to be causing Wstringop-overflow-17 to fail on multiple targets, including c6x.

[Bug debug/112674] New: [14 Regression] Compare-debug failure after recent change on c6x

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112674 Bug ID: 112674 Summary: [14 Regression] Compare-debug failure after recent change on c6x Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug tree-optimization/112848] [14 regression] ICE compiling gcc.dg/tree-ssa/ssa-sink-16.c after r14-6114-gde0ab339a79535

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112848 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug rtl-optimization/109592] Failure to recognize shifts as sign/zero extension

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592 --- Comment #7 from Jeffrey A. Law --- Attached is what I cobbled together. It doesn't use magic numbers. But it doesn't yet handle zero extensions in the simplify-rtx code. But I think it shows the overall direction fairly well.

[Bug tree-optimization/108041] ivopts results in extra instruction in simple loop

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108041 --- Comment #3 from Jeffrey A. Law --- Created attachment 55185 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55185&action=edit (Incomplete) Patch

[Bug rtl-optimization/109592] Failure to recognize shifts as sign/zero extension

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592 --- Comment #9 from Jeffrey A. Law --- Weird, I don't see the attachment either. I'll extract & upload it again. WRT costing. fwprop and combine will both query the target rtx costs and will reject when the target costing model indicates the

[Bug tree-optimization/108041] ivopts results in extra instruction in simple loop

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108041 --- Comment #4 from Jeffrey A. Law --- Patch was for a different problem. Sorry.

[Bug rtl-optimization/109592] Failure to recognize shifts as sign/zero extension

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592 --- Comment #10 from Jeffrey A. Law --- Created attachment 55218 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55218&action=edit (Incomplete) Patch

[Bug target/110109] RISC-V: ICE when build the Intrinsic code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110109 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC|

[Bug rtl-optimization/110163] New: [14 Regression] Comparing against a constant string is inefficient on some targets

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110163 Bug ID: 110163 Summary: [14 Regression] Comparing against a constant string is inefficient on some targets Product: gcc Version: 14.0 Status: UNCONFIRMED Sever

[Bug rtl-optimization/110163] [14 Regression] Comparing against a constant string is inefficient on some targets

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110163 --- Comment #2 from Jeffrey A. Law --- It is a regression for rv64. So probably P4 would be most appropriate.

[Bug tree-optimization/110218] sink pass heuristic not working in practice

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110218 --- Comment #2 from Jeffrey A. Law --- So what I think was happening was that we would sink past a bunch of conditionals that were never going to be true thinking that we were moving to a deeper control nest. So the idea was to use the frequenc

[Bug middle-end/79173] add-with-carry and subtract-with-borrow support (x86_64 and others)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79173 --- Comment #23 from Jeffrey A. Law --- risc-v doesn't have any special instructions to implement add-with-carry or subtract-with-borrow. Depending on who you talk do, it's either a feature or a mis-design.

[Bug target/110264] internal compiler error: riscv_vector::vector_insn_info::get_avl_reg_rtx

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110264 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

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