[Bug middle-end/55889] [4.8 Regression] ICE: in move_op_ascend, at sel-sched.c:6153 with -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55889 --- Comment #28 from Andrey Belevantsev 2013-02-14 06:11:21 UTC --- (In reply to comment #27) > (In reply to comment #26) > > You are right, your suggestions is what I sketched in comment #21 as > > choices 1 > > or 2. Sorry for my uncl

[Bug middle-end/55889] [4.8 Regression] ICE: in move_op_ascend, at sel-sched.c:6153 with -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55889 Andrey Belevantsev changed: What|Removed |Added Attachment #29146|0 |1 is obsolete|

[Bug middle-end/56077] [4.6/4.7/4.8 Regression] volatile ignored when function inlined

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56077 --- Comment #9 from Andrey Belevantsev 2013-02-18 11:08:10 UTC --- I will test the patch removing the JUMP_P part of the conditional on x86-64 and ia64, but for 4.8 I'd suggest trying some more platforms, like ppc at the minimum.

[Bug middle-end/55889] [4.8 Regression] ICE: in move_op_ascend, at sel-sched.c:6153 with -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55889 --- Comment #32 from Andrey Belevantsev 2013-02-19 13:50:59 UTC --- Author: abel Date: Tue Feb 19 13:50:50 2013 New Revision: 196137 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=196137 Log: 2012-02-19 Andrey Belevantsev

[Bug middle-end/55889] [4.8 Regression] ICE: in move_op_ascend, at sel-sched.c:6153 with -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55889 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug middle-end/56077] [4.6/4.7/4.8 Regression] volatile ignored when function inlined

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56077 --- Comment #10 from Andrey Belevantsev 2013-02-25 08:48:48 UTC --- Author: abel Date: Mon Feb 25 08:48:42 2013 New Revision: 196252 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=196252 Log: 2013-02-25 Andrey Belevantsev

[Bug middle-end/56077] [4.6/4.7 Regression] volatile ignored when function inlined

work||4.8.0 AssignedTo|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org | Summary|[4.6/4.7/4.8 Regression]|[4.6/4.7 Regression] |volatile ignored when |volatile ignored

[Bug middle-end/45472] [4.6/4.7/4.8 Regression] [Middle-end volatile semantics] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472 --- Comment #26 from Andrey Belevantsev 2013-02-26 09:21:14 UTC --- Created attachment 29539 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=29539 scheduler patch I'm testing the attached patch to fix the ICE in the scheduler. Then

[Bug middle-end/45472] [4.6/4.7/4.8 Regression] [Middle-end volatile semantics] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472 --- Comment #27 from Andrey Belevantsev 2013-02-27 08:56:15 UTC --- Author: abel Date: Wed Feb 27 08:56:08 2013 New Revision: 196308 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=196308 Log: PR middle-end/45472

[Bug middle-end/45472] [4.6/4.7 Regression] [Middle-end volatile semantics] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472 Andrey Belevantsev changed: What|Removed |Added Known to work||4.8.0 Summary|[4

[Bug middle-end/56077] [4.6/4.7 Regression] volatile ignored when function inlined

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56077 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug middle-end/45472] [4.6/4.7 Regression] [Middle-end volatile semantics] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472 --- Comment #29 from Andrey Belevantsev 2013-04-03 05:59:53 UTC --- Ported to 4.7 and 4.6, though no bugzilla commit made. Do I close the bug or do we want to fix the front-end to produce the proper volatile bits?

[Bug rtl-optimization/54472] ICE (spill_failure): unable to find a register to spill in class 'AREG' with -O -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54472 --- Comment #11 from Andrey Belevantsev 2013-04-03 15:51:50 UTC --- (In reply to comment #10) > So are we going to backport this one? Sorry, I've missed this one when backporting other stuff. I can do this tomorrow, the patch is safe. H

[Bug middle-end/56848] [4.7 Regression] ICE (segfault) with the 4.7.3 release candidate

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56848 Andrey Belevantsev changed: What|Removed |Added CC||abel at gcc dot gnu.org

[Bug middle-end/56848] [4.7 Regression] ICE (segfault) with the 4.7.3 release candidate

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56848 Andrey Belevantsev changed: What|Removed |Added CC||rguenth at gcc dot gnu.org

[Bug middle-end/56077] [4.6/4.7 Regression] volatile ignored when function inlined

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56077 --- Comment #16 from Andrey Belevantsev 2013-04-11 06:17:41 UTC --- The patch adds more pending list flushes and thus more dependencies. So by itself it is conservative and should not result in correctness issues that arise when the sched

[Bug rtl-optimization/56912] scheduler change breaks linux kernel LTO build with 4.8

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56912 Andrey Belevantsev changed: What|Removed |Added CC||abel at gcc dot gnu.org

[Bug rtl-optimization/56957] [4.9 regression] ICE in add_insn_after, at emit-rtl.c:3783

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56957 --- Comment #4 from Andrey Belevantsev 2013-04-17 05:14:44 UTC --- (In reply to comment #2) > Breakpoint 5, sel_remove_insn (insn=0x3fffb5da4e78, only_disconnect=false, > full_tidying=false) at ../../trunk/gcc/sel-sched-ir.c:3938 > 3938

[Bug rtl-optimization/56957] [4.9 regression] ICE in add_insn_after, at emit-rtl.c:3783

AssignedTo|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org | --- Comment #5 from Andrey Belevantsev 2013-04-17 06:52:47 UTC --- Created attachment 29886 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=29886 proposed patch Easy enough,

[Bug rtl-optimization/56957] [4.9 regression] ICE in add_insn_after, at emit-rtl.c:3783

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56957 --- Comment #7 from Andrey Belevantsev 2013-04-18 09:18:17 UTC --- (In reply to comment #6) > (In reply to comment #5) > > Created attachment 29886 [details] > > proposed patch > > You should probably make this a static inline function

[Bug rtl-optimization/56957] [4.9 regression] ICE in add_insn_after, at emit-rtl.c:3783

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56957 --- Comment #8 from Andrey Belevantsev 2013-04-22 09:48:37 UTC --- I see some more ICEs of the same type while testing on ia64, so the patch might not be enough in general, though it fixes the original test. I will need to spend more time

[Bug rtl-optimization/56957] [4.9 regression] ICE in add_insn_after, at emit-rtl.c:3783

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56957 Andrey Belevantsev changed: What|Removed |Added Attachment #29886|0 |1 is obsolete|

[Bug rtl-optimization/57105] [4.9 Regression] ICE: in add_insn_before_nobb, at emit-rtl.c:3883 with -Os -fselective-scheduling2 -g

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57105 --- Comment #1 from Andrey Belevantsev 2013-04-29 09:18:26 UTC --- Does the patch from http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56957#c9 fixes your issue?

[Bug rtl-optimization/57105] [4.9 Regression] ICE: in add_insn_before_nobb, at emit-rtl.c:3883 with -Os -fselective-scheduling2 -g

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57105 --- Comment #3 from Andrey Belevantsev 2013-04-29 09:40:11 UTC --- Fine, I've tested it on ia64 and got an offline approval from Alexander, I'd need to test on x86-64 and commit then.

[Bug rtl-optimization/56957] [4.9 regression] ICE in add_insn_after, at emit-rtl.c:3783

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56957 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug rtl-optimization/57105] [4.9 Regression] ICE: in add_insn_before_nobb, at emit-rtl.c:3883 with -Os -fselective-scheduling2 -g

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57105 Andrey Belevantsev changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution

[Bug rtl-optimization/53701] ICE on ia64 (when building Allegro 4.4) in sel-sched

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53701 --- Comment #8 from Andrey Belevantsev 2012-08-09 14:08:38 UTC --- Author: abel Date: Thu Aug 9 14:08:31 2012 New Revision: 190253 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=190253 Log: PR rtl-optimization/53701 * sel-sched.

[Bug rtl-optimization/54455] [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54455 --- Comment #10 from Andrey Belevantsev 2012-09-03 08:21:20 UTC --- (In reply to comment #9) > Created attachment 28121 [details] > gcc48-pr54455.patch > > Patch for 2). asm goto with fallthru labels is pretty hard case, handled in > cfgrtl.c h

[Bug rtl-optimization/54472] ICE (spill_failure): unable to find a register to spill in class 'AREG' with -O -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54472 --- Comment #3 from Andrey Belevantsev 2012-09-04 17:47:24 UTC --- (In reply to comment #2) > For some reason, -fselective-scheduling is moving > > (insn 19 16 22 2 (use (reg/i:SI 0 ax)) testcase.c:6 -1 > (nil)) > > around. This insn marks

[Bug rtl-optimization/54472] ICE (spill_failure): unable to find a register to spill in class 'AREG' with -O -fschedule-insns -fselective-scheduling

reconfirmed||2012-10-04 AssignedTo|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org | Ever Confirmed|0 |1 --- Comment #5 from Andrey Belevantsev 2012-10-04 12:43:36 UTC --- (In

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 --- Comment #20 from Andrey Belevantsev 2012-10-16 13:20:37 UTC --- Author: abel Date: Tue Oct 16 13:20:30 2012 New Revision: 192497 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=192497 Log: Backport from mainline

[Bug rtl-optimization/53701] ICE on ia64 (when building Allegro 4.4) in sel-sched

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53701 --- Comment #9 from Andrey Belevantsev 2012-10-16 13:22:26 UTC --- Author: abel Date: Tue Oct 16 13:22:22 2012 New Revision: 192498 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=192498 Log: 2012-10-16 Andrey Belevantsev

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug rtl-optimization/53701] ICE on ia64 (when building Allegro 4.4) in sel-sched

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53701 --- Comment #10 from Andrey Belevantsev 2012-10-22 19:34:41 UTC --- Author: abel Date: Mon Oct 22 19:34:35 2012 New Revision: 192693 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=192693 Log: Backport from mainline

[Bug rtl-optimization/53701] ICE on ia64 (when building Allegro 4.4) in sel-sched

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53701 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug rtl-optimization/54472] ICE (spill_failure): unable to find a register to spill in class 'AREG' with -O -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54472 --- Comment #7 from Andrey Belevantsev 2012-10-26 14:04:03 UTC --- (In reply to comment #6) > Have you managed to check the patch? The patch does the right thing for sets and clobbers, but the uses case should be amended, too, judging f

[Bug target/51106] [4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #21 from Andrey Belevantsev 2012-10-28 18:17:16 UTC --- (In reply to comment #20) > This issue still exists in mainline, there seems to be no objection to > Andrey's > suggested fix, could someone please commit it? Not quit

[Bug rtl-optimization/48374] ICE: in single_succ_edge, at basic-block.h:562 with -fselective-scheduling2 and __builtin_unreachable()

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48374 --- Comment #6 from Andrey Belevantsev 2012-10-30 08:25:24 UTC --- Author: abel Date: Tue Oct 30 08:25:16 2012 New Revision: 192979 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=192979 Log: Backport from mainline

[Bug rtl-optimization/48374] ICE: in single_succ_edge, at basic-block.h:562 with -fselective-scheduling2 and __builtin_unreachable()

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48374 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug rtl-optimization/54472] ICE (spill_failure): unable to find a register to spill in class 'AREG' with -O -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54472 --- Comment #8 from Andrey Belevantsev 2012-11-09 12:28:30 UTC --- Author: abel Date: Fri Nov 9 12:28:21 2012 New Revision: 193358 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=193358 Log: PR rtl-optimization/54472

[Bug rtl-optimization/54472] ICE (spill_failure): unable to find a register to spill in class 'AREG' with -O -fschedule-insns -fselective-scheduling

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54472 --- Comment #9 from Andrey Belevantsev 2012-11-09 12:33:33 UTC --- Fixed on trunk, backports to 4.7/4.6 are needed.

[Bug rtl-optimization/45352] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45352 --- Comment #22 from Andrey Belevantsev 2010-12-21 12:10:32 UTC --- Created attachment 22834 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=22834 Another patch This patch should fix the last attachment from this bug and also the tests from

[Bug rtl-optimization/46521] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7092 with -Os -fselective-scheduling2 -fsel-sched-pipelining -fprofile-generate -fno-early-inlining

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46521 --- Comment #2 from Andrey Belevantsev 2010-12-21 12:13:08 UTC --- The patch at http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45352#c22 works for this test, too.

[Bug rtl-optimization/46522] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7092 with -O3 -fsel-sched-pipelining -fselective-scheduling2 -funroll-loops

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46522 Andrey Belevantsev changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #3 from Andrey

[Bug rtl-optimization/46522] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7092 with -O3 -fsel-sched-pipelining -fselective-scheduling2 -funroll-loops

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46522 --- Comment #4 from Andrey Belevantsev 2010-12-22 07:46:57 UTC --- Author: abel Date: Wed Dec 22 07:46:53 2010 New Revision: 168164 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=168164 Log: PR rtl-optimization/45352 PR rtl-optimi

[Bug rtl-optimization/45352] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45352 --- Comment #23 from Andrey Belevantsev 2010-12-22 07:46:57 UTC --- Author: abel Date: Wed Dec 22 07:46:53 2010 New Revision: 168164 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=168164 Log: PR rtl-optimization/45352 PR rtl-optim

[Bug rtl-optimization/46521] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7092 with -Os -fselective-scheduling2 -fsel-sched-pipelining -fprofile-generate -fno-early-inlining

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46521 --- Comment #3 from Andrey Belevantsev 2010-12-22 07:46:57 UTC --- Author: abel Date: Wed Dec 22 07:46:53 2010 New Revision: 168164 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=168164 Log: PR rtl-optimization/45352 PR rtl-optimi

[Bug rtl-optimization/45352] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45352 --- Comment #25 from Andrey Belevantsev 2010-12-24 08:23:07 UTC --- Zdenek, please don't worry about the set of flags, it does not make fixing the problem any harder, and your work on finding these is invaluable for us. Sigh, in this case I forg

[Bug rtl-optimization/45352] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45352 --- Comment #27 from Andrey Belevantsev 2011-01-13 09:29:13 UTC --- Author: abel Date: Thu Jan 13 09:29:09 2011 New Revision: 168742 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=168742 Log: PR rtl-optimization/45352 * se

[Bug rtl-optimization/45352] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45352 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug rtl-optimization/46521] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7092 with -Os -fselective-scheduling2 -fsel-sched-pipelining -fprofile-generate -fno-early-inlining

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46521 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug rtl-optimization/46522] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7092 with -O3 -fsel-sched-pipelining -fselective-scheduling2 -funroll-loops

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46522 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug rtl-optimization/46642] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7095 with -fsel-sched-pipelining -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46642 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug rtl-optimization/45472] [4.5/4.6 Regression] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472 --- Comment #14 from Andrey Belevantsev 2011-01-13 10:04:18 UTC --- Do we want at least the patch properly merging the volatile bits in the scheduler for 4.6? Or is this better be s plain ICE instead of a silent miscompile?

[Bug rtl-optimization/47489] ICE in print_pattern, at sched-vis.c:602 (affecting mips, with slim RTL dumps)

||2011.01.28 09:43:05 CC||abel at gcc dot gnu.org Ever Confirmed|0 |1 --- Comment #1 from Andrey Belevantsev 2011-01-28 09:43:05 UTC --- Confirmed. This is because we deliberately abort on SEQUENCEs here

[Bug c++/57599] New: g++ accepts invalid dynamic_cast of a const type to a regular type

Priority: P3 Component: c++ Assignee: unassigned at gcc dot gnu.org Reporter: abel at gcc dot gnu.org The following code is accepted by g++ (versions 3.3, 4.6, 4.7 at least, I didn't check trunk) but seems to be invalid c++ and is rejected by clang 3.2, i

[Bug c++/57599] g++ accepts invalid assignment of a dynamic_cast to A*

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57599 Andrey Belevantsev changed: What|Removed |Added Summary|g++ accepts invalid |g++ accepts invalid

[Bug c++/57599] result of dynamic_cast is just T

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57599 --- Comment #5 from Andrey Belevantsev --- (In reply to Daniel Krügler from comment #4) > I created a test case for all type conversion operators: Paolo has already submitted a patch with the expanded test case at http://gcc.gnu.org/ml/gcc-patche

[Bug c++/57599] result of dynamic_cast is just T

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57599 --- Comment #7 from Andrey Belevantsev --- (In reply to Paolo Carlini from comment #6) > Fixed for 4.9.0. Do you plan to backport this to 4.7 and 4.8?

[Bug rtl-optimization/57662] [4.9 Regression] ICE: SIGSEGV in code_motion_process_successors with -fschedule-insns2 -fselective-scheduling2

||abel at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |abel at gcc dot gnu.org --- Comment #3 from Andrey Belevantsev --- I will take a look, but I will be on vacation in two days, so do not expect much on this until September.

[Bug rtl-optimization/57662] [4.9 Regression] ICE: SIGSEGV in code_motion_process_successors with -fschedule-insns2 -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57662 --- Comment #4 from Andrey Belevantsev --- Created attachment 30650 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30650&action=edit proposed patch When moving up an instruction, we can make empty basic blocks or create other possibilities f

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 --- Comment #13 from Andrey Belevantsev 2012-07-20 08:49:54 UTC --- Author: abel Date: Fri Jul 20 08:49:52 2012 New Revision: 189705 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=189705 Log: Backport from mainline 2012-03

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 Andrey Belevantsev changed: What|Removed |Added AssignedTo|unassigned at gcc dot |abel at gcc dot gnu.org

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 --- Comment #14 from Andrey Belevantsev 2012-07-24 09:22:14 UTC --- The problem is that we don't handle this type of speculation well in sel-sched. While moving an insn through speculation check, it is hard to decide for us whether it is safe, w

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 Andrey Belevantsev changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #17 from Andrey

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 --- Comment #18 from Andrey Belevantsev 2012-07-31 10:56:59 UTC --- Author: abel Date: Tue Jul 31 10:56:52 2012 New Revision: 190005 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=190005 Log: PR target/53975 * sel-sched-i

[Bug target/53975] [ia64] Target register of a speculative load moved to a branch register prior to the chk.s instruction

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53975 --- Comment #19 from Andrey Belevantsev 2012-07-31 11:11:22 UTC --- Fixed on trunk. Judging by the time the original wrong patch went in, this should be a regression and thus I'll commit this to 4.7 too after a week or so.

[Bug rtl-optimization/53701] ICE on ia64 (when building Allegro 4.4) in sel-sched

||2012-08-06 CC||abel at gcc dot gnu.org Known to work|4.8.0 | AssignedTo|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org | Ever Confirmed|0

[Bug rtl-optimization/53701] ICE on ia64 (when building Allegro 4.4) in sel-sched

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53701 --- Comment #7 from Andrey Belevantsev 2012-08-08 11:26:01 UTC --- Created attachment 27959 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27959 proposed patch The problem is that when checking expressions that are blocked for movement beca

[Bug rtl-optimization/48374] ICE: in single_succ_edge, at basic-block.h:562 with -fselective-scheduling2 and __builtin_unreachable()

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48374 --- Comment #5 from Andrey Belevantsev 2012-02-06 08:32:30 UTC --- (In reply to comment #4) > Seems you forgot to actually add the test case. Thanks, I forgot to svn add, fixed in 183928.

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #7 from Andrey Belevantsev 2012-02-06 12:10:17 UTC --- (In reply to comment #6) > Can this be applied to 4.5/4.6 please? Well, the patch was approved for trunk only, but it is committed for two weeks now and looks safe -- Jakub?

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #9 from Andrey Belevantsev 2012-02-09 10:10:41 UTC --- Author: abel Date: Thu Feb 9 10:10:36 2012 New Revision: 184038 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=184038 Log: 2012-02-09 Andrey Belevantsev Backp

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #10 from Andrey Belevantsev 2012-02-09 10:17:59 UTC --- Author: abel Date: Thu Feb 9 10:17:55 2012 New Revision: 184040 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=184040 Log: 2012-02-09 Andrey Belevantsev Back

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 Andrey Belevantsev changed: What|Removed |Added Status|NEW |RESOLVED Resolution|

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org | --- Comment #1 from Andrey Belevantsev 2012-02-11 12:52:38 UTC --- Thanks, Zdenek and Steven, I'll look at this on Monday. I bet this is caused by yet another insn without a reservation.

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52203 --- Comment #2 from Andrey Belevantsev 2012-02-13 08:48:35 UTC --- Well, in this case the insn is vcvtps2pd (from avx_cvtps2pd256 and *avx_cvtps2pd256_2 patterns) but not having a reservation looks correct as the manual says "decode type -- micro

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52203 Andrey Belevantsev changed: What|Removed |Added CC||ubizjak at gmail dot com --- Comment

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52203 --- Comment #8 from Andrey Belevantsev 2012-02-14 06:56:10 UTC --- Sorry, I didn't explain clearly from the start. Regarding the backend, I just wanted to double check that for the given insn not having a reservation is correct. Now that Uros c

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 --- Comment #3 from Andrey Belevantsev 2012-02-22 18:49:15 UTC --- I'll take a look on Friday, tomorrow I am off work. Indeed I do not remember seeing these notes at the assert time.

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 --- Comment #5 from Andrey Belevantsev 2012-02-27 13:03:58 UTC --- When removing an empty block, we need to find its neighbour to stick the bb note list to, and the code doing this now just picks some pred block from the loop that redirects preds

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org |

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 Andrey Belevantsev changed: What|Removed |Added CC||amonakov at gcc dot gnu.org --- Comm

[Bug rtl-optimization/52250] [4.7/4.8 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 --- Comment #9 from Andrey Belevantsev 2012-03-06 07:31:49 UTC --- Author: abel Date: Tue Mar 6 07:31:43 2012 New Revision: 184975 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=184975 Log: PR rtl-optimization/52250 * sel

[Bug rtl-optimization/52250] [4.7 Regression] ICE: in sel_remove_bb, at sel-sched-ir.c:5213 with -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops -fselective-scheduling2 and other flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52250 Andrey Belevantsev changed: What|Removed |Added Known to work||4.8.0 Target Milestone|4.7.0

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52203 --- Comment #9 from Andrey Belevantsev 2012-03-07 12:00:42 UTC --- Author: abel Date: Wed Mar 7 12:00:37 2012 New Revision: 185036 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=185036 Log: PR rtl-optimization/52203 * sel

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52203 Andrey Belevantsev changed: What|Removed |Added Known to work||4.8.0 --- Comment #10 from Andrey Be

[Bug rtl-optimization/52715] [4.8 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7140 with -fselective-scheduling2 -funroll-loops --param=max-average-unrolled-insns=406

||2012-03-26 AssignedTo|unassigned at gcc dot |abel at gcc dot gnu.org |gnu.org | Ever Confirmed|0 |1 --- Comment #1 from Andrey Belevantsev 2012-03-26 12:26:53 UTC --- Sigh. Of course

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 Andrey Belevantsev changed: What|Removed |Added Status|RESOLVED|REOPENED CC|

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #15 from Andrey Belevantsev 2012-03-27 13:06:41 UTC --- (In reply to comment #14) > (In reply to comment #13) > > It's failing not only on sh, but on x86-64 too, started with (no surprise > > here) > > r185564: ... > > Is it related

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #16 from Andrey Belevantsev 2012-03-27 13:28:03 UTC --- So, something like the below patch, or even better -- as we want to fold all RTL-build related pseudo passes into expand, make pass_instantiate_virtual_regs also the expand part

[Bug target/51106] [4.5/4.6 Regression] ICE in move_insn, at haifa-sched.c:2314

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51106 --- Comment #18 from Andrey Belevantsev 2012-03-27 14:08:23 UTC --- (In reply to comment #17) > Looks reasonable. Though I think that whoever removed the fallthru > edge should have adjusted the flags on the others. That's simply delete_basic_bl

[Bug rtl-optimization/52203] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7136 with -fsel-sched-pipelining -fselective-scheduling2 and other custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52203 --- Comment #11 from Andrey Belevantsev 2012-04-13 09:36:46 UTC --- Author: abel Date: Fri Apr 13 09:36:42 2012 New Revision: 186410 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=186410 Log: PR rtl-optimization/52203 PR r

[Bug rtl-optimization/52715] [4.8 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7140 with -fselective-scheduling2 -funroll-loops --param=max-average-unrolled-insns=406

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52715 --- Comment #2 from Andrey Belevantsev 2012-04-13 09:36:47 UTC --- Author: abel Date: Fri Apr 13 09:36:42 2012 New Revision: 186410 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=186410 Log: PR rtl-optimization/52203 PR rt

[Bug rtl-optimization/52715] [4.8 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7140 with -fselective-scheduling2 -funroll-loops --param=max-average-unrolled-insns=406

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52715 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug rtl-optimization/57662] [4.9 Regression] ICE: SIGSEGV in code_motion_process_successors with -fschedule-insns2 -fselective-scheduling2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57662 --- Comment #6 from Andrey Belevantsev --- (In reply to Richard Biener from comment #5) > Fixed according to > > 2013-08-14 Andrey Belevantsev > > PR rtl-optimization/57662 > * sel-sched.c (code_motion_process_successors): Whe

[Bug rtl-optimization/57422] [4.9 Regression] ICE: SIGSEGV in dominated_by_p with custom flags

|unassigned at gcc dot gnu.org |abel at gcc dot gnu.org --- Comment #3 from Andrey Belevantsev --- Created attachment 31465 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31465&action=edit proposed patch This is an issue with somewhat surprising reason. The problem in itself is that whe

[Bug rtl-optimization/57422] [4.9 Regression] ICE: SIGSEGV in dominated_by_p with custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57422 --- Comment #4 from Andrey Belevantsev --- Author: abel Date: Mon Dec 23 06:41:22 2013 New Revision: 206173 URL: http://gcc.gnu.org/viewcvs?rev=206173&root=gcc&view=rev Log: PR rtl-optimization/57422 * sel-sched.c (mark_unavailabl

[Bug rtl-optimization/57422] [4.9 Regression] ICE: SIGSEGV in dominated_by_p with custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57422 --- Comment #5 from Andrey Belevantsev --- Author: abel Date: Mon Dec 23 06:43:49 2013 New Revision: 206174 URL: http://gcc.gnu.org/viewcvs?rev=206174&root=gcc&view=rev Log: PR rtl-optimization/57422 * sel-sched.c (fill_vec_av_set

[Bug rtl-optimization/57422] [4.9 Regression] ICE: SIGSEGV in dominated_by_p with custom flags

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57422 Andrey Belevantsev changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

  1   2   3   4   >