https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120469
--- Comment #2 from Paul Cercueil ---
(In reply to Andrew Pinski from comment #1)
> I think this is by design, relaxed atomic stores on the rtl level are
> modeled like volatile stores. And volatile stores are NOT put in delay slots
> either.
S
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120469
Bug ID: 120469
Summary: [SH] Delay slot optimization opportunity missed with
atomic writes
Product: gcc
Version: 15.1.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120209
--- Comment #2 from Paul Cercueil ---
> The test case is somewhat bogus. Changing the "-1.0f" to "1.0f" will
> generate the "fldi1" instruction for the comparison as well.
Yes, I got confused while writing the bug report. The problem is loadin
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120209
Bug ID: 120209
Summary: [SH] Float constant 1.0 is loaded from constant pool
Product: gcc
Version: 15.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Comp
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115102
--- Comment #3 from Paul Cercueil ---
Created attachment 58313
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58313&action=edit
Proposed fix
Attached is the proposed fix.
Credits go to Oleg for the original solution.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115102
Bug ID: 115102
Summary: [SH] GCC misunderstands swap.b instruction
Product: gcc
Version: 14.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tar
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86879
Paul Cercueil changed:
What|Removed |Added
CC||paul at crapouillou dot net
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109874
Bug ID: 109874
Summary: [SH] GCC 13's -Os code is 50% bigger than GCC 4's
Product: gcc
Version: 13.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Compone