[Bug target/121412] AArch64 SVE VLS vs VLA ICE building Pytorch with LTO

2025-08-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121412 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to work|15.1.1 | CC

[Bug target/121412] [16 Regression] AArch64 SVE VLS vs VLA ICE building Pytorch with LTO

2025-08-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121412 --- Comment #5 from ktkachov at gcc dot gnu.org --- Comment on attachment 62057 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62057 Second sleeffoo.i reproducer >#pragma GCC aarch64 "arm_sve.h" >typedef svfl

[Bug target/121412] [16 Regression] AArch64 SVE VLS vs VLA ICE building Pytorch with LTO

2025-08-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121412 ktkachov at gcc dot gnu.org changed: What|Removed |Added Summary|AArch64 SVE VLS vs VLA ICE |[16 Regression] AArch64

[Bug target/121412] AArch64 SVE VLS vs VLA ICE building Pytorch with LTO

2025-08-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121412 --- Comment #1 from ktkachov at gcc dot gnu.org --- Created attachment 62057 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62057&action=edit Second sleeffoo.i reproducer

[Bug target/121412] New: AArch64 SVE VLS vs VLA ICE building Pytorch with LTO

2025-08-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Created attachment 62056 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62056&action=edi

[Bug target/121315] New: Missed LDP/STP fusion opportunity

2025-07-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org CC: acoplan at gcc dot gnu.org Target Milestone: --- Target: aarch64 We have some C++ code that implements various reversed memcpy-like

[Bug tree-optimization/121034] [16 Regression] ICE in vect_transform_reduction

2025-07-11 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121034 --- Comment #4 from ktkachov at gcc dot gnu.org --- (In reply to Richard Biener from comment #3) > Should be fixed now. Looks like it. Thanks for the quick fix!

[Bug tree-optimization/121034] New: [16 Regression] ICE in vect_transform_reduction

2025-07-11 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org CC: rguenth at gcc dot gnu.org Target Milestone: --- Target: aarch64 Reduced testcase: int b, e; char c, d

[Bug tree-optimization/121034] [16 Regression] ICE in vect_transform_reduction

2025-07-11 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121034 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to work||15.1.0 Known to fail

[Bug target/120999] Assembler warning about MOVPRFX generation for NBSL instructions

2025-07-09 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120999 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed

[Bug target/120999] New: Assembler warning about MOVPRFX generation for NBSL instructions

2025-07-08 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 When using the NBSL SVE2 instruction to generate a NOR operation GCC

[Bug target/120926] New: Optimise away SVE PTRUE when applied to CNTP instruction

2025-07-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 #include uint64_t foo(svbool_t p) { return svcntp_b64

[Bug target/120632] AArch64 SVE build of GROMACS measurably slower with GCC than LLVM

2025-06-19 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120632 --- Comment #2 from ktkachov at gcc dot gnu.org --- [tag] [reply] [−]descriptionktkac...@gcc.gnu.org 2025-03-18 08:54:08 UTC Tamar and I have been discussing this offline but now that we have a reproducer with all public sources here's

[Bug target/120687] RISC-V: very poor vector code gen for LMbench bw_mem test case

2025-06-17 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120687 --- Comment #2 from ktkachov at gcc dot gnu.org --- I similarly see this generates ~200 lines of assembly for aarch64 compared to ~20 with Clang so I'd mark it as target-independent. I think I remember a bug in the past about the need for

[Bug tree-optimization/119187] vectorizer should be able to SLP already vectorized code

2025-06-12 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119187 --- Comment #9 from ktkachov at gcc dot gnu.org --- (In reply to Tamar Christina from comment #8) > (In reply to ktkachov from comment #7) > > Could this be extended to scale Neon intrinsics code to SVE by > > re-vectorising an

[Bug target/120632] New: AArch64 SVE build of GROMACS measurably slower with GCC than LLVM

2025-06-11 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
, missed-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Building and running GROMACS in the same way as in

[Bug target/120447] [16 Regression] cpython fails to compile on AArch64 after r16-446-g210d06502f22964c7214586c54f8eb54a6965bfd

2025-06-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120447 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/120447] [16 Regression] cpython fails to compile on AArch64 after r16-446-g210d06502f22964c7214586c54f8eb54a6965bfd

2025-05-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120447 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed|2025-05-27 00:00:00 |2025-5-30

[Bug middle-end/120276] [16 Regression] ICE in partial_subreg_p with SVE

2025-05-22 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120276 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug middle-end/120276] [16 Regression] ICE in partial_subreg_p with SVE

2025-05-14 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120276 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||rsandifo at gcc dot

[Bug middle-end/120276] New: [16 Regression] ICE in partial_subreg_p with SVE

2025-05-14 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 int a; char b[1]; int c[18]; void d(char *); void e() { int f; char *g; a = 0

[Bug middle-end/120276] [16 Regression] ICE in partial_subreg_p with SVE

2025-05-14 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120276 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||jschmitz at gcc dot

[Bug middle-end/120276] [16 Regression] ICE in partial_subreg_p with SVE

2025-05-14 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120276 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to fail||16.0 Target Milestone

[Bug target/120157] No use of SVE early break vectorisation in FP loop

2025-05-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120157 --- Comment #4 from ktkachov at gcc dot gnu.org --- (In reply to ktkachov from comment #2) > (In reply to Tamar Christina from comment #1) > > (In reply to ktkachov from comment #0) > > > Not sure if this is a target-specific

[Bug target/120157] No use of SVE early break vectorisation in FP loop

2025-05-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120157 --- Comment #2 from ktkachov at gcc dot gnu.org --- (In reply to Tamar Christina from comment #1) > (In reply to ktkachov from comment #0) > > Not sure if this is a target-specific issue or not. For input: > > int f11(float *x, f

[Bug target/120157] New: No use of SVE early break vectorisation in FP loop

2025-05-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org CC: tnfchris at gcc dot gnu.org Target Milestone: --- Target: aarch64 Not sure if this is a target-specific

[Bug target/120067] RISC-V: x264 sub4x4_dct high icount

2025-05-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120067 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/120027] Missing simplifications of SVE uxtb intrinsics

2025-05-01 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120027 --- Comment #1 from ktkachov at gcc dot gnu.org --- Note Clang is working on improving some of the cases on their side https://github.com/llvm/llvm-project/pull/137956

[Bug target/120027] New: Missing simplifications of SVE uxtb intrinsics

2025-04-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Some cases: #include #define UXT(SZ, TY) \ svuint##SZ##_t uxt##TY##_z_##SZ(svuint##SZ

[Bug target/119974] Missing combination of SVE RDFFRS

2025-04-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119974 ktkachov at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |INVALID

[Bug target/119974] New: Missing combination of SVE RDFFRS

2025-04-28 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 A testcase: #include int foo(double *x, double val, int n) { double *endp = x + n; uint64_t

[Bug tree-optimization/119706] [12/13 regression] ICE in gimple pass 'dom' for -O3 -mcpu=grace --param=aarch64-autovec-preference=sve-only

2025-04-22 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119706 --- Comment #11 from ktkachov at gcc dot gnu.org --- (In reply to GCC Commits from comment #10) > The releases/gcc-14 branch has been updated by Richard Biener > : > > https://gcc.gnu.org/g:2bb4a431eace7e77562e686ecc9c9504045da003

[Bug tree-optimization/119706] [15 regression] ICE in gimple pass 'dom' for -O3 -mcpu=grace --param=aarch64-autovec-preference=sve-only

2025-04-10 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119706 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to fail||15.0 Target Milestone

[Bug tree-optimization/119706] [15 regression] ICE in gimple pass 'dom' for -O3 -mcpu=grace --param=aarch64-autovec-preference=sve-only

2025-04-10 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119706 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug tree-optimization/119187] vectorizer should be able to SLP already vectorized code

2025-04-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119187 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug tree-optimization/119351] [15 Regression] Wrong code in GROMACS for AArch64 generic SVE VLS target

2025-04-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119351 --- Comment #11 from ktkachov at gcc dot gnu.org --- (In reply to Jakub Jelinek from comment #10) > Has this worked in GCC 14? If so, has it been bisected what commit caused > this (or made a bug no longer latent)? Yes,

[Bug target/119572] [15 Regression] Recent change triggers regression on RISC-V vector test

2025-04-01 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119572 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug rtl-optimization/97286] simplified subreg used outside of the loop can cause conflict and cause an extra move inside the loop

2025-04-01 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97286 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug middle-end/119442] [14 Regression] Regression in creating SVE predicate

2025-03-31 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119442 ktkachov at gcc dot gnu.org changed: What|Removed |Added Summary|[14/15 Regression] |[14 Regression] Regression

[Bug middle-end/119442] [14/15 Regression] Regression in creating SVE predicate

2025-03-24 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119442 --- Comment #2 from ktkachov at gcc dot gnu.org --- Patch at https://gcc.gnu.org/pipermail/gcc-patches/2025-March/679115.html

[Bug middle-end/119442] [14/15 Regression] Regression in creating SVE predicate

2025-03-24 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119442 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED

[Bug middle-end/119442] New: [14/15 Regression] Regression in creating SVE predicate

2025-03-24 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 The testcase is nonsense in itself but is heavily reduced from a real

[Bug tree-optimization/119351] [15 Regression] Wrong code in GROMACS for AArch64 generic SVE VLS target

2025-03-20 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119351 --- Comment #5 from ktkachov at gcc dot gnu.org --- (In reply to Tamar Christina from comment #4) > While looking at the codegen it looks like GROMACS has a lot of loops that > get vectorized now and it's showing some inefficien

[Bug middle-end/119384] Extra move in tight loop with SIMD and subregs

2025-03-20 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119384 --- Comment #1 from ktkachov at gcc dot gnu.org --- > We have a workload for aarch64 using the SIMDe translation error Oops, this should say "SIMDe translation layer"

[Bug middle-end/119384] New: Extra move in tight loop with SIMD and subregs

2025-03-20 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 We have a workload for aarch64 using the SIMDe translation error that results in slower code than

[Bug tree-optimization/119351] [15 Regression] Wrong code in GROMACS for AArch64 generic SVE VLS target

2025-03-18 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119351 --- Comment #1 from ktkachov at gcc dot gnu.org --- > -DCMAKE_C_COMPILER=$COMPILERBIN -DCMAKE_CXX_COMPILER=$COMPILERXXBIN $COMPILERBIN and $COMPILERXXBIN should point to the gcc and g++ executables

[Bug tree-optimization/119351] New: [15 Regression] Wrong code in GROMACS for AArch64 generic SVE VLS target

2025-03-18 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
: wrong-code Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org CC: acoplan at gcc dot gnu.org, tnfchris at gcc dot gnu.org Target Milestone

[Bug tree-optimization/119193] New: Suboptimal packing codegen

2025-03-10 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Example source: #include #define PACK_8_TO_64( a, b, c, d, e, f, g, h )\ (((uint64_t)a&

[Bug rtl-optimization/119046] [15 Regression] Performance drop from not forming lane-wise FMLAs with Eigen library

2025-03-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119046 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug rtl-optimization/119046] [15 Regression] Performance drop from not forming lane-wise FMLAs with Eigen library

2025-02-27 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119046 ktkachov at gcc dot gnu.org changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |ktkachov at gcc dot

[Bug rtl-optimization/119046] [15 Regression] Performance drop from not forming lane-wise FMLAs with Eigen library

2025-02-27 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119046 --- Comment #2 from ktkachov at gcc dot gnu.org --- (In reply to Tamar Christina from comment #1) > The late-combine pass was supposed to handle these. probably worth a look > into why it's not folding them in. Yeah you're rig

[Bug rtl-optimization/119046] New: [15 Regression] Performance drop from not forming lane-wise FMLAs with Eigen library

2025-02-27 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Keywords: missed-optimization Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Created attachment 60603 --> https://gcc.gnu.org/bugzi

[Bug tree-optimization/119042] New: Optimize more !struct.x && !struct.y codegen cases

2025-02-27 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Taken from the LLVM report: https://github.com/llvm/llvm-project/issues/12

[Bug target/118976] [12/13/14/15 regression] Correctness Issue: SVE vectorization results in data corruption when cpu has 128bit vectors but compiled with -mcpu=neoverse-v1 (which is only for 256bit v

2025-02-24 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118976 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/118151] Relax the SVE PTEST matching conditions for any/none (ne/eq)

2025-02-24 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118151 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/118974] New: Use SVE cbranch sequence for Neon modes when TARGET_SVE

2025-02-21 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org CC: tnfchris at gcc dot gnu.org Target Milestone: --- Target: aarch64 For example, the testcase

[Bug target/118952] AArch64 get_fpcr and set_fpcr builtins don't block reordering of operations past them

2025-02-20 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118952 --- Comment #2 from ktkachov at gcc dot gnu.org --- (In reply to Richard Sandiford from comment #1) > I think this is essentially the same problem as PR34678. Thanks, yeah I don't see PR34678 getting generally resolved any time soon.

[Bug target/118952] New: AArch64 get_fpcr and set_fpcr builtins don't block reordering of operations past them

2025-02-20 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
IRMED Keywords: wrong-code Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 The __builtin_aarch64_set_fpc

[Bug target/117978] Optimise 128-bit-predicated SVE loads to Advanced SIMD LDRs

2025-02-17 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117978 --- Comment #4 from ktkachov at gcc dot gnu.org --- (In reply to Richard Sandiford from comment #3) > I think this would be better done in expand rather than gimple. The gimple > representation would be a vector load in a 128-bit type, fo

[Bug tree-optimization/118852] [15 regression] Train run of 502.gcc_r compiled with -Ofast -fprofile-generate -march=x86_64-v3 fails

2025-02-13 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118852 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug tree-optimization/118852] [15 regression] Train run of 502.gcc_r compiled with -Ofast -fprofile-generate -march=x86_64-v3 fails

2025-02-13 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118852 --- Comment #5 from ktkachov at gcc dot gnu.org --- (In reply to Tamar Christina from comment #4) > (In reply to ktkachov from comment #3) > > FWIW I see this also on aarch64 > > I filed the AArch64 bug weeks ago > https://gc

[Bug middle-end/118490] [15 Regression] ICE Indefinite recursion transforming exp-log with -frounding-math since r15-5116-ge232dc3bb5c3e8

2025-01-27 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118490 ktkachov at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |FIXED Status

[Bug target/116445] gcc.target/arm/unsigned-extend-2.c on Cortex-M55 and misses possible Cortex-M optimization

2025-01-21 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116445 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug middle-end/118490] [15 Regression] ICE Indefinite recursion transforming exp-log with -frounding-math since r15-5116-ge232dc3bb5c3e8

2025-01-16 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118490 ktkachov at gcc dot gnu.org changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |soumyaa at gcc dot

[Bug middle-end/118490] [15 Regression] ICE Indefinite recursion transforming exp-log with -frounding-math since r15-5116-ge232dc3bb5c3e8

2025-01-15 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118490 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/118377] ICE when using C division operator with svint8 and svint16

2025-01-15 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118377 --- Comment #8 from ktkachov at gcc dot gnu.org --- (In reply to Tejas Belagod from comment #7) > Sorry for the delay in replying. Though variable-length(VLA) SVE vector > types behave as GNU vectors for C/C++ operator semantics, th

[Bug target/118133] Consider alternative ways of writing aarch64-simd-pragma-builtins.def

2024-12-19 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118133 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/117978] Optimise 128-bit-predicated SVE loads to Advanced SIMD LDRs

2024-12-10 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117978 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||rsandifo at gcc dot

[Bug target/117978] New: Optimise 128-bit-predicated SVE loads to Advanced SIMD LDRs

2024-12-09 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
, missed-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 When it is known that the predicate on a zero-predicated

[Bug testsuite/117704] gcc.dg/tree-ssa/pow_fold_1.c FAILs on 32-bit x86

2024-11-20 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117704 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug tree-optimization/117557] [15 Regression] gcc_r miscompiles in SPECCPU 2017 with SVE2 since g:3d498cfe022f6e035ff24e0d78ff744da83ebf42

2024-11-13 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117557 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed

[Bug tree-optimization/117554] [15 Regression] ICE building 538.imagick_r with SVE -msve-vector-bits=128

2024-11-13 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117554 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |15.0

[Bug tree-optimization/117554] New: [15 Regression] ICE building 538.imagick_r with SVE -msve-vector-bits=128

2024-11-13 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
: aarch64-sve, ice-on-valid-code Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Building imagick ICEs on aarch64

[Bug tree-optimization/117499] New: [15 Regression] Segfault ICE building 511.povray_r

2024-11-08 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Building the benchmark from SPEC2017 runs into a segfault ICE on aarch64. Reduced

[Bug target/117449] [15 Regression] ICE in gen_reg_rtx on aarch64 via aarch64_emit_opt_vec_rotate

2024-11-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117449 ktkachov at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |FIXED Status

[Bug target/117449] [15 Regression] ICE in gen_reg_rtx on aarch64 via aarch64_emit_opt_vec_rotate

2024-11-05 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117449 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2024-11-05 Target

[Bug target/117048] Failure to combine into XAR instruction

2024-11-04 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117048 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug target/117344] New: Suboptimal use of movprfx in SVE intrinsics code

2024-10-29 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 I'm not sure how bad this is in real code but spotted the testcase: #in

[Bug target/106329] No optimization for SVE pfalse predicate

2024-10-22 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106329 ktkachov at gcc dot gnu.org changed: What|Removed |Added Assignee|prathamesh3492 at gcc dot gnu.org |unassigned at gcc

[Bug tree-optimization/117093] Missing detection of REV64 vector permute

2024-10-16 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117093 --- Comment #4 from ktkachov at gcc dot gnu.org --- (In reply to ktkachov from comment #3) > If we remove the casts: > uint32x4_t ror32_neon_tgt_gcc_bad(uint32x4_t r) { > uint32x4_t a = r; > uint32_t t; > t = a[0]; a

[Bug tree-optimization/117093] Missing detection of REV64 vector permute

2024-10-16 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117093 --- Comment #3 from ktkachov at gcc dot gnu.org --- I think it's the VIEW_CONVERT_EXPR that are hurting us (more complete dump before expand): _1 = VIEW_CONVERT_EXPR(r_3(D)); t_4 = BIT_FIELD_REF ; a_5 = VEC_PERM_EXPR <_1, _1, { 1,

[Bug target/117048] Failure to combine into XAR instruction

2024-10-16 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117048 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|RESOLVED|ASSIGNED

[Bug tree-optimization/117093] New: Missing detection of REV64 vector permute

2024-10-11 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org CC: tnfchris at gcc dot gnu.org Target Milestone: --- Target: aarch64 This testcase is reduced from a hashing code

[Bug target/117048] Failure to combine into XAR instruction

2024-10-11 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117048 ktkachov at gcc dot gnu.org changed: What|Removed |Added Known to work||15.0 Resolution

[Bug tree-optimization/117050] [15 Regression] ice in vect_build_slp_tree_2

2024-10-10 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117050 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2024-10-10 Ever

[Bug target/117048] Failure to combine into XAR instruction

2024-10-09 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117048 ktkachov at gcc dot gnu.org changed: What|Removed |Added Last reconfirmed||2024-10-09

[Bug target/117048] Failure to combine into XAR instruction

2024-10-09 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117048 --- Comment #1 from ktkachov at gcc dot gnu.org --- Yeah, there is code in simplify-rtx.cc:3467 to simplify this pattern to a rotate but it doesn't handle vector operands

[Bug target/117048] New: Failure to combine into XAR instruction

2024-10-09 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 A testcase derived from a hashing algorithm: #include #include #include static inline uint64x2_t

[Bug target/117045] Incorrect fold of SVE's svwhilele

2024-10-09 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117045 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/117013] aarch64 should define spaceship4 optab

2024-10-08 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117013 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||ktkachov at gcc dot

[Bug target/116999] Fold SVE whilelt/le comparisons with max int value to ptrue

2024-10-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116999 --- Comment #1 from ktkachov at gcc dot gnu.org --- This is inspired by the LLVM PR https://github.com/llvm/llvm-project/pull/83

[Bug target/116999] New: Fold SVE whilelt/le comparisons with max int value to ptrue

2024-10-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 Example testcase: #include #include svbool_t foo_s32_le (int32_t

[Bug target/116934] [15 Regression] ICE building 526.blender_r

2024-10-07 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug tree-optimization/116956] [15 Regression] ICE when building PALM with gfortran: in vect_analyze_loop_1, at tree-vect-loop.cc:3510

2024-10-03 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116956 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |15.0 Summary

[Bug target/116934] [15 Regression] ICE building 526.blender_r

2024-10-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934 ktkachov at gcc dot gnu.org changed: What|Removed |Added CC||saurabh.jha at arm dot com

[Bug target/116934] [15 Regression] ICE building 526.blender_r

2024-10-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |15.0

[Bug target/116934] New: [15 Regression] ICE building 526.blender_r

2024-10-02 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 blender from SPEC2017 ICEs with current trunk. The reduced testcase is: int a; float *b; void c() { for

[Bug target/111733] Emit inline SVE FSCALE instruction for ldexp

2024-09-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111733 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #3

[Bug tree-optimization/116902] [15 Regression] ICE Another definition in block 43 follows the use

2024-09-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116902 ktkachov at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |15.0 Summary

[Bug tree-optimization/116902] New: ICE Another definition in block 43 follows the use

2024-09-30 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- The following C++ testcase ICEs on aarch64 with -O3: unsigned a; #include void i(long b, char c[][4], long d[][4

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