https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120276

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
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                 CC|                            |rsandifo at gcc dot gnu.org

--- Comment #2 from ktkachov at gcc dot gnu.org ---
Had a quick look. The ICE through regcprop comes in partial_subreg_p:
  /* Modes involved in a subreg must be ordered.  In particular, we must
     always know at compile time whether the subreg is paradoxical.  */
  poly_int64 outer_prec = GET_MODE_PRECISION (outermode);
  poly_int64 inner_prec = GET_MODE_PRECISION (innermode);
  gcc_checking_assert (ordered_p (outer_prec, inner_prec));

Where the two modes are VNx4QI and V8QI.
The regcprop code that calls this is:
  /* If a narrower value is copied using wider mode, the upper bits
     are undefined (could be e.g. a former paradoxical subreg).  Signal
     in that case we've only copied value using the narrower mode.
     Consider:
     (set (reg:DI r14) (mem:DI ...))
     (set (reg:QI si) (reg:QI r14))
     (set (reg:DI bp) (reg:DI r14))
     (set (reg:DI r14) (const_int ...))
     (set (reg:DI dx) (reg:DI si))
     (set (reg:DI si) (const_int ...))
     (set (reg:DI dx) (reg:DI bp))
     The last set is not redundant, while the low 8 bits of dx are already
     equal to low 8 bits of bp, the other bits are undefined.  */
  else if (partial_subreg_p (vd->e[sr].mode, GET_MODE (src)))

I'm not super familiar with that pass, but could it be that we need another
check on the modes before calling partial_subreg_p here or maybe do some other
comparison between the modes?

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