https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78002
Jiong Wang changed:
What|Removed |Added
CC||sch...@linux-m68k.org
--- Comment #4 from J
||jiwang at gcc dot gnu.org
Resolution|--- |DUPLICATE
--- Comment #2 from Jiong Wang ---
Dupliate PR target/78002
*** This bug has been marked as a duplicate of bug 78002 ***
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78881
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #22
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79356
--- Comment #10 from Jiong Wang ---
Author: jiwang
Date: Wed Mar 15 15:33:12 2017
New Revision: 246167
URL: https://gcc.gnu.org/viewcvs?rev=246167&root=gcc&view=rev
Log:
[gcc, testsuite] Don't xfail on arm
PR testsuite/79356
* g
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66295
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #11
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78016
Jiong Wang changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78016
--- Comment #4 from Jiong Wang ---
(In reply to Eric Botcazou from comment #3)
> > I am wondering whether it's OK to use copy_insn_1 here? that is to replace
> > the whole for loop into something simply as "REG_NOTES (new_insn) =
> > copy_insn_1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78016
--- Comment #2 from Jiong Wang ---
(In reply to Eric Botcazou from comment #1)
> > I attached a simply fix to keep REG-NOTE order during insn copy.
> >
> > Any comments?
>
> This seems reasonable if you need it for the DWARF CFI stuff, but note
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
CC: ebotcazou at gcc dot gnu.org, jakub at redhat dot com
Target Milestone: ---
Created attachment 39826
--> https://gcc.gnu.org/bugzi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77439
Jiong Wang changed:
What|Removed |Added
Assignee|jiwang at gcc dot gnu.org |unassigned at gcc dot
gnu.org
Keywords: xfail
Severity: minor
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
Target Milestone: ---
Target: arm*
The are listed on at least ACLE 2.0 for ARM32, but GCC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71680
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71061
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71061
--- Comment #1 from Jiong Wang ---
Author: jiwang
Date: Sat Jun 11 20:42:26 2016
New Revision: 237331
URL: https://gcc.gnu.org/viewcvs?rev=237331&root=gcc&view=rev
Log:
[ARM] length pop* pattern in epilogue correctly
PR target/71061
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751
Jiong Wang changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Thu Jun 9 21:28:31 2016
New Revision: 237277
URL: https://gcc.gnu.org/viewcvs?rev=237277&root=gcc&view=rev
Log:
[Patch] PR70751, correct the cost for spilling non-pseudo into memory
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751
--- Comment #4 from Jiong Wang ---
Thanks, I will prepare a patch after various testing OK.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751
--- Comment #2 from Jiong Wang ---
Vlad,
Do you have any comments on this regression?
*arm_movsi_insn has the following operand constraints:
operand 0: "=rk,r,r,r,rk,m"
operand 1: "rk, I,K,j,mi,rk"
As r235184 won't explicitly refuse an
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63596
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63596
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Fri May 27 13:05:34 2016
New Revision: 236819
URL: https://gcc.gnu.org/viewcvs?rev=236819&root=gcc&view=rev
Log:
[AArch64] PR target/63596, honor tree-stdarg analysis result to improve VAAR
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71150
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71150
--- Comment #3 from Jiong Wang ---
Author: jiwang
Date: Wed May 18 14:37:28 2016
New Revision: 236396
URL: https://gcc.gnu.org/viewcvs?rev=236396&root=gcc&view=rev
Log:
[Patch, lra] Guard in_class_p with REG_P check
gcc/
PR rtl-optimiz
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71150
Jiong Wang changed:
What|Removed |Added
Target||i386*
Status|NEW
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70227
Jiong Wang changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70227
--- Comment #3 from Jiong Wang ---
Author: jiwang
Date: Mon May 16 08:11:42 2016
New Revision: 236265
URL: https://gcc.gnu.org/viewcvs?rev=236265&root=gcc&view=rev
Log:
[testsuite] PR70227, skip g++.dg/lto/pr69589_0.C on targets without -rdynami
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70904
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70904
--- Comment #4 from Jiong Wang ---
Author: jiwang
Date: Thu May 12 17:00:52 2016
New Revision: 236181
URL: https://gcc.gnu.org/viewcvs?rev=236181&root=gcc&view=rev
Log:
[LRA] PR70904, relax the restriction on subreg reload for wide mode
2016-0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71061
Jiong Wang changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed|
Severity: minor
Priority: P3
Component: target
Assignee: jiwang at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
Target Milestone: ---
Target: arm*
This is causing wrong size calculation and may affect some rtl pass, for
example bb
,
||spu-unknown-elf
CC||jiwang at gcc dot gnu.org
--- Comment #2 from Jiong Wang ---
I suspect all elf target will fail this except xtensa which has explicitly
-rdynamic support for elf
(https://gcc.gnu.org/ml/gcc-patches/2011-02
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70904
Jiong Wang changed:
What|Removed |Added
CC||vmakarov at redhat dot com
--- Comment #2 f
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63596
--- Comment #4 from Jiong Wang ---
A patch set which clean up variable argument support on AArch64 has been sent
for review
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg00508.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70948
--- Comment #4 from Jiong Wang ---
(In reply to Richard Biener from comment #3)
> The following should fix it, I am going to test it on x86_64:
>
> Index: gcc/tree-ssa-structalias.c
> =
||2016-05-06
CC||jiwang at gcc dot gnu.org
Assignee|unassigned at gcc dot gnu.org |jiwang at gcc dot
gnu.org
Ever confirmed|0 |1
--- Comment #1 from Jiong Wang ---
Confirmed, I will have a
: UNCONFIRMED
Keywords: missed-optimization
Severity: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
CC: rguenth at gcc dot gnu.org
Target
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
CC: vmakarov at redhat dot com
Target Milestone: ---
Target: arm*
r235184 caused the following
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70628
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #9
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67591
--- Comment #2 from Jiong Wang ---
*** Bug 69256 has been marked as a duplicate of this bug. ***
||jiwang at gcc dot gnu.org
Resolution|--- |DUPLICATE
--- Comment #2 from Jiong Wang ---
duplicate pr67591
*** This bug has been marked as a duplicate of bug 67591 ***
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70048
--- Comment #21 from Jiong Wang ---
(In reply to Richard Henderson from comment #19)
> (In reply to Jiong Wang from comment #16)
> > But there is a performance issue as described at
> >
> > https://gcc.gnu.org/ml/gcc-patches/2016-02/msg00281.ht
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70048
--- Comment #18 from Jiong Wang ---
(In reply to Wilco from comment #17)
> (In reply to Jiong Wang from comment #16)
> I ran this modified patch through a few benchmarks and there are no
> regressions. The codesize of SPEC2006 reduces significant
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70048
--- Comment #16 from Jiong Wang ---
(In reply to Richard Henderson from comment #13)
> Created attachment 37911 [details]
> aggressive patch
>
Cool! Thanks very much for experimenting this thoughtful new aggressive
direction.
But there is a pe
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70048
--- Comment #11 from Jiong Wang ---
(In reply to Richard Henderson from comment #10)
> Created attachment 37890 [details]
> second patch
>
> Still going through full testing, but I wanted to post this
> before the end of the day.
>
> This updat
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70048
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #7
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69555
--- Comment #8 from Jiong Wang ---
(In reply to Jakub Jelinek from comment #7)
> {
> try
> {
> ...
> D.2689 = (sizetype) D.2477;
> D.2690 = D.2689 + 1;
> D.2691 =
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68317
Jiong Wang changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68317
--- Comment #11 from Jiong Wang ---
Author: jiwang
Date: Mon Nov 23 12:14:05 2015
New Revision: 230754
URL: https://gcc.gnu.org/viewcvs?rev=230754&root=gcc&view=rev
Log:
[Patch] Drop constant overflow flag in adjust_range_with_scev when possible
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68326
--- Comment #2 from Jiong Wang ---
Author: jiwang
Date: Mon Nov 23 12:14:05 2015
New Revision: 230754
URL: https://gcc.gnu.org/viewcvs?rev=230754&root=gcc&view=rev
Log:
[Patch] Drop constant overflow flag in adjust_range_with_scev when possible
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68317
--- Comment #9 from Jiong Wang ---
(In reply to Richard Biener from comment #7)
> (In reply to Jiong Wang from comment #6)
> > Created attachment 36741 [details]
> > prototype-fix
> >
> > diff --git a/gcc/tree-ssa-loop-manip.c b/gcc/tree-ssa-loo
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68317
--- Comment #8 from Jiong Wang ---
(In reply to Richard Biener from comment #7)
> (In reply to Jiong Wang from comment #6)
> > Created attachment 36741 [details]
> > prototype-fix
> >
> > (In reply to Richard Biener from comment #3)
> > > (gdb)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68317
--- Comment #6 from Jiong Wang ---
Created attachment 36741
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36741&action=edit
prototype-fix
(In reply to Richard Biener from comment #3)
> (gdb) p debug_generic_expr (max)
> 4294443008(OVF)
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68317
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #5
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67305
Jiong Wang changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67305
--- Comment #9 from Jiong Wang ---
Author: jiwang
Date: Wed Nov 11 12:30:46 2015
New Revision: 230158
URL: https://gcc.gnu.org/viewcvs?rev=230158&root=gcc&view=rev
Log:
[ARM] PR67305, tighten neon_vector_mem_operand on eliminable registers
2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68234
Jiong Wang changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68234
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Wed Nov 11 10:51:31 2015
New Revision: 230150
URL: https://gcc.gnu.org/viewcvs?rev=230150&root=gcc&view=rev
Log:
[Patch] PR tree-optimization/68234 Improve range info for loop Phi node
201
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68234
--- Comment #4 from Jiong Wang ---
(In reply to rguent...@suse.de from comment #3)
> On Mon, 9 Nov 2015, jiwang at gcc dot gnu.org wrote:
>
> > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68234
> >
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68234
Jiong Wang changed:
What|Removed |Added
Summary|tree-vrp pass need to be|tree-vrp pass need to be
Severity: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
Target Milestone: ---
Created attachment 36661
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36661&acti
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67421
Jiong Wang changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67421
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Thu Sep 10 10:37:17 2015
New Revision: 227629
URL: https://gcc.gnu.org/viewcvs?rev=227629&root=gcc&view=rev
Log:
[Patch/expand] Cost instruction sequences when doing left wide shift
Patch
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67421
--- Comment #4 from Jiong Wang ---
(In reply to r...@cebitec.uni-bielefeld.de from comment #2)
> cc1 is invoked like this for a 32-bit-default configuration:
>
> $ cc1 -quiet wide-shift-64.c -mcpu=v9 -O2 -fdump-rtl-combine -o
> wide-shift-64.s
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67421
--- Comment #1 from Jiong Wang ---
(In reply to Rainer Orth from comment #0)
> Created attachment 36275 [details]
> wide-shift-64.c.219r.combine
>
> The new gcc.dg/wide-shift-64.c testcase FAILs on SPARC for the 64-bit
> multilib
> only:
>
> FA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67305
--- Comment #7 from Jiong Wang ---
(In reply to Segher Boessenkool from comment #6)
> The predicate here is "neon_permissive_struct_operand", and indeed
> it is _very_ permissive ;-)
>
> This goes through neon_vector_mem_operand(op, 2, false) wh
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67305
--- Comment #4 from Jiong Wang ---
And the very complicated address is generated by combine pass, it runs very
happy by doing the following serious of combination:
Trying 22, 23 -> 24
Successfully matched this instruction
Trying 20 -> 24:
Succes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67305
--- Comment #3 from Jiong Wang ---
>From the tree dump .pre, I understand the tree shape is improved as we deleted
one redundant Phi, but we also noticed there is one regression, we are turning
_6 = bl_20 >> 6
into something like:
_5 =
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
CC: vmakarov at redhat dot com
Target Milestone: ---
Target: arm-none-eabi
since r226850, seen on arm-none-eabi only currently.
it can be easily
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63521
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Fri Jul 24 09:06:53 2015
New Revision: 226141
URL: https://gcc.gnu.org/viewcvs?rev=226141&root=gcc&view=rev
Log:
[AArch64] Revert REG_ALLOC_ORDER/HONOR_REG_ALLOC_ORDER
2015-07-24 Jiong Wa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63521
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63521
--- Comment #3 from Jiong Wang ---
Author: jiwang
Date: Wed Jul 22 11:41:10 2015
New Revision: 226064
URL: https://gcc.gnu.org/viewcvs?rev=226064&root=gcc&view=rev
Log:
[AArch64] PR target/63521 Define REG_ALLOC_ORDER
2015-07-22 Jiong Wang
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #16
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
Target Milestone: ---
given the following simple test.c
typedef unsigned long int uint64_t;
typedef __Uint8x8_t uint8x8_t;
typedef struct
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173
--- Comment #36 from Jiong Wang ---
and for rtl level improvement, need to enable DF_DU_CHAIN build on top of
existing DF_UD_CHAIN (may cause extra compile time resource consumption).
one draft patch is here, no feedback yet.
https://gcc.gnu.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173
--- Comment #35 from Jiong Wang ---
(In reply to Jakub Jelinek from comment #34)
> Any progress on this? This is a P1 PR, but no comments have been added for
> more than a month...
from what I known:
Bin was working on some tree level fix wh
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65020
Jiong Wang changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65020
--- Comment #2 from Jiong Wang ---
(In reply to Maxim Kuvyrkov from comment #1)
> Do you have 770c9167327b3c20b718dae5062d57a052316a78 / 220316 applied?
>
> That patch is not a complete fix (see
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=649
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
I have run into bootstrap failure issue recently. and narrowed down into
r219789
commit 34aaed439380226950d65f37c02a549dfdebb16c
Author: mkuvyrkov
Date: Sat Jan 17 01
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62103
Jiong Wang changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|FIXED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62103
--- Comment #8 from Jiong Wang ---
looks like this fix is too conservative. it will disable const fold for
bit-field completely. for bitfld-6/little-endian, previously, we can generated
main:
mov w0, 0
ret
while after this p
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62103
Jiong Wang changed:
What|Removed |Added
CC||jiwang at gcc dot gnu.org
--- Comment #7
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64822
Jiong Wang changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64822
--- Comment #2 from Jiong Wang ---
And I verified, the problem is here at least since 4.8
: normal
Priority: P3
Component: tree-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: jiwang at gcc dot gnu.org
given the following simple testcase,
union {
unsigned f0;
unsigned f1 : 24;
} const g_3983 = {1};
int main() {
printf("che
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173
--- Comment #24 from Jiong Wang ---
(In reply to amker from comment #23)
partially agree.
at least for the single use case given by Seb, I think tree ivopt should do it.
(I verified clang do ivopt correctly for the case)
for the rtl re-associa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173
--- Comment #16 from Jiong Wang ---
After some work on this issue, things have gone beyond my expectations. To
summarize my understanding of this issue and what I have got:
Reason of regression
==
the testcase contains a loop which is hotc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64669
--- Comment #13 from Jiong Wang ---
(In reply to Richard Henderson from comment #11)
> Created attachment 34506 [details]
> proposed patch
>
> This is what I'm currently testing.
passed profiledbootstrap on top of 219849.
spec2kint/spec2k6int b
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64669
--- Comment #10 from Jiong Wang ---
(In reply to Richard Henderson from comment #8)
> Indeed, if I force used_in_cond_stmt_p to return false, which forces
> the use of the emit_cstore path, which means we return a proper
> boolean value instead o
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64669
--- Comment #6 from Jiong Wang ---
(In reply to Jiong Wang from comment #5)
> Created attachment 34502 [details]
> kk.ii
>
this testcase reproduce exactly what Jakub reported.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64669
--- Comment #5 from Jiong Wang ---
Created attachment 34502
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34502&action=edit
kk.ii
attachment is the reduced testcase.
./cc1 -g -O2 -fprofile-use -fno-exceptions -fno-rtti
-fasynchronous-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64669
--- Comment #4 from Jiong Wang ---
haven't enable go front end,
../gcc/configure --enable-languages=c,c++,fortran --disable-libsanitizer
--enable-checking=release --disable-werror
with make -j16 profiledbootstrap, I got several
../../../gcc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64304
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64304
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Mon Jan 19 14:13:33 2015
New Revision: 219844
URL: https://gcc.gnu.org/viewcvs?rev=219844&root=gcc&view=rev
Log:
[AArch64] Remove ashift pattern for QI/HI
2015-01-19 Jiong Wang
||jiwang at gcc dot gnu.org
Resolution|--- |FIXED
--- Comment #6 from Jiong Wang ---
mark as fixed.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64149
--- Comment #5 from Jiong Wang ---
Author: jiwang
Date: Fri Jan 16 13:11:53 2015
New Revision: 219734
URL: https://gcc.gnu.org/viewcvs?rev=219734&root=gcc&view=rev
Log:
[AArch64] Remove -mlra/-mno-lra option for Aarch64
2015-01-16 Matthew Waha
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64015
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64015
--- Comment #16 from Jiong Wang ---
Author: jiwang
Date: Fri Jan 16 11:48:00 2015
New Revision: 219723
URL: https://gcc.gnu.org/viewcvs?rev=219723&root=gcc&view=rev
Log:
[AArch64] Enable CCMP support for AArch64, PR64015 resolved
gcc/
2015-01-1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011
Jiong Wang changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011
--- Comment #3 from Jiong Wang ---
Author: jiwang
Date: Fri Jan 16 10:14:51 2015
New Revision: 219717
URL: https://gcc.gnu.org/viewcvs?rev=219717&root=gcc&view=rev
Log:
[Patch] Warn and truncate bitsize when partial overflow happen
PR rtl-opt
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64304
--- Comment #3 from Jiong Wang ---
cased by one bug in combine pass.
patch under review at https://gcc.gnu.org/ml/gcc-patches/2015-01/msg00508.html
1 - 100 of 156 matches
Mail list logo
