> So for an example, Ada layouts the records themselves and some times
> has a different order of the fields than the layouted offsets.
The Ada compiler uses stor-layout.c by default, like all the other compilers.
It does its own layout only when it has nothing to do, i.e. when the user has
speci
Hi:
>> 1) does your machine use cc0?
No. In my RISC chip, there is a status register existed, like ARM. But I now
I didn't write any code to support it, as well as absent cc0 register.
>> 2) what pass is producing those subregs?
This is really puzzled me. I just wrote the PROMOTE_MODE like MIP
daniel.tian wrote:
>>> 2) what pass is producing those subregs?
> This is really puzzled me. I just wrote the PROMOTE_MODE like MIPS.
> Any advice?
Turn on the RTL dump files and see where the subregs first appear? My guess
would be reload, but let's find out.
cheers,
DaveK
Dave Korn wrote:
> daniel.tian wrote:
>
2) what pass is producing those subregs?
>> This is really puzzled me. I just wrote the PROMOTE_MODE like MIPS.
>
>> Any advice?
>
> Turn on the RTL dump files and see where the subregs first appear?
Yes, that's waht I meant.
Paolo
Paolo Bonzini wrote:
> Dave Korn wrote:
>> daniel.tian wrote:
>>
> 2) what pass is producing those subregs?
>>> This is really puzzled me. I just wrote the PROMOTE_MODE like MIPS.
>>> Any advice?
>> Turn on the RTL dump files and see where the subregs first appear?
>
> Yes, that's waht I m
Hi Dove:
> The docs for PROMOTE_MODE suggest using `word_mode'; it may be that on mips,
> Pmode and word_mode are the same, but they aren't on your machine?
Yes. I think the Pmode and word_mode is the same as MIPS. So I copy
the code in mips.
I just wanna do the operations in WORD mode, and remov
2009/6/22 Richard Guenther :
> On the contrary. If we put in place such a mechanism we have
> to maintain it forever. It is hard to tell what is the correct solution
> without distributors facing the problem (there are no existing
> plugins that can be packaged or are packaged now).
>
> So, let'
On 06/23/2009 03:27 PM, Steven Bosscher wrote:
Hi,
I have a question about ifcvt.c:dead_or_predicable. This function is
pretty complicated and it's not really clear to me what it is doing.
But I'll have to understand what is going on because there is a bug in
this function that I would like to
I'm looking at a problem with the gcc 4.4.0 port I'm supporting where
the architecture has separate address and data registers. In order to
get good code generation we need a single cover class to cover both the
data and address register classes as moving between them is no more
expensive than