instruction that should be
moved but not?
Cheers,
Bingfeng
-Original Message-
From: Hariharan Sandanagobalane [mailto:harihar...@picochip.com]
Sent: 14 May 2010 12:26
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org
Subject: Re: Machine description question
Hi Bengfeng,
Changing my instruction patterns
iharan Sandanagobalane [mailto:harihar...@picochip.com]
> Sent: 14 May 2010 12:26
> To: Bingfeng Mei
> Cc: gcc@gcc.gnu.org
> Subject: Re: Machine description question
>
> Hi Bengfeng,
> Changing my instruction patterns similar to the ones that you
> sent does
> get over t
ll porivate and not in mainline.
Cheers,
Bingfeng
-Original Message-
From: Hariharan Sandanagobalane [mailto:harihar...@picochip.com]
Sent: 13 May 2010 10:17
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org
Subject: Re: Machine description question
The patterns for PUT/GET were
; Scalar Pu
s just "machine-specific"
> operation and
> the optimizer probably rightly assumes that multiple
> execution of this
> with same parameters would result in same value being produced. This
> obviously is not the case for these communication instructions.
>
> Do
with same parameters would result in same value being produced. This
obviously is not the case for these communication instructions.
Do you have your code to do this using unspec in gcc mainline? Can you
point me to that, please?
Thanks
Hari
Bingfeng Mei wrote:
How do you define your imaginary register
g
> Subject: Re: Machine description question
>
> Thanks for your help BingFeng.
>
> I gave this a go and ended up with worse code (and worse
> memory usage)
> than before. I started with this experiment because of the compilers
> "All virtual regis
Thanks for your help BingFeng.
I gave this a go and ended up with worse code (and worse memory usage)
than before. I started with this experiment because of the compilers
"All virtual registers are assumed to be used and clobbered by
unspec_volatile" rule. The get/put instructions read/write t
Our architecture has the similar resource, and we use the first approach
by creating an imaginary register and dependency between these instructions,
i.e., every such instruction reads and write to the special register to
create artificial dependency. You may need to add a (unspec:..) as an
indepe
Ok, I understand now. Thank you very much for your explanations,
Jean Christophe Beyler
On Sat, Feb 7, 2009 at 5:13 PM, Michael Meissner
wrote:
> On Sat, Feb 07, 2009 at 03:54:51PM -0500, Jean Christophe Beyler wrote:
>> Dear all,
>>
>> I have a question about the way the machine description wor
On Sat, Feb 07, 2009 at 03:54:51PM -0500, Jean Christophe Beyler wrote:
> Dear all,
>
> I have a question about the way the machine description works and how
> it affects the different passes of the compiler. I was reading the GNU
> Compiler Collection Internals and I found this part (in section
>
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