Thanks for your help BingFeng.
I gave this a go and ended up with worse code (and worse memory usage)
than before. I started with this experiment because of the compilers
"All virtual registers are assumed to be used and clobbered by
unspec_volatile" rule. The get/put instructions read/write to registers
and the virtual register assigned for them interferes with all the
virtual registers in the function. So, they were highly likely to be
spilled and use stack instead. I wanted to try to avoid this by the
introduction of unspec's and use of imaginary registers.
But, the virtual registers that are involved in unspec patterns with
these imaginary registers still seem to be marked to interfere with all
the virtual registers. Is that to be expected? Am i missing something
obvious here?
Regards
Hari
Bingfeng Mei wrote:
Our architecture has the similar resource, and we use the first approach
by creating an imaginary register and dependency between these instructions,
i.e., every such instruction reads and write to the special register to
create artificial dependency. You may need to add a (unspec:..) as an
independent expression in your pattern to prevent some wrong optimizations.
Cheers,
Bingfeng
-----Original Message-----
From: gcc-ow...@gcc.gnu.org [mailto:gcc-ow...@gcc.gnu.org] On
Behalf Of Hariharan
Sent: 12 May 2010 11:18
To: gcc@gcc.gnu.org
Subject: Machine description question
Hello all,
Picochip has communication instructions that allow one array
element to
pass data to another. There are 3 such instructions PUT/GET/TSTPORT.
Currently, all three of these use UNSPEC_VOLATILE side-effect
expressions to make sure they don't get reordered. But, i
wonder if it
is an overkill to use UNSPEC_VOLATILE for this purpose and whether i
should use UNSPEC instead. The only thing we care here is that they
don't reordered with respect to each other. It is okay for other
instructions to move around the communication instructions
(as long as
normal scheduler dependencies are taken care of). There are
possibly one
of two things i can do.
1. Introduce an implicit dependency between all communication
instructions by adding a use/clobber of an imaginary register.
2. Introduce explicit dependency between them by using some
target hook
to add dependency links. I have not found any appropriate
target hook to
do this.
Can you tell me which one i should try? Has anyone tried
doing anything
similar? Any pointers/suggestions on this will be greatly appreciated.
Thanks
Hari
