On Mon, May 5, 2008 at 1:12 PM, Boris Boesler <[EMAIL PROTECTED]> wrote:
> Hi!
>
> Am 05.05.2008 um 09:06 schrieb Mohamed Shafi:
>
>
>
> >
> > >
> > > > But how can i handle instances like this? Should i be doing insertion
> > > > of nops in reorg pass?
> > > >
> > >
> > > FWIW, I had worked on a
Hi!
Am 05.05.2008 um 09:06 schrieb Mohamed Shafi:
But how can i handle instances like this? Should i be doing
insertion
of nops in reorg pass?
FWIW, I had worked on a port for VLIW processor about three years
back
and IIRC we had used the reorg pass for inserting the nops. I think
if yo
On Mon, May 5, 2008 at 12:23 PM, Pranav Bhandarkar
<[EMAIL PROTECTED]> wrote:
> Hi Mohammed,
>
>
> > But how can i handle instances like this? Should i be doing insertion
> > of nops in reorg pass?
>
> FWIW, I had worked on a port for VLIW processor about three years back
> and IIRC we had us
Hi Mohammed,
> But how can i handle instances like this? Should i be doing insertion
> of nops in reorg pass?
FWIW, I had worked on a port for VLIW processor about three years back
and IIRC we had used the reorg pass for inserting the nops. I think
if you look at the scheduler dumps you will
Hello all,
In the gcc port that i am currently working on delay slots are getting
filled with instructions that require a nop between them.
Say,
call fun
lw R0, R8
add R1, R0
This is an example where both the delay slots have been filled.
But 'add' instruction has a true data dependency on 'lw'
