On Fri, Sep 11, 2020, 5:02 PM Joel Sherrill wrote:
>
>
> On Fri, Sep 11, 2020 at 4:36 PM Janne Blomqvist
> wrote:
>
>> On Fri, Sep 11, 2020 at 6:52 PM Joel Sherrill wrote:
>> >
>> > Hi
>> >
>> > Over at RTEMS, we ran into a case where the C++ atomics may not be right
>> > for one of the lower l
On Fri, Sep 11, 2020 at 4:36 PM Janne Blomqvist
wrote:
> On Fri, Sep 11, 2020 at 6:52 PM Joel Sherrill wrote:
> >
> > Hi
> >
> > Over at RTEMS, we ran into a case where the C++ atomics may not be right
> > for one of the lower level x86 models. We will investigate whether it can
> > be made righ
On Fri, Sep 11, 2020 at 6:52 PM Joel Sherrill wrote:
>
> Hi
>
> Over at RTEMS, we ran into a case where the C++ atomics may not be right
> for one of the lower level x86 models. We will investigate whether it can
> be made right but this has led to the discussion of dropping older models
> and set
On Fri, Sep 11, 2020 at 1:40 PM Florian Weimer wrote:
> * Joel Sherrill:
>
> > I don't know that we have a huge issue in making the i486 a minimum.
> > I was proposing a Pentium II or P6 as a baseline since that moves you
> > up to having a TBR and initial SMP support.
>
> Sorry, what's a TBR?
>
* Joel Sherrill:
> I don't know that we have a huge issue in making the i486 a minimum.
> I was proposing a Pentium II or P6 as a baseline since that moves you
> up to having a TBR and initial SMP support.
Sorry, what's a TBR?
> But I think there are still embedded x86 clones that I am not sure
On Fri, Sep 11, 2020 at 1:07 PM Florian Weimer wrote:
> * Joel Sherrill:
>
> > With that in mind, what's the lowest/oldest i386 CPU model we
> > should consider as the new base model?
>
> The 80486 has a CMPXCHG instruction (4-byte CAS). Starting from CAS,
> you can build the rest. There might
* Joel Sherrill:
> With that in mind, what's the lowest/oldest i386 CPU model we
> should consider as the new base model?
The 80486 has a CMPXCHG instruction (4-byte CAS). Starting from CAS,
you can build the rest. There might be some caveats about the memory
model implementation (it may not be
Hi
Over at RTEMS, we ran into a case where the C++ atomics may not be right
for one of the lower level x86 models. We will investigate whether it can
be made right but this has led to the discussion of dropping older models
and setting a new minimum model. Right now, our base is a i386 w/FPU. The
