On Fri, Sep 11, 2020 at 1:40 PM Florian Weimer <f...@deneb.enyo.de> wrote:
> * Joel Sherrill: > > > I don't know that we have a huge issue in making the i486 a minimum. > > I was proposing a Pentium II or P6 as a baseline since that moves you > > up to having a TBR and initial SMP support. > > Sorry, what's a TBR? > Time Base Register. GCC wouldn't use. It is a cycle counter register and lets one avoid use of the old i8254 derived counter/timer for high resolution times. > > > But I think there are still embedded x86 clones that I am not sure > > meet the P6 minimum. > > Some AMD Geode variants do not have CMOV and have been produced until > fairly recently (if they aren't in production still). That means that > they do not meet the Pentium Pro baseline. > I guess we need to experiment with i486 for uniprocessor and maybe PII for SMP ones. --joel
