Re: Defining constraint for registers tuple

2011-08-16 Thread Kirill Yukhin
That is exactly it! Thank you very much! BMI2 support is almost here :) -- K On Tue, Aug 16, 2011 at 6:58 PM, Richard Henderson wrote: > On 08/16/2011 04:20 AM, Kirill Yukhin wrote: >> Hi guys, >> the question is still opened. Let me try to explain further. >> >> The new MULX instruction is capa

Re: Defining constraint for registers tuple

2011-08-16 Thread Richard Henderson
On 08/16/2011 04:20 AM, Kirill Yukhin wrote: > Hi guys, > the question is still opened. Let me try to explain further. > > The new MULX instruction is capable to store result of unsigned > multiply to arbitrary pair of GPRs (one of operands still must be DX). > But I have no idea, how to implement

Re: Defining constraint for registers tuple

2011-08-16 Thread Kirill Yukhin
Hi guys, the question is still opened. Let me try to explain further. The new MULX instruction is capable to store result of unsigned multiply to arbitrary pair of GPRs (one of operands still must be DX). But I have no idea, how to implement such a constraint. Here is define_insn which is works bu

Re: Defining constraint for registers tuple

2011-08-01 Thread Kirill Yukhin
> Don't change the constraint, just add an alternative.  Or use a > different insn with an insn predicate. This is misunderstanding beacuse of my great English :) I am not going to update existing constraint. I am going to implement new one. Actually, I am looking for some expample, where similar

Re: Defining constraint for registers tuple

2011-07-29 Thread Ian Lance Taylor
Kirill Yukhin writes: > I'm working on implementation of `mulx` (which is part of BMI2). One > of improvements compared generic `mul` is that it allows to specify > destination registers. > For `mul` we have `A` constraint, which stands for AX:DX pair. > So, is there a possibility to relax such c

Defining constraint for registers tuple

2011-07-29 Thread Kirill Yukhin
Hi guys, I'm working on implementation of `mulx` (which is part of BMI2). One of improvements compared generic `mul` is that it allows to specify destination registers. For `mul` we have `A` constraint, which stands for AX:DX pair. So, is there a possibility to relax such cinstraint and allow any p