Hi guys,
the question is still opened. Let me try to explain further.
The new MULX instruction is capable to store result of unsigned
multiply to arbitrary pair of GPRs (one of operands still must be DX).
But I have no idea, how to implement such a constraint.
Here is define_insn which is works but uses i386's "A" constraint. It
is much worse than using any pair of registers.
(define_insn "*bmi2_mulx<mode><dwi>3"
[(set (match_operand:<DWI> 0 "register_operand" "=A")
(mult:<DWI>
(zero_extend:<DWI>
(match_operand:DWIH 1 "nonimmediate_operand" "d"))
(zero_extend:<DWI>
(match_operand:DWIH 2 "nonimmediate_operand" "rm"))))]
"TARGET_BMI2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
"mulx\t%2, %%eax, %%edx"
[(set_attr "type" "imul")
(set_attr "length_immediate" "0")
(set_attr "mode" "<MODE>")])
Maybe there is examples from other ports? Any help is appreciated
Thanks, K
On Mon, Aug 1, 2011 at 4:28 PM, Kirill Yukhin <kirill.yuk...@gmail.com> wrote:
>> Don't change the constraint, just add an alternative. Or use a
>> different insn with an insn predicate.
>
> This is misunderstanding beacuse of my great English :)
>
> I am not going to update existing constraint. I am going to implement new one.
> Actually, I am looking for some expample, where similar constraint
> might be implemented already.
>
> --
> Thanks, K
>
