Fwd: GCC-4.3.0 fails to compile SPECint-2006 with control speculation on itanium processor

2008-04-11 Thread
-- Forwarded message -- From: 吴曦 <[EMAIL PROTECTED]> Date: 2008/4/11 Subject: Re: GCC-4.3.0 fails to compile SPECint-2006 with control speculation on itanium processor To: Eljay Love-Jensen <[EMAIL PROTECTED]> I turn on the verbose mode of spec, it really fails to

Fwd: GCC-4.3.0 fails to compile SPECint-2006 with control speculation on itanium processor

2008-04-11 Thread
-- Forwarded message -- From: 吴曦 <[EMAIL PROTECTED]> Date: 2008/4/11 Subject: Re: GCC-4.3.0 fails to compile SPECint-2006 with control speculation on itanium processor To: Eljay Love-Jensen <[EMAIL PROTECTED]> 2008/4/11 Eljay Love-Jensen <[EMAIL PROTECTED]>:

GCC-4.3.0 fails to compile SPECint-2006 with control speculation on itanium processor

2008-04-11 Thread
Hi: I am working on gcc-4.3.0 and Redhat ES 4. When I uses the compiler to build specint-2006 benchmarks, none passes the make with compiler option: -msched-control-spec (enable control speculation on IA-64) Here is part of the error log: # Error 400.perlbench: Error with make!

Re: Scheduling problem - A more detailed explain

2007-10-10 Thread
2007/10/11, Jim Wilson <[EMAIL PROTECTED]>: Thanks for you helpful hints ! And I am sorry for such a late reply. I have figured out this problem yesterday :-). > Do we know for sure that the scheduler is failing here? Have you looked > at -da RTL dumps to verify which pass is performing the inco

Re: Scheduling problem - A more detailed explain

2007-10-08 Thread
"rws_access_reg should be handling this correctly. It uses HARD_REGNO_NREGS to get the number of regs referred to by a reg rtl. So it should return 64 in this case, and then it will iterate over all 64-bit PR regs when checking for a dependency." I have found HARD_REGNO_NREGS in ia64.h #define HA

Re: Question on GGC

2007-09-27 Thread
Sorry, I found it in gccint, thanks :-) 2007/9/28, 吴曦 <[EMAIL PROTECTED]>: > 2007/9/27, Zdenek Dvorak <[EMAIL PROTECTED]>: > > Hello, > > > > > I have several global variables which are of type rtx. They are used > > > in flow.c ia64.c and final.c. A

Re: Question on GGC

2007-09-27 Thread
2007/9/27, Zdenek Dvorak <[EMAIL PROTECTED]>: > Hello, > > > I have several global variables which are of type rtx. They are used > > in flow.c ia64.c and final.c. As stated in the internal doc with > > types. I add GTY(()) marker after the keyword 'extern'. for example: > > extern GTY(())

Question on GGC

2007-09-27 Thread
Hi. I have several global variables which are of type rtx. They are used in flow.c ia64.c and final.c. As stated in the internal doc with types. I add GTY(()) marker after the keyword 'extern'. for example: extern GTY(()) rtx a; these 'extern's are added in regs.h which is included in flow

Re: support single predicate set instructions in GCC-4.1.1

2007-09-26 Thread
2007/9/26, Jim Wilson <[EMAIL PROTECTED]>: > On Tue, 2007-09-25 at 15:13 +0800, 吴曦 wrote: > > propagate_one_insn), I don't understand why GCC fails the computation > > of liveness if there is no optimization flag :-(. > > There is probably something else happe

Re: support tnat instruction on IA-64. error occurs in bundling. help

2007-09-25 Thread
2007/9/26, Jim Wilson <[EMAIL PROTECTED]>: > ÎâêØ wrote: > > [(set_attr "itanium_class" "tnat")]) > > The itanium_class names are based on info from the Itanium Processor > Microprocessor Reference by the way. > > I believe the problem is that you didn't add info to the DFA scheduler > dscr

support tnat instruction on IA-64. error occurs in bundling. help

2007-09-25 Thread
Hi I am working on IA-64 and GCC-4.1.1 I modify ia64.md to support tnat instruction. More specifically, I add the following define_insn: (define_insn "shift_tnat" [(set (match_operand:BI 0 "register_operand" "=c") (unspec:BI [(match_operand:DI 1 "gr_regist

Re: support single predicate set instructions in GCC-4.1.1

2007-09-25 Thread
2007/9/25, Jim Wilson <[EMAIL PROTECTED]>: > ÎâêØ wrote: > > (define_insn "*shift_predicate_cmp" > > [(set (const_int 0) > > (and:BI (and:BI (match_operand:BI 1 "register_operand" "c") > > (and:BI (match_operand:DI 2 "gr_reg_or_8bit_adjusted_operand" > > "rL") > >

support single predicate set instructions in GCC-4.1.1

2007-09-22 Thread
Hi. I am working on Itanium architecture and GCC-4.1.1. I modify the machine description file ia64.md to support single predicate set instruction such as: (%0) cmp.ne %1, p0 = %2, %3 here %0 and %1 are predicates, %2 is a register or immediate, %3 is a register operand. more specifically

About allocating registers for instrumentation

2007-09-03 Thread
Hi, I am working on gcc-4.1.1 and Itanium architecture. Current now I have finished instrumenting ld and st instructions before the second scheduling pass by reserving two global registers at backend. However, in order to enhance the performance (e.g. make the scheduling better), I choose to alloca

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread
2007/7/29, 吴曦 <[EMAIL PROTECTED]>: > 28 Jul 2007 12:16:51 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > "吴曦" <[EMAIL PROTECTED]> writes: > > > > > 28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > >

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread
28 Jul 2007 12:16:51 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > "吴曦" <[EMAIL PROTECTED]> writes: > > > 28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > > > "吴曦" <[EMAIL PROTECTED]> writes: > > > > &

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread
28 Jul 2007 09:04:01 -0700, Ian Lance Taylor <[EMAIL PROTECTED]>: > "吴曦" <[EMAIL PROTECTED]> writes: > > > there are some questions after I read the source code today. > > 1st. if I add the instrumentation before 2nd scheduling; will gcc emit > > an

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread
2007/7/28, 吴曦 <[EMAIL PROTECTED]>: > 2007/7/28, Ramana Radhakrishnan <[EMAIL PROTECTED]>: > > Hi, > > > > > > On 7/28/07, 吴曦 <[EMAIL PROTECTED]> wrote: > > > > > > > I am working on gcc 4.1.1 and itanium2 architecture. I >

Re: How to make use of instruction scheduling to improve performance?

2007-07-28 Thread
2007/7/28, Ramana Radhakrishnan <[EMAIL PROTECTED]>: > Hi, > > > On 7/28/07, 吴曦 <[EMAIL PROTECTED]> wrote: > > > > > > I am working on gcc 4.1.1 and itanium2 architecture. I instrumented > > > > > > each ld and st instruct

Re: How to make use of instruction scheduling to improve performance?

2007-07-27 Thread
> > > > I am working on gcc 4.1.1 and itanium2 architecture. I instrumented > > > > each ld and st instruction in final_scan_insn() by looking at the insn > > > > template (These instrumentations are used to do some security checks). > > > > These instrumentations incur high performance overhead wh

How to make use of instruction scheduling to improve performance?

2007-07-27 Thread
I am working on gcc 4.1.1 and itanium2 architecture. I instrumented each ld and st instruction in final_scan_insn() by looking at the insn template (These instrumentations are used to do some security checks). These instrumentations incur high performance overhead when running specint benchmarks. H

Re: Any hints on this problem? Thanks!

2007-02-09 Thread
Another solution is to add the instrumentation earlier, and use expand_call. Thanks for your hints. Is that means doing intrumentation at the "RTL expand" level? However, I have tried the following method, add a defined_expand in ia64.md, the template used in define_expand is the same as the on

Re: Any hints on this problem? Thanks!

2007-02-09 Thread
Make sure that the called function restores the original state of the program before it returns. Andreas. Thanks~. I know the goal is to restore the original state before the inserted function returns. BUT, how to? Is there any way to tell gcc: "Hey, you should restore the original state before

Any hints on this problem? Thanks!

2007-02-09 Thread
Hi, I am working on gcc-4.1.1 and Itanium architecure. Today I try to add a function call before each ld instruction. The method I use to achieve this goal is to modify final_scan_insn() in final.c: before calling get_insn_template, I add codes to check whether the insn matches a template that wil

Re: "error: unable to generate reloads for...", any hints?

2007-02-08 Thread
Thanks. But what does it mean by saying: "Sometimes an insn can match more than one instruction pattern. Then the pattern that appears first in the machine description is the one used." in section 14.10 of gcc internal p259? 08 Feb 2007 00:09:21 -0800, Ian Lance Taylor <[EMAIL PROT

"error: unable to generate reloads for...", any hints?

2007-02-07 Thread
Hi, I am working on gcc 4.1.1 and Itanium architecture. I want to modify the machine description of ia64.md to add some checks before each ld instruction. the following is the original define_insn: (define_insn "*movqi_internal" [(set (match_operand:QI 0 "destination_operand" "=r

Re: Some hints on solving this problem?

2007-02-04 Thread
nd the template which generate ld or st, and add some code before ld and st. On 2/3/07, 吴曦 <[EMAIL PROTECTED]> wrote: > Hi, > I am working on gcc 4.1.1 and Itanium2 architecture. I want to use gcc > to emit some code before each ld and st instruction (I know that using > dynamic bi

Some hints on solving this problem?

2007-02-03 Thread
Hi, I am working on gcc 4.1.1 and Itanium2 architecture. I want to use gcc to emit some code before each ld and st instruction (I know that using dynamic binary translator like PIN may be more suitable for this task, but I am on the way of studying gcc and want to use it to achieve this goal). But

Re: Level to do such a modification...

2007-01-23 Thread
Besides that, as far as I know, valgrind can not run on itanium... but I am now working on it :-( 2007/1/24, Nicholas Nethercote <[EMAIL PROTECTED]>: On Wed, 24 Jan 2007, [GB2312] ÎâêØ wrote: > I know valgrind, it is an emulator ,but we are restricted not to use > an emulator. :-( Well, for so

Re: Level to do such a modification...

2007-01-23 Thread
Anyway, the program is supervised...would you mind giving some advices with the compiler-based approach, after recompilation, I could finish this modification. 2007/1/24, Nicholas Nethercote <[EMAIL PROTECTED]>: On Wed, 24 Jan 2007, [GB2312] ÎâêØ wrote: > I know valgrind, it is an emulator ,but

Re: Level to do such a modification...

2007-01-23 Thread
I know valgrind, it is an emulator ,but we are restricted not to use an emulator. :-( 2007/1/24, Nicholas Nethercote <[EMAIL PROTECTED]>: On Wed, 24 Jan 2007, [GB2312] ÎâêØ wrote: > I am working on gcc 4.0.0. I want to use gcc to intercept each call to > read, and taint the data readed in. For

Level to do such a modification...

2007-01-23 Thread
Hi, I am working on gcc 4.0.0. I want to use gcc to intercept each call to read, and taint the data readed in. For example: transform read(fd, buf, size) to read(fd, buf, size) if(is_socket(fd)) taint(buf, size) So, what is the best suitable level to do this

Re: passing arguments in emit_libraray_call

2007-01-07 Thread
sorry for that~, I am using gcc3.4.0. thanks for the hints on passing format string argument~ 在 07 Jan 2007 20:25:29 -0800,Ian Lance Taylor<[EMAIL PROTECTED]> 写道: "吴曦" <[EMAIL PROTECTED]> writes: > I want to use emit_library_call to output a library call to "pri

passing arguments in emit_libraray_call

2007-01-07 Thread
Hi, I want to use emit_library_call to output a library call to "printf". The question is how to pass a format string argument? Also, in the comment of emit_library_call mentions: "The rtx values should have been passed through protect_from_queue already." then, what should I do to pass the rt

How to dedicate a register for special purpose in gcc?

2007-01-04 Thread
Hi, How can I dedicate a register for special purpose, that means, the dedicated register only appears in the inserted code of my own, but never allocated in the rest of code. I have read some doc(gcc int) about the register usage but still have no idea. I would *really* appreciate any help I can