Re: Change between g++-9.4.0 and g++-14.2.0

On Mon, Feb 24, 2025 at 9:26 PM Sidney Marshall wrote: > > In the code: > --- > #include > #include > #include > > // commenting out this forward declaration causes the code to fail > // under g++-14.2.0 > // > // the forward d

Change between g++-9.4.0 and g++-14.2.0

In the code: --- #include #include #include // commenting out this forward declaration causes the code to fail // under g++-14.2.0 // // the forward declaration is not needed for g++-9.4.0 template std::ostream& operator<<(std

Gcc - MIPIM 2025

Hello, I hope you're doing well. The buyer list for MIPIM 2025 is available, featuring 25369 verified contacts with endless usage rights. If this is something you'd like to explore, I'm happy to send you pricing and further details. Looking forward to hearing from you. Best regards, Samantha

Re: Backend for a stack-oriented architecture

* Michael Matz: > Hello, > > On Mon, 24 Feb 2025, Florian Weimer wrote: > >> .proc fib (_long) (_long) >> # Argument/result register: %3 >> # return address register: %2 >> # local register: %1 >> # outgoing argument/return register: %0 >> .framesize 24 # in bytes, three registers excluding the

Re: Backend for a stack-oriented architecture

On 2/24/25 4:32 AM, Florian Weimer wrote: As a hobby project, I'm working on a mostly memory-safe architecture that is targeted at direct software emulation. The majority of its instructions have memory operands that are relative to the stack pointer. Calls and returns adjust the stack point

aarch64 built-in SIMD types

Hi all, I am trying to find where the aarch64 SIMD built in types are defined in GCC. For instance, __Int8x8_t. I see some code in gcc/config/aarch64 for these, but then it goes deeper into internals of gcc that I don't quite follow. Any help pointing to where I should look would be appreciated.

Re: GCC used to store pointers in FP registers on aarch64

On Mon, Feb 24, 2025 at 10:46:42AM +0100, Attila Szegedi wrote: > Hi folks, Hi, I've been pointed at this thread due to the reference to my Linux patch series fixing some KVM FPSIMD/SVE/SME issues. > I'm looking for a bit of a historic context for a fun GCC behavior we > stumbled across. For...

Re: Backend for a stack-oriented architecture

Hello, On Mon, 24 Feb 2025, Florian Weimer wrote: > .proc fib (_long) (_long) > # Argument/result register: %3 > # return address register: %2 > # local register: %1 > # outgoing argument/return register: %0 > .framesize 24 # in bytes, three registers excluding the incoming argument ... > ret

Re: GCC used to store pointers in FP registers on aarch64

On Mon, Feb 24, 2025 at 1:21 PM Florian Weimer wrote: > * Attila Szegedi: > > >> That seems … quite unlikely. GCC 8 has seen extensive use on > >> AArch64, on a variety of implementations, and I don't recall > >> problems in this area. I don't follow AArch64 *that* closely, > >> admittedly, but

Re: GCC used to store pointers in FP registers on aarch64

* Attila Szegedi: >> That seems … quite unlikely. GCC 8 has seen extensive use on >> AArch64, on a variety of implementations, and I don't recall >> problems in this area. I don't follow AArch64 *that* closely, >> admittedly, but I expect it would have caused quite a ruckus. >> > > Yeah. The lac

Re: GCC used to store pointers in FP registers on aarch64

On Mon, Feb 24, 2025 at 12:41 PM Florian Weimer wrote: > > Surely not preserving floating point bit patterns in registers would > be a silicon bug? Indeed it would be. > That seems … quite unlikely. GCC 8 has seen > extensive use on AArch64, on a variety of implementations, and I don't > rec

Backend for a stack-oriented architecture

As a hobby project, I'm working on a mostly memory-safe architecture that is targeted at direct software emulation. The majority of its instructions have memory operands that are relative to the stack pointer. Calls and returns adjust the stack pointer, so I suppose one could say that the archite

Re: GCC used to store pointers in FP registers on aarch64

* Attila Szegedi via Gcc: > We noticed that this version of GCC compiling on aarch64 will happily use > FP registers to temporarily store/load pointers, so there'd be "fmov d9, > x1" to store a pointer, and then later when it's used as a parameter to a > function call we'll see "fmov x1, d9" etc.

Re: GCC used to store pointers in FP registers on aarch64

Hi Attila, > On 24 Feb 2025, at 10:46, Attila Szegedi via Gcc wrote: > > Hi folks, > > I'm looking for a bit of a historic context for a fun GCC behavior we > stumbled across. For... reasons we build some of our binaries using an > older version of GCC (8.3.1, yes, we'll be upgrading soon, and

GCC used to store pointers in FP registers on aarch64

Hi folks, I'm looking for a bit of a historic context for a fun GCC behavior we stumbled across. For... reasons we build some of our binaries using an older version of GCC (8.3.1, yes, we'll be upgrading soon, and no, this message is not about helping with an ancient version :-) ) We noticed that