Hello, On Mon, 24 Feb 2025, Florian Weimer wrote:
> .proc fib (_long) (_long) > # Argument/result register: %3 > # return address register: %2 > # local register: %1 > # outgoing argument/return register: %0 > .framesize 24 # in bytes, three registers excluding the incoming argument ... > ret 24 Random observation: if the callee pops the stack you will have a harder time dealing with stdarg functions. > I tried to create a GCC backend for this, by looking at the existing > mmix backend (for the register windows) and the bpf backend (due to > its verified nature) for inspiration. I did not get very far because > it's my first GCC backend. I wonder if that's just my lack > experience, or if the target just isn't a good fit for GCC. I found > Hans-Peter Nilsson old description of the CRIS backend, and it it > mentions that GCC is not a good starting point for accumulator > machines with just one register (and my target doesn't even have that, > not really). > > If advisable, I can redefine the target to make it more GCC-friendly, > perhaps by introducing a register file separate from the stack. > (Although this would make the emulator and verifier more complex.) Perhaps some inspiration can be gleaned from other 0-address machines, i.e. pure stack ones. One I know of that has a GCC port is the (meanwhile fairly old) zpu ( https://en.wikipedia.org/wiki/ZPU_(processor) and https://github.com/zylin/zpugcc , look at toolchain/gcc/gcc/config/zpu there). For GCC the trick will almost always be to lie to GCC, claim that there are a couple of hard registers and rewrite them fairly late into stack-pointer relative references (that's e.g. what the above port is doing). GCCs facility for a register stack (reg-stack.cc) is used only for x87 regs, and hence is quite likely to be usable only there, not if the general regs are also stack based. But if you don't want to endlessly wrestle against GCC it's probably easier to architect your insn set with some registers (they could still be memory-mapped, and be in fact offsets from a special base register that's not exposed to GCC - perhaps that gives you the features you seek for your mostly memory-safe guarantees?). Ciao, Michael.
