Hello,
>
> @@ -162,6 +175,7 @@ doloop_condition_get (rtx doloop_pat)
> return 0;
>
>if ((XEXP (condition, 0) == reg)
> + || (REGNO (XEXP (condition, 0)) == CC_REGNUM)
>|| (GET_CODE (XEXP (condition, 0)) == PLUS
>&& XEXP (XEXP (condition, 0), 0) == reg))
>
> Your first example points to a weakness in the compiler optimization.
> If base_string constructor is inlined, the compiler should be able to
> figure out both 'name' and the heap memory it points to can not be
> modified by the call to notify, and therefore hoist access name.c_str
> () and name.
On Wed, Jan 5, 2011 at 11:52 AM, Jonathan Wakely wrote:
> On 30 December 2010 18:23, H.J. Lu wrote:
>>
>> This patch adds 32bit x86-64 support to binutils. Support in compiler,
>> library and OS is required to use it. It can be used to implement the
>> new 32bit OS for x86-64. Any comments?
>
>
On 30 December 2010 18:23, H.J. Lu wrote:
>
> This patch adds 32bit x86-64 support to binutils. Support in compiler,
> library and OS is required to use it. It can be used to implement the
> new 32bit OS for x86-64. Any comments?
I have a small comment on the changes to the c-i386.texi docs:
di
On Tuesday, January 04, 2011 13:03:59 H.J. Lu wrote:
> libiberty/.gitignore was added to src. But it isn't in gcc tree.
i dont have access to the gcc tree, so i can only post patches. if someone
were to grant me access, i obviously wouldnt have a problem making the commit.
otherwise someone el
On Wed, Jan 5, 2011 at 08:23, Jack Howarth wrote:
> On Sun, Jan 02, 2011 at 04:55:09PM +0100, Richard Guenther wrote:
>> On Fri, Dec 31, 2...@12:40 AM, Jack Howarth wrote:
>> > Sebastian,
>> > It appears that the official tarballs are now
>> > pos...@http://www.cloog.org/
>> > for cloog and c
No merge conflicts this time. Tested on x86_64.
Diego.
On Thu, 2010-12-30 at 18:56 +0200, Revital1 Eres wrote:
> Hello,
>
> The attached patch is my latest attempt to model doloop for arm.
> I followed Chung-Lin Tang suggestion and used subs+jump similar to your
> patch.
> On crotex-A8 I see gain of 29% on autocor benchmark (telecom suite) with
> SMS
Why not simply put in the interference graph edges for all registers
which are not possible for a pseudo and let the coloring algorithm
select the best hard reg.
That's largely what the ira-improv branch does. Register classes at that
point are used primarily to drive the costing model.
Actuall
2011/1/3 Jeff Law :
> On 12/27/10 08:43, roy rosen wrote:
>>>
>>> I'd recommend to try ira-improv branch. I think that part of the problem
>>> is
>>> in usage of cover classes. The branch removes the cover classes and
>>> permits
>>> IRA to use intersected register classes and that helps to assig
On Sun, Jan 02, 2011 at 04:55:09PM +0100, Richard Guenther wrote:
> On Fri, Dec 31, 2...@12:40 AM, Jack Howarth wrote:
> > Sebastian,
> > It appears that the official tarballs are now
> > pos...@http://www.cloog.org/
> > for cloog and cloog-parma 0.16. Do you plan on placing those both in the
>>> On 05.01.11 at 09:01, "H. Peter Anvin" wrote:
> On 01/04/2011 11:46 PM, Jan Beulich wrote:
Oh god, please, no.
I have to say I'm highly questioning to Jan's statement in the first
place. Crossing 32- and 64-bit ELF like that sounds like a kernel
security hole wai
On 01/04/2011 11:46 PM, Jan Beulich wrote:
>>>
>>> Oh god, please, no.
>>>
>>> I have to say I'm highly questioning to Jan's statement in the first
>>> place. Crossing 32- and 64-bit ELF like that sounds like a kernel
>>> security hole waiting to happen.
>
> A particular OS/kernel has the freedom
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