Mat Hostetter writes:
> Adam Nemet writes:
>
> > Ian Lance Taylor writes:
> > > Mat Hostetter writes:
> > >
> > >> Since the high bits are already zero, that would be less efficient on
> > >> most platforms, so guarding it with something like this would probably
> > >> be smarter:
> > >>
> > >>
On Thu, Feb 04, 2010 at 08:12:10PM +0100, jacob navia wrote:
> Hi
>
> I have developed a JIT for linux 64 bits. It generates exception
> handling information
> according to DWARF under linux and it works with gcc 4.2.1.
>
> I have recompiled the same code under the Macintosh and something has
>
I was looking at a regression caused by having ira-reload utilize the
existing copy detection code in IRA rather than my own and stumbled upon
this...
Consider this insn prior to IRA:
(insn 72 56 126 8 j.c:744 (parallel [
(set (reg:SI 110)
(minus:SI (reg:SI 69 [ e
Snapshot gcc-4.5-20100204 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.5-20100204/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.5 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/trunk
Hello List,
I'm new to gcc internals. As part of an experiment, I copied the i386 back-end
in gcc 4.2.2 to create my own i386-like target arch. At some point, my hacking
caused my i386 to produce assembly with two memory touching operands in one
instruction, like this:
movl12(%eb
Adam Nemet writes:
> Ian Lance Taylor writes:
> > Mat Hostetter writes:
> >
> >> Since the high bits are already zero, that would be less efficient on
> >> most platforms, so guarding it with something like this would probably
> >> be smarter:
> >>
> >> if (targetm.mode_rep_extended (mode, GE
Hi
I have developed a JIT for linux 64 bits. It generates exception
handling information
according to DWARF under linux and it works with gcc 4.2.1.
I have recompiled the same code under the Macintosh and something has
changed,
apparently, because now any throw that passes through my code cr
The microblaze branch has been synced with gcc-head and
updated to gcc-4.5.0.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Hi All,
On our private port of GCC 4.4.1 we fail to combine successive SHIFT
operations like in the following case
#include
#include
void f1 ()
{
unsigned short t1;
unsigned short t2;
t1 = rand();
t2 = rand();
t1 <<= 1; t2 <<= 1;
t1 <<= 1; t2 <<= 1;
t1 <<= 1; t2 <<= 1;
t1 <<=
