On 13 Jun 2007 10:47:33 -0700, Ian Lance Taylor <[EMAIL PROTECTED]> wrote:
"Mohamed Shafi" <[EMAIL PROTECTED]> writes:
> I am working for a private GCC target.
> The target has 4 registers, each 32 bits reserved for arguments.
> When passing arguments depending on the type of the argument eithe
On 6/13/07 11:33 PM, Andrew Pinski wrote:
> I am testing the changes which were requested earlier today. I could
> not tell if Diego's was an official approval or not. I have approval
> currently officially only for the Fortran parts.
It was, with the changes I suggested, for the non-FE parts.
Hello Ian,
Thanks for the valuable information.
My GCC assignment/disclaimer process with the FSF is complete. It
would be greatly appreciated, if someone can provide information about
the following:
a) Can the write permissions to port specific files can be obtained
even before submitting the f
On 6/13/07, Mark Mitchell <[EMAIL PROTECTED]> wrote:
Andrew --
Now that dataflow has gone in, you have the ball. When you feel that
PTR_PLUS is in suitable shape to go in, and the patches have been
reviewed, please merge and commit.
Thanks for the confirmation.
I know that there have been
Andrew --
Now that dataflow has gone in, you have the ball. When you feel that
PTR_PLUS is in suitable shape to go in, and the patches have been
reviewed, please merge and commit.
I know that there have been some reviews of the patches along the way,
and the concept has been appropriately approv
Snapshot gcc-4.2-20070613 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.2-20070613/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.2 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches
On 6/13/07, Kenneth Zadeck <[EMAIL PROTECTED]> wrote:
Richard Guenther wrote:
> On Tue, 12 Jun 2007, Richard Guenther wrote:
>
>
>> On ia64 SPEC2000 I see fma3d and applu now miscompare.
>>
>
> On x86_64 186.wupwise ICEs with -O2 -ffast-math and FDO:
>
> /gcc/spec/sb-haydn-fdo-64/x86_64/install-2
On Thu, Jun 14, 2007 at 02:24:19AM +0530, supriya kannery wrote:
> Is this scenario, of calling backtrace() on a stack containing invalid
> function
> pointer, a supported one?
In my opinion, no. Attach a debugger instead.
--
Daniel Jacobowitz
CodeSourcery
Hello,
Backtrace API is trapping when it is called inside a signal handler
to trace back an invalid function call.
Backtrace API is called from a signal handler. When the SEGFAULT signal
that is captured by the signal handler is due to the invokation of an
invalid function call, then backtr
Richard Guenther wrote:
> On Tue, 12 Jun 2007, Richard Guenther wrote:
>
>
>> On ia64 SPEC2000 I see fma3d and applu now miscompare.
>>
>
> On x86_64 186.wupwise ICEs with -O2 -ffast-math and FDO:
>
> /gcc/spec/sb-haydn-fdo-64/x86_64/install-200706120559/bin/gfortran -c -o
> zscal.o
On 6/13/07, Revital1 Eres <[EMAIL PROTECTED]> wrote:
Hello,
I have two ssa vars (i0 and i1 in the following example); what is the
sequence to generate a new phi node corresponding to i3 -
if (...)
i0 = exp1
else
i1 = exp2
i3 = PHI(i0 , i1);
From tree-vectorizer.c,
/* 1.1
Hello,
I have two ssa vars (i0 and i1 in the following example); what is the
sequence to generate a new phi node corresponding to i3 -
if (...)
i0 = exp1
else
i1 = exp2
i3 = PHI(i0 , i1);
Thanks,
Revital
Bernd Schmidt wrote:
> There is a reference to current_function_uses_eh_return in dse.c, but
> it's not clear to me what it's trying to achieve. Anyway, turning the
> store into an unspec_volatile solves the problem. I've committed the
> following.
>
>
I will look into this.
kenny
"Mohamed Shafi" <[EMAIL PROTECTED]> writes:
> I am working for a private GCC target.
> The target has 4 registers, each 32 bits reserved for arguments.
> When passing arguments depending on the type of the argument either
> registers or stack + registers will be used Sometimes the arguments
> wil
"Pompapathi V Gadad" <[EMAIL PROTECTED]> writes:
> My GCC assignment/disclaimer process with the FSF is complete. It
> would be greatly appreciated, if someone can provide information about
> the following:
> a) Can the write permissions to port specific files can be obtained
> even before submitt
Exception handling on the Blackfin was broken by the dataflow merge.
Inspecting the differences in the generated code, it appears that when
compiling functions like _Unwind_Resume in unwind-dw2.c, the dse pass
deletes necessary instructions.
Before:
(insn 56 55 57 7 (set (reg/v:SI 56 [ offset ])
On Tue, 12 Jun 2007, Kenneth Zadeck wrote:
> Kaveh R. GHAZI wrote:
> > I'm getting a new bootstrap failure today on sparc-sun-solaris2.10 which
> > I've filed under PR bootstrap/32312. GCC dies in stage1 building libgcc2,
> > I see that it's getting a SEGV because the variable "df" is nil. It mi
Eric Botcazou wrote:
I have downloaded sparc-rtems4.7 and would like to use it for a leon2
target with fpu. I am puzzled on how the compiler inserts fpu instructions.
My summary is:
- The compiler does insert fpu instructions, if no fpu command line option
is given or if "-mhard-quad-float" is u
> I have downloaded sparc-rtems4.7 and would like to use it for a leon2
> target with fpu. I am puzzled on how the compiler inserts fpu instructions.
> My summary is:
>
> - The compiler does insert fpu instructions, if no fpu command line option
> is given or if "-mhard-quad-float" is used.
>
> - T
Rask Ingemann Lambertsen wrote:
LOG_LINKS are gone. Where do I find the equivalent information in a dump
file now?
LOG_LINKS are now stored in a side array. Adding some dumps in
create_log_links would be a good idea indeed.
Paolo
LOG_LINKS are gone. Where do I find the equivalent information in a dump
file now?
--
Rask Ingemann Lambertsen
The gcc version used by RTEMS 4.7 is 4.1.1 with no patches in this area.
I duplicated this behavior with gcc 4.2.0. gcc 3.2.3 still generated FPU
instructions in his test case.
--joel
Peter A. Krauss wrote:
Hello,
I have downloaded sparc-rtems4.7 and would like to use it for a leon2 target
Hello,
I have downloaded sparc-rtems4.7 and would like to use it for a leon2 target
with fpu. I am puzzled on how the compiler inserts fpu instructions. My summary
is:
- The compiler does insert fpu instructions, if no fpu command line option is
given or if "-mhard-quad-float" is used.
- The
Hello all,
I am working for a private GCC target.
The target has 4 registers, each 32 bits reserved for arguments.
When passing arguments depending on the type of the argument either
registers or stack + registers will be used Sometimes the arguments
will be split between a memory location and t
Hello,
I have a new port for CR16 (National Semiconductor's 16-bit processor)
for submission. While I was searching the mail archives, I found
following steps are required for submitting the patches to GCC:
1. Submit the patches for reviewing and approval to gcc-patches mailing
list. After appr
Hi,
Sorry if this is the wrong place to ask this, but I've heard about the
Summer of Code project to create lock-less containers for use with
GCC. What happened to that project? Is there code to download
anywhere?
Best regards,
dm.n9107
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