Hello,
I have downloaded sparc-rtems4.7 and would like to use it for a leon2 target
with fpu. I am puzzled on how the compiler inserts fpu instructions. My summary
is:
- The compiler does insert fpu instructions, if no fpu command line option is
given or if "-mhard-quad-float" is used.
- The compiler does not insert fpu instructions, if "-mfpu" or "-mhard-float"
is used.
Why?
Peter
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$ sparc-rtems-gcc -v
Using built-in specs.
Target: sparc-rtems4.7
Configured with: ../gcc-4.1.1/configure --prefix=/opt/rtems-4.7
--bindir=/opt/rtems-4.7/bin --includedir=/opt/rtems-4.7/include
--libdir=/opt/rtems-4.7/lib --libexecdir=/opt/rtems-4.7/lib
--mandir=/opt/rtems-4.7/man --infodir=/opt/rtems-4.7/info
--datadir=/opt/rtems-4.7/share --build=i686-suse-linux-gnu
--host=i686-suse-linux-gnu --target=sparc-rtems4.7 --with-gnu-as --with-gnu-ld
--verbose --with-newlib --with-system-zlib --disable-nls
--without-included-gettext --disable-win32-registry
--enable-version-specific-runtime-libs --enable-threads --enable-languages=c,c++
Thread model: rtems
gcc version 4.1.1 (RTEMS gcc-4.1.1/newlib-1.15.0-9.suse10.2)
$ cat float.c
float square(float x)
{
return x * x;
}
$ sparc-rtems-gcc -mcpu=cypress -c float.c
$ sparc-rtems-objdump -d float.o
float.o: file format elf32-sparc
Disassembly of section .text:
00000000 <square>:
0: 9d e3 bf 98 save %sp, -104, %sp
4: f0 27 a0 44 st %i0, [ %fp + 0x44 ]
8: d3 07 a0 44 ld [ %fp + 0x44 ], %f9
c: d1 07 a0 44 ld [ %fp + 0x44 ], %f8
10: 91 a2 49 28 fmuls %f9, %f8, %f8
14: 81 a0 00 28 fmovs %f8, %f0
18: 81 e8 00 00 restore
1c: 81 c3 e0 08 retl
20: 01 00 00 00 nop
$ sparc-rtems-gcc -mcpu=cypress -mfpu -c float.c
$ sparc-rtems-objdump -d float.o
float.o: file format elf32-sparc
Disassembly of section .text:
00000000 <square>:
0: 9d e3 bf 98 save %sp, -104, %sp
4: f0 27 a0 44 st %i0, [ %fp + 0x44 ]
8: d0 07 a0 44 ld [ %fp + 0x44 ], %o0
c: d2 07 a0 44 ld [ %fp + 0x44 ], %o1
10: 40 00 00 00 call 10 <square+0x10>
14: 01 00 00 00 nop
18: 82 10 00 08 mov %o0, %g1
1c: b0 10 00 01 mov %g1, %i0
20: 81 e8 00 00 restore
24: 81 c3 e0 08 retl
28: 01 00 00 00 nop
$ sparc-rtems-gcc -mcpu=cypress -mhard-float -c float.c
$ sparc-rtems-objdump -d float.o
float.o: file format elf32-sparc
Disassembly of section .text:
00000000 <square>:
0: 9d e3 bf 98 save %sp, -104, %sp
4: f0 27 a0 44 st %i0, [ %fp + 0x44 ]
8: d0 07 a0 44 ld [ %fp + 0x44 ], %o0
c: d2 07 a0 44 ld [ %fp + 0x44 ], %o1
10: 40 00 00 00 call 10 <square+0x10>
14: 01 00 00 00 nop
18: 82 10 00 08 mov %o0, %g1
1c: b0 10 00 01 mov %g1, %i0
20: 81 e8 00 00 restore
24: 81 c3 e0 08 retl
28: 01 00 00 00 nop
$ sparc-rtems-gcc -mcpu=cypress -mhard-quad-float -c float.c
$ sparc-rtems-objdump -d float.o
float.o: file format elf32-sparc
Disassembly of section .text:
00000000 <square>:
0: 9d e3 bf 98 save %sp, -104, %sp
4: f0 27 a0 44 st %i0, [ %fp + 0x44 ]
8: d3 07 a0 44 ld [ %fp + 0x44 ], %f9
c: d1 07 a0 44 ld [ %fp + 0x44 ], %f8
10: 91 a2 49 28 fmuls %f9, %f8, %f8
14: 81 a0 00 28 fmovs %f8, %f0
18: 81 e8 00 00 restore
1c: 81 c3 e0 08 retl
20: 01 00 00 00 nop
