On 1/15/2025 5:14 PM, Dmitry Baryshkov wrote:
On Wed, Jan 15, 2025 at 04:40:39PM -0800, Abhinav Kumar wrote:
On 1/15/2025 4:32 PM, Dmitry Baryshkov wrote:
On Wed, Jan 15, 2025 at 11:41:27AM -0800, Abhinav Kumar wrote:
On 1/15/2025 12:27 AM, Dmitry Baryshkov wrote:
On Tue, Jan 14, 2025
On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
Inline the _setup_ctl_ops() function, it makes it easier to handle
different conditions involving CTL configuration.
Nothing really wrong with the change. Like the previous patch, would
like to check the other changes to see where we are going
On 1/15/2025 5:15 PM, Dmitry Baryshkov wrote:
On Wed, Jan 15, 2025 at 04:47:34PM -0800, Abhinav Kumar wrote:
On 1/15/2025 4:35 PM, Dmitry Baryshkov wrote:
On Wed, Jan 15, 2025 at 11:51:20AM -0800, Abhinav Kumar wrote:
On 1/15/2025 12:41 AM, Dmitry Baryshkov wrote:
On Tue, Jan 14, 2025
drop this now,
Reviewed-by: Abhinav Kumar
On 1/15/2025 4:35 PM, Dmitry Baryshkov wrote:
On Wed, Jan 15, 2025 at 11:51:20AM -0800, Abhinav Kumar wrote:
On 1/15/2025 12:41 AM, Dmitry Baryshkov wrote:
On Tue, Jan 14, 2025 at 02:02:54PM -0800, Abhinav Kumar wrote:
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
Currently debugfs
On 1/15/2025 4:32 PM, Dmitry Baryshkov wrote:
On Wed, Jan 15, 2025 at 11:41:27AM -0800, Abhinav Kumar wrote:
On 1/15/2025 12:27 AM, Dmitry Baryshkov wrote:
On Tue, Jan 14, 2025 at 01:18:26PM -0800, Abhinav Kumar wrote:
On 1/14/2025 3:10 AM, Dmitry Baryshkov wrote:
On Mon, Jan 13, 2025
On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
As a preparation to further MDSS-revision cleanups stop passing MDSS
revision to the setup_timing_gen() callback. Instead store a pointer to
it inside struct dpu_hw_intf and use it diretly. It's not that the MDSS
revision can chance between dpu_hw
dpu1/catalog/dpu_5_1_sc8180x.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
Change LGTM,
Reviewed-by: Abhinav Kumar
Basically, it means that WB was not validated on those chipsets before
enabling them something
Yes, this has also moved to INTF starting sm8450.
Note : wd timer programming in interface is missing, so that support
needs to be added as well
For this change,
Reviewed-by: Abhinav Kumar
ons(+), 19 deletions(-)
Interesting helper str_true_false :)
LGTM,
Reviewed-by: Abhinav Kumar
On 1/15/2025 12:41 AM, Dmitry Baryshkov wrote:
On Tue, Jan 14, 2025 at 02:02:54PM -0800, Abhinav Kumar wrote:
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
Currently debugfs provides separate 'modes' to override calculated
MDP_CLK rate and interconnect bandwidth votes. Change tha
On 1/15/2025 12:27 AM, Dmitry Baryshkov wrote:
On Tue, Jan 14, 2025 at 01:18:26PM -0800, Abhinav Kumar wrote:
On 1/14/2025 3:10 AM, Dmitry Baryshkov wrote:
On Mon, Jan 13, 2025 at 07:38:16PM -0800, Abhinav Kumar wrote:
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
Move perf mode
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
The max_per_pipe_ib is a constant across all CRTCs and is read from the
catalog. The override value is also applied at the
_dpu_core_perf_crtc_update_bus() time. Drop corresponding calculations
and read the value directly at icc_set_bw() time.
Sugg
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
Currently debugfs provides separate 'modes' to override calculated
MDP_CLK rate and interconnect bandwidth votes. Change that to allow
overriding individual values (e.g. one can override just clock or just
average bandwidth vote). The maximum values
On 1/14/2025 3:10 AM, Dmitry Baryshkov wrote:
On Mon, Jan 13, 2025 at 07:38:16PM -0800, Abhinav Kumar wrote:
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
Move perf mode handling for the bandwidth to
_dpu_core_perf_crtc_update_bus() rather than overriding per-CRTC data
and then aggregating
--
1 file changed, 16 insertions(+), 16 deletions(-)
Reviewed-by: Abhinav Kumar
...@quicinc.com
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 18 ++
1 file changed, 18 insertions(+)
Reviewed-by: Abhinav Kumar
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
Move perf mode handling for the bandwidth to
_dpu_core_perf_crtc_update_bus() rather than overriding per-CRTC data
and then aggregating known values.
Note, this changes the fix_core_ab_vote. Previously it would be
multiplied per the CRTC number, no
, 5 insertions(+), 3 deletions(-)
Reviewed-by: Abhinav Kumar
On 1/11/2025 5:08 AM, Dmitry Baryshkov wrote:
On 11 January 2025 01:49:23 EET, Abhinav Kumar
wrote:
On 1/9/2025 6:02 PM, Dmitry Baryshkov wrote:
On Thu, Jan 09, 2025 at 05:40:23PM -0800, Abhinav Kumar wrote:
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
The fix_core_ab_vote is an
p/dpu1/dpu_core_perf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Abhinav Kumar
On 1/9/2025 6:02 PM, Dmitry Baryshkov wrote:
On Thu, Jan 09, 2025 at 05:40:23PM -0800, Abhinav Kumar wrote:
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
The fix_core_ab_vote is an average bandwidth value, used for bandwidth
overrides in several cases. However there is an internal
On 1/5/2025 7:07 PM, Dmitry Baryshkov wrote:
The fix_core_ab_vote is an average bandwidth value, used for bandwidth
overrides in several cases. However there is an internal inconsistency:
fix_core_ib_vote is defined in KBps, while fix_core_ab_vote is defined
in Bps.
Fix that by changing the t
/msm/disp/dpu1/dpu_core_perf.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Abhinav Kumar
+++
1 file changed, 38 insertions(+), 56 deletions(-)
Reviewed-by: Abhinav Kumar
On 1/8/2025 8:22 PM, Dmitry Baryshkov wrote:
On Wed, Jan 08, 2025 at 05:19:40PM -0800, Abhinav Kumar wrote:
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The driver isn't supposed to consult crtc_state->active/active_check for
resource allocation. Instead all resources s
miss the
documentation for the latter function).
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/drm_atomic_helper.c | 9 +
1 file changed, 9 insertions(+)
With that typo fixed,
Reviewed-by: Abhinav Kumar
On 1/8/2025 8:26 PM, Dmitry Baryshkov wrote:
On Wed, Jan 08, 2025 at 08:11:27PM -0800, Abhinav Kumar wrote:
On 1/8/2025 6:27 PM, Abhinav Kumar wrote:
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the
On 1/8/2025 6:27 PM, Abhinav Kumar wrote:
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the atomic_check() callbacks toggles crtc_state->mode_changed.
Perform corresponding check before calling
On 1/8/2025 7:04 PM, Rob Clark wrote:
On Wed, Jan 8, 2025 at 6:22 PM Abhinav Kumar wrote:
On 1/8/2025 6:14 PM, Dmitry Baryshkov wrote:
On Thu, 9 Jan 2025 at 03:45, Rob Clark wrote:
On Wed, Jan 8, 2025 at 2:58 PM Jessica Zhang wrote:
Force commit that are disabling a plane in the
On 12/21/2024 9:00 PM, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the atomic_check() callbacks toggles crtc_state->mode_changed.
Perform corresponding check before calling the drm_atomic_helper_check()
function.
Fixes: 8b45a26f2ba9 ("drm/
On 1/8/2025 6:14 PM, Dmitry Baryshkov wrote:
On Thu, 9 Jan 2025 at 03:45, Rob Clark wrote:
On Wed, Jan 8, 2025 at 2:58 PM Jessica Zhang wrote:
Force commit that are disabling a plane in the async_crtc to take the
non-async commit tail path.
In cases where there are two consecutive async
/msm/disp/dpu1/dpu_encoder.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
Nice!
Reviewed-by: Abhinav Kumar
isp/dpu1/dpu_encoder.c | 41 -
1 file changed, 22 insertions(+), 19 deletions(-)
Reviewed-by: Abhinav Kumar
et handled in
mode_set to avoid duplicate dpu_rm_reserve() calls. Code has progressed
since then to drop the dpu_rm_reserve() from mode_set and only use
atomic_check.
So the correct fixes tag for this should be:
Fixes: de3916c70a24 ("drm/msm/dpu: Track resources in global sta
On 1/8/2025 6:31 AM, Abel Vesa wrote:
Link Training Tunable PHY Repeaters (LTTPRs) are defined in DisplayPort
1.4a specification. As the name suggests, these PHY repeaters are
capable of adjusting their output for link training purposes.
According to the DisplayPort standard, LTTPRs have two
esa
---
drivers/gpu/drm/display/drm_dp_helper.c | 62 +
include/drm/display/drm_dp_helper.h | 2 ++
2 files changed, 64 insertions(+)
Reviewed-by: Abhinav Kumar
On 12/18/2024 1:33 PM, Jessica Zhang wrote:
On 12/18/2024 3:20 AM, Dmitry Baryshkov wrote:
On Tue, Dec 17, 2024 at 04:27:57PM -0800, Jessica Zhang wrote:
From: Abhinav Kumar
There is no recovery mechanism in place yet to recover from mmu
faults for DPU. We can only prevent the faults by
On 12/23/2024 8:25 PM, Dmitry Baryshkov wrote:
Enable CDM on the X Elite platform, allowing RGB to YUV conversion for
the output.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Abhinav
On 12/23/2024 8:25 PM, Dmitry Baryshkov wrote:
Enable CDM on the SC8280XP platform, allowing RGB to YUV conversion for
the output.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Abhinav
On 12/23/2024 8:25 PM, Dmitry Baryshkov wrote:
Enable the CDM_0 block on all DPU generations which have the CDM block
documented in the vendor dtsi file.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/catal
+-
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Abhinav Kumar
On 1/6/2025 8:50 PM, fange zhang wrote:
On 2025/1/7 3:15, Abhinav Kumar wrote:
On 1/5/2025 10:39 PM, Fange Zhang wrote:
On the SM6150 platform there is WB_2 block. Add it to the SM6150
catalog.
Signed-off-by: Fange Zhang
---
A followup patch to add writeback configuration for the
isplay/msm,
Reviewed-by: Abhinav Kumar
On 1/7/2025 3:48 AM, Dmitry Baryshkov wrote:
On Mon, Jan 06, 2025 at 07:17:40PM -0800, Abhinav Kumar wrote:
On 12/23/2024 8:25 PM, Dmitry Baryshkov wrote:
Enable CDM block on all the platforms where it is supposed to be
present. Notably, from the platforms being supported by the DPU
On 1/7/2025 3:46 AM, Dmitry Baryshkov wrote:
On Tue, Jan 07, 2025 at 09:16:21AM +0100, neil.armstr...@linaro.org wrote:
On 24/12/2024 05:25, Dmitry Baryshkov wrote:
Enable CDM block on all the platforms where it is supposed to be
present. Notably, from the platforms being supported by the DP
On 12/23/2024 8:25 PM, Dmitry Baryshkov wrote:
Enable CDM block on all the platforms where it is supposed to be
present. Notably, from the platforms being supported by the DPU driver
it is not enabled for SM6115 (DPU 6.3), QCM2290 (DPU 6.5) and SM6375
(DPU 6.9)
Thanks for enabling it, but c
insertion(+), 3 deletions(-)
Reviewed-by: Abhinav Kumar
No functional impact expected.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 51 +++---
1 file changed, 26 insertions(+), 25 deletions(-)
Thanks, all formatting / style fixes are good
Reviewed-by: Abhinav Kumar
/gpu/drm/msm/dsi/dsi_host.c | 100 +++--
1 file changed, 41 insertions(+), 59 deletions(-)
Change LGTM,
Reviewed-by: Abhinav Kumar
changed, 3 deletions(-)
Reviewed-by: Abhinav Kumar
Hi Bjorn / Dmitry
Happy New Year !
On 1/6/2025 5:06 PM, Bjorn Andersson wrote:
On Thu, Dec 05, 2024 at 08:31:31PM -0800, Abhinav Kumar wrote:
Please discuss with and reply to Dmitry's questions/feedback on the
list, so that it's possible for others to join the discussion.
Rega
On 12/17/2024 4:35 AM, Dmitry Baryshkov wrote:
The SM6150 platform doesn't have 3DMux (MERGE_3D) block, so it can not
split the screen between two LMs. Drop lm_pair fields as they don't make
sense for this platform.
Suggested-by: Abhinav Kumar
Fixes: cb2f9144693b ("drm/msm/
On 1/5/2025 10:39 PM, Fange Zhang wrote:
On the SM6150 platform there is WB_2 block. Add it to the SM6150 catalog.
Signed-off-by: Fange Zhang
---
A followup patch to add writeback configuration for the SM6150 catalog
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 18 +
ogy has been moved to
dpu_rm.h
Yeah, will be good to check and drop this as its unnecessary. With that
fixed, this LGTM
Reviewed-by: Abhinav Kumar
s://patchwork.kernel.org/project/dri-devel/list/?series=916960 for
these ENC defines. Please indicate it in the cover letter and if we get
an ack to merge it through msm tree, we can absorb in in this series itself.
LGTM otherwise,
Reviewed-by: Abhinav Kumar
+
+KUNIT_AR
include/drm/drm_crtc.h | 2 +-
2 files changed, 21 insertions(+), 1 deletion(-)
Reviewed-by: Abhinav Kumar
supports encoder cloning,
allocating resources from the encoder will be incorrect, as all clones
will have different encoder IDs, while LMs are to be shared by these
encoders.
Signed-off-by: Dmitry Baryshkov
[quic_abhin...@quicinc.com: Refactored resource allocation for CDM]
Signed-off-by: Abhinav
On 12/16/2024 4:43 PM, Jessica Zhang wrote:
From: Dmitry Baryshkov
Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources
from dpu_crtc_assign_resources().
Signed-off-by: Dmitry Baryshkov
[quic_abhin...@quicinc.com: cleaned up formatting]
Signed-off-by: Abhinav Kumar
On 12/16/2024 2:23 PM, Dmitry Baryshkov wrote:
On Mon, Dec 16, 2024 at 11:26:37AM -0800, Abhinav Kumar wrote:
On 12/16/2024 12:20 AM, Dmitry Baryshkov wrote:
According to the vendor devicetree on SM6150 LM_0 is paired with LM_2
rather than LM_1. Correct pairing indices.
Fixes
On 12/16/2024 2:24 PM, Dmitry Baryshkov wrote:
On Mon, Dec 16, 2024 at 11:46:21AM -0800, Abhinav Kumar wrote:
On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
It's the dp_panel's duty to clear the MMSS_DP_DSC_DTO register. Once DP
driver gets DSC support, it will handle that r
On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
After checking the DSPP units in the catalog vs the vendor devicetrees,
link several DSPP units to the corresponding LM units. Each correction
is submitted separately in order to be able to track and apply / skip
them separately based on the feed
n 4.1 (SDM670)")
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h | 54 +-
1 file changed, 52 insertions(+), 2 deletions(-)
Matches the docs I have,
Reviewed-by: Abhinav Kumar
On 12/16/2024 2:24 PM, Dmitry Baryshkov wrote:
On Mon, Dec 16, 2024 at 11:32:57AM -0800, Abhinav Kumar wrote:
On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
Use msm_dp_utils_pack_sdp_header() and call msm_dp_write_link() directly
to program audio packet data. Use 0 as Packet ID, as it was
On 12/16/2024 2:21 PM, Dmitry Baryshkov wrote:
On Mon, Dec 16, 2024 at 01:11:35PM -0800, Abhinav Kumar wrote:
On 12/16/2024 12:27 AM, Dmitry Baryshkov wrote:
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks.
Fixes: 05ae91d960fd ("drm/msm/dpu: enable DSPP support on SM8[
changed, 2 insertions(+)
Reviewed-by: Abhinav Kumar
le changed, 2 insertions(+)
Reviewed-by: Abhinav Kumar
changed, 2 insertions(+)
Reviewed-by: Abhinav Kumar
changed, 2 insertions(+)
Reviewed-by: Abhinav Kumar
+
1 file changed, 2 insertions(+)
Reviewed-by: Abhinav Kumar
+
1 file changed, 2 insertions(+)
Reviewed-by: Abhinav Kumar
+
1 file changed, 2 insertions(+)
Change looks fine
Reviewed-by: Abhinav Kumar
One question below (not tied to the change but arose due to it):
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm81
On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
There is little point in rereading DP controller revision over and over
again. Read it once, after the first software reset and propagate it to
the dp_panel module.
Good idea, can be posted even separately in front of the catalog rework
as it
On 12/14/2024 2:05 PM, Dmitry Baryshkov wrote:
On Sat, 14 Dec 2024 at 22:53, Abhinav Kumar wrote:
Hi Dmitry
On 12/12/2024 3:09 PM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 21:15, Abhinav Kumar wrote:
On 12/12/2024 12:52 AM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 04:59
On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
Having I/O regions inside a msm_dp_catalog_private() results in extra
layers of one-line wrappers for accessing the data. Move I/O region base
and size to the globally visible struct msm_dp_catalog.
Reviewed-by: Stephen Boyd
Tested-by: Stephen B
On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
It's the dp_panel's duty to clear the MMSS_DP_DSC_DTO register. Once DP
driver gets DSC support, it will handle that register in other places
too. Split a call to write 0x0 to that register to a separate function.
Signed-off-by: Dmitry Baryshkov
m/msm/dp/dp_display.c | 2 +-
3 files changed, 2 insertions(+), 6 deletions(-)
Reviewed-by: Abhinav Kumar
/drm/msm/dp/dp_audio.c | 2 -
drivers/gpu/drm/msm/dp/dp_catalog.c | 76 -
drivers/gpu/drm/msm/dp/dp_catalog.h | 24
3 files changed, 102 deletions(-)
Reviewed-by: Abhinav Kumar
On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
Use msm_dp_utils_pack_sdp_header() and call msm_dp_write_link() directly
to program audio packet data. Use 0 as Packet ID, as it was not
programmed earlier.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_audio.c | 268 ++--
On 12/16/2024 12:20 AM, Dmitry Baryshkov wrote:
According to the vendor devicetree on SM6150 LM_0 is paired with LM_2
rather than LM_1. Correct pairing indices.
Fixes: cb2f9144693b ("drm/msm/dpu: Add SM6150 support")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog
On 12/13/2024 12:38 PM, Dmitry Baryshkov wrote:
On Fri, 13 Dec 2024 at 21:15, Abhinav Kumar wrote:
On 12/12/2024 5:05 PM, Dmitry Baryshkov wrote:
On Thu, Dec 12, 2024 at 11:11:54AM -0800, Jessica Zhang wrote:
Filter out modes that have a clock rate greater than the max core clock
rate
tions(-)
Reviewed-by: Abhinav Kumar
On 12/15/2024 9:45 PM, Vignesh Raman wrote:
Hi Abhinav,
On 14/12/24 01:09, Abhinav Kumar wrote:
Hi Vignesh
On 12/11/2024 9:10 PM, Vignesh Raman wrote:
Hi Abhinav / Helen,
On 12/12/24 01:48, Abhinav Kumar wrote:
Hi Helen / Vignesh
On 12/4/2024 12:33 PM, Helen Mae Koike Fornazier wrote
Hi Maxime
Gentle reminder on this one.
We are looking for some advice on how to go about KUnit for this static
function.
Please help with our question below.
Thanks
Abhinav
On 12/6/2024 4:48 PM, Jessica Zhang wrote:
On 9/25/2024 12:23 AM, Maxime Ripard wrote:
On Tue, Sep 24, 2024 at 03
Hi Dmitry
On 12/12/2024 3:09 PM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 21:15, Abhinav Kumar wrote:
On 12/12/2024 12:52 AM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 04:59, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Having I/O regions inside a
On 12/12/2024 4:28 PM, Dmitry Baryshkov wrote:
On Fri, 13 Dec 2024 at 01:53, Abhinav Kumar wrote:
On 12/12/2024 2:28 PM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 23:41, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Use msm_dp_utils_pack_sdp_header() and
Hi Vignesh
On 12/11/2024 9:10 PM, Vignesh Raman wrote:
Hi Abhinav / Helen,
On 12/12/24 01:48, Abhinav Kumar wrote:
Hi Helen / Vignesh
On 12/4/2024 12:33 PM, Helen Mae Koike Fornazier wrote:
On Wed, 04 Dec 2024 16:21:26 -0300 Abhinav Kumar wrote ---
> Hi Helen
>
>
On 12/12/2024 5:05 PM, Dmitry Baryshkov wrote:
On Thu, Dec 12, 2024 at 11:11:54AM -0800, Jessica Zhang wrote:
Filter out modes that have a clock rate greater than the max core clock
rate when adjusted for the perf clock factor
This is especially important for chipsets such as QCS615 that hav
On 12/12/2024 2:28 PM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 23:41, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Use msm_dp_utils_pack_sdp_header() and call msm_dp_write_link() directly
to program audio packet data. Use 0 as Packet ID, as it was not
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Use msm_dp_utils_pack_sdp_header() and call msm_dp_write_link() directly
to program audio packet data. Use 0 as Packet ID, as it was not
programmed earlier.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/
On 12/12/2024 12:52 AM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 04:59, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Having I/O regions inside a msm_dp_catalog_private() results in extra
layers of one-line wrappers for accessing the data. Move I/O region
On 12/12/2024 12:53 AM, Dmitry Baryshkov wrote:
On Thu, 12 Dec 2024 at 05:26, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
All other submodules pass arguments directly. Drop struct
msm_dp_panel_in that is used to wrap dp_panel's submodule args and pass
all da
On 12/12/2024 10:31 AM, Abhinav Kumar wrote:
On 12/12/2024 12:58 AM, Dmitry Baryshkov wrote:
On Wed, Dec 11, 2024 at 05:14:18PM -0800, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Rather than printing random garbage from stack and pretending that
it is
the
On 12/12/2024 12:58 AM, Dmitry Baryshkov wrote:
On Wed, Dec 11, 2024 at 05:14:18PM -0800, Abhinav Kumar wrote:
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Rather than printing random garbage from stack and pretending that it is
the default safe_to_exit_level, set the variable
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
All other submodules pass arguments directly. Drop struct
msm_dp_panel_in that is used to wrap dp_panel's submodule args and pass
all data to msm_dp_panel_get() directly.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/g
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Use msm_dp_utils_pack_sdp_header() and call msm_dp_write_link() directly
to program audio packet data. Use 0 as Packet ID, as it was not
programmed earlier.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/
On 12/11/2024 3:41 PM, Dmitry Baryshkov wrote:
Having I/O regions inside a msm_dp_catalog_private() results in extra
layers of one-line wrappers for accessing the data. Move I/O region base
and size to the globally visible struct msm_dp_catalog.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitr
false on 32-bit platforms. It returns
an error code which nobody actually checks.
Fix the function interface to accept u32[2] and return void, skipping
all the checks.
Fixes: 55fb8ffc1802 ("drm/msm/dp: add VSC SDP support for YUV420 over DP")
Reviewed-by: Abhinav Kumar
Reviewed-by: St
test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202411081748.0ppl9mij-...@intel.com/
Reviewed-by: Stephen Boyd
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/g
Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 37 -
drivers/gpu/drm/msm/dp/dp_catalog.h | 1 -
drivers/gpu/drm/msm/dp/dp_panel.c | 11 ---
drivers/gpu/drm/msm/dp/dp_panel.h | 1 -
4 files changed, 50 deletions(-)
Reviewed-by: Abhinav
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