On 29/04/2023 07:04, Abhinav Kumar wrote:
On 4/28/2023 8:21 PM, Dmitry Baryshkov wrote:
On Sat, 29 Apr 2023 at 05:50, Abhinav Kumar
wrote:
On 4/28/2023 6:41 PM, Dmitry Baryshkov wrote:
On 29/04/2023 04:08, Abhinav Kumar wrote:
On 4/28/2023 5:45 PM, Dmitry Baryshkov wrote:
On 29/04/20
On 29/04/2023 07:29, Abhinav Kumar wrote:
On 4/28/2023 7:42 PM, Dmitry Baryshkov wrote:
The driver doesn't support hsic/memcolor, pcc and igc SSPP subblocks.
Drop corresponding definitions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8
1
On 4/28/2023 7:42 PM, Dmitry Baryshkov wrote:
The driver doesn't support hsic/memcolor, pcc and igc SSPP subblocks.
Drop corresponding definitions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8
1 file changed, 8 deletions(-)
diff --git
On 4/28/2023 8:21 PM, Dmitry Baryshkov wrote:
On Sat, 29 Apr 2023 at 05:50, Abhinav Kumar wrote:
On 4/28/2023 6:41 PM, Dmitry Baryshkov wrote:
On 29/04/2023 04:08, Abhinav Kumar wrote:
On 4/28/2023 5:45 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Legacy DPU
On 4/28/2023 8:12 PM, Dmitry Baryshkov wrote:
On Sat, 29 Apr 2023 at 05:51, Abhinav Kumar wrote:
On 4/28/2023 7:46 PM, Dmitry Baryshkov wrote:
On Sat, 29 Apr 2023 at 02:45, Kuogee Hsieh wrote:
This series adds the DPU side changes to support DSC 1.2 encoder. This
was validated with bo
On Sat, 29 Apr 2023 at 05:50, Abhinav Kumar wrote:
>
>
>
> On 4/28/2023 6:41 PM, Dmitry Baryshkov wrote:
> > On 29/04/2023 04:08, Abhinav Kumar wrote:
> >>
> >>
> >> On 4/28/2023 5:45 PM, Dmitry Baryshkov wrote:
> >>> On 29/04/2023 02:45, Kuogee Hsieh wrote:
> Legacy DPU requires PP hardware
On Sat, 29 Apr 2023 at 05:51, Abhinav Kumar wrote:
>
>
>
> On 4/28/2023 7:46 PM, Dmitry Baryshkov wrote:
> > On Sat, 29 Apr 2023 at 02:45, Kuogee Hsieh wrote:
> >>
> >> This series adds the DPU side changes to support DSC 1.2 encoder. This
> >> was validated with both DSI DSC 1.2 panel and DP DSC
On 4/28/2023 7:46 PM, Dmitry Baryshkov wrote:
On Sat, 29 Apr 2023 at 02:45, Kuogee Hsieh wrote:
This series adds the DPU side changes to support DSC 1.2 encoder. This
was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor.
The DSI and DP parts will be pushed later on top of this c
On 4/28/2023 6:41 PM, Dmitry Baryshkov wrote:
On 29/04/2023 04:08, Abhinav Kumar wrote:
On 4/28/2023 5:45 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Legacy DPU requires PP hardware block involved into setting up DSC
Nit: to be envolved
data path. This patch a
On Sat, 29 Apr 2023 at 02:45, Kuogee Hsieh wrote:
>
> This series adds the DPU side changes to support DSC 1.2 encoder. This
> was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor.
> The DSI and DP parts will be pushed later on top of this change.
> This seriel is rebase on [1], [2] an
The driver doesn't support hsic/memcolor, pcc and igc SSPP subblocks.
Drop corresponding definitions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/d
On 29/04/2023 04:08, Abhinav Kumar wrote:
On 4/28/2023 5:45 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Legacy DPU requires PP hardware block involved into setting up DSC
Nit: to be envolved
data path. This patch add DDPU_PINGPONG_DSC feature bit to both
adds
On 29/04/2023 04:22, Abhinav Kumar wrote:
On 4/28/2023 5:52 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
During DSC preparation, add run time calculation to figure out what
usage modes, split mode and merge mode, is going to be setup.
This patch doesn't determine the
Stop using _sspp_subblk_offset() to get offset of the scaler_blk. Inline
this function and use ctx->cap->sblk->scaler_blk.base directly.
Reviewed-by: Jeykumar Sankaran
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 27 +++--
1 file changed, 9 i
Stop using _sspp_subblk_offset() to get offset of the csc_blk. Inline
this function and use ctx->cap->sblk->csc_blk.base directly.
As this was the last user, drop _sspp_subblk_offset() too.
Reviewed-by: Jeykumar Sankaran
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_
The src_blk declares a lame copy of main SSPP register space. It's
offset is always 0. It's length has been fixed to 0x150, while SSPP's
length is now correct. Drop the src_blk and access SSPP registers
without additional subblock lookup.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/
Rework dpu_hw_sspp.c to access sblk base address directly rather than
getting the sblk address through indirect function call.
Changes since v1:
- Dropped DPU_SSPP_SRC feature, making SRC-related functions mandatory
(suggested by Jeykumar)
Dmitry Baryshkov (3):
drm/msm/dpu: drop SSPP's SRC
On 4/28/2023 5:52 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
During DSC preparation, add run time calculation to figure out what
usage modes, split mode and merge mode, is going to be setup.
This patch doesn't determine the mode. It changes programming of DSC
bits
On 29/04/2023 04:10, Abhinav Kumar wrote:
On 4/28/2023 5:30 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Add support for DSC 1.2 by providing the necessary hooks to program
the DPU DSC 1.2 encoder.
Reported-by: kernel test robot
What exactly was reported?
https:/
On 4/28/2023 5:30 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Add support for DSC 1.2 by providing the necessary hooks to program
the DPU DSC 1.2 encoder.
Reported-by: kernel test robot
What exactly was reported?
https://patchwork.freedesktop.org/patch/533188/?s
On 4/28/2023 5:45 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Legacy DPU requires PP hardware block involved into setting up DSC
Nit: to be envolved
data path. This patch add DDPU_PINGPONG_DSC feature bit to both
adds
PP_BLK and PP_BLK_TE so that both dpu_hw_p
On 4/28/2023 6:04 PM, Dmitry Baryshkov wrote:
On 29/04/2023 04:03, Abhinav Kumar wrote:
On 4/28/2023 5:35 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
From: Abhinav Kumar
In preparation of calling ping-pong DSC related functions only
for chipsets which have such
On 29/04/2023 04:03, Abhinav Kumar wrote:
On 4/28/2023 5:35 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
From: Abhinav Kumar
In preparation of calling ping-pong DSC related functions only
for chipsets which have such a design add the dsc blocks for the
chipsets for w
On 4/28/2023 5:35 PM, Dmitry Baryshkov wrote:
On 29/04/2023 02:45, Kuogee Hsieh wrote:
From: Abhinav Kumar
In preparation of calling ping-pong DSC related functions only
for chipsets which have such a design add the dsc blocks for the
chipsets for which DSC is present but was not added in t
On 29/04/2023 02:45, Kuogee Hsieh wrote:
At current implementation, topology configuration is thrown away after
dpu_rm_reserve(). This patch save the topology so that it can be used
for DSC related calculation later.
Even if we delay the virtual wide planes patchset, please don't save the
topo
On 29/04/2023 02:45, Kuogee Hsieh wrote:
During DSC preparation, add run time calculation to figure out what
usage modes, split mode and merge mode, is going to be setup.
This patch doesn't determine the mode. It changes programming of DSC
bits according to the mode being selected.
Signed-
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Legacy DPU requires PP hardware block involved into setting up DSC
Nit: to be envolved
data path. This patch add DDPU_PINGPONG_DSC feature bit to both
adds
PP_BLK and PP_BLK_TE so that both dpu_hw_pp_setup_dsc() and
dpu_hw_pp_dsc_enable() will be e
On 29/04/2023 02:45, Kuogee Hsieh wrote:
From: Abhinav Kumar
In preparation of calling ping-pong DSC related functions only
for chipsets which have such a design add the dsc blocks for the
chipsets for which DSC is present but was not added in the catalog.
Why/how is it prearing us for such c
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Current DSC flush update is piggyback inside dpu_hw_ctl_intf_cfg_v1().
This patch separate DSC flush away from dpu_hw_ctl_intf_cfg_v1() by
Nit: separates
adding dpu_hw_ctl_update_pending_flush_dsc_v1() to handle both per
DSC engine and DSC flush bits a
On 29/04/2023 02:45, Kuogee Hsieh wrote:
Add support for DSC 1.2 by providing the necessary hooks to program
the DPU DSC 1.2 encoder.
Reported-by: kernel test robot
What exactly was reported?
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers
On 29/04/2023 02:45, Kuogee Hsieh wrote:
This series adds the DPU side changes to support DSC 1.2 encoder. This
was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor.
The DSI and DP parts will be pushed later on top of this change.
This seriel is rebase on [1], [2] and catalog fixes fr
Legacy DPU requires PP hardware block involved into setting up DSC
data path. This patch add DDPU_PINGPONG_DSC feature bit to both
PP_BLK and PP_BLK_TE so that both dpu_hw_pp_setup_dsc() and
dpu_hw_pp_dsc_enable() will be executed during DSC path setup.
Reported-by : Marijn Suijten
Signed-off-by:
During DSC preparation, add run time calculation to figure out what
usage modes, split mode and merge mode, is going to be setup.
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 56 -
1 file changed, 31 insertions(+), 25 deletions(-)
dif
Current DSC flush update is piggyback inside dpu_hw_ctl_intf_cfg_v1().
This patch separate DSC flush away from dpu_hw_ctl_intf_cfg_v1() by
adding dpu_hw_ctl_update_pending_flush_dsc_v1() to handle both per
DSC engine and DSC flush bits at same time to make it consistent with
the location of flush p
At current implementation, topology configuration is thrown away after
dpu_rm_reserve(). This patch save the topology so that it can be used
for DSC related calculation later.
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 32 ++---
1 file c
From: Abhinav Kumar
In preparation of calling ping-pong DSC related functions only
for chipsets which have such a design add the dsc blocks for the
chipsets for which DSC is present but was not added in the catalog.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag information. Each display compression engine (DCE) contains
dual hard slice DSC encoders so both share same base address but with
its own different sub block address.
Signed-off-by: Abhinav
Add support for DSC 1.2 by providing the necessary hooks to program
the DPU DSC 1.2 encoder.
Reported-by: kernel test robot
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 34 ++-
drivers/gpu/drm/msm/disp/
This series adds the DPU side changes to support DSC 1.2 encoder. This
was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor.
The DSI and DP parts will be pushed later on top of this change.
This seriel is rebase on [1], [2] and catalog fixes from [3].
[1]: https://patchwork.freedesktop
Gamma Correction (GC) and Inverse Gamma Correction(IGC) is
currently unused. In addition dpu_dspp_sub_blks didn't even have an igc
member describing the block.
Drop related code from the dpu hardware catalog otherwise this becomes a
burden to carry across chipsets in the catalog.
changes in v3:
Inverse gamma correction blocks (IGC) are not used today so lets
remove the usage of DPU_DSPP_IGC in the DSPP flush to make it easier
to remove IGC from the catalog.
We can add this back when IGC is properly supported in DPU with
one of the standard DRM properties.
changes in v3:
- minor
Since GC and IGC masks have now been dropped DSPP_MSM8998_MASK
is same as DSPP_SC7180_MASK. Since DSPP_SC7180_MASK is used more
than DSPP_MSM8998_MASK, lets drop the latter.
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
---
drivers/gpu/drm/msm/disp/dpu1
Gamma correction blocks (GC) are not used today so lets remove
the usage of DPU_DSPP_GC in the dspp flush to make it easier
to remove GC from the catalog.
We can add this back when GC is properly supported in DPU with
one of the standard DRM properties.
changes in v3:
- drop the link tag
On Thu, 27 Apr 2023 20:21:32 +0800, Jianhua Lu wrote:
> This fixes warning:
> sm8250-xiaomi-elish-csot.dtb: dsi@ae94000: Unevaluated properties are not
> allowed ('qcom,master-dsi', 'qcom,sync-dual-dsi' were unexpected)
>
>
Applied, thanks!
[1/1] dt-bindings: display/msm: dsi-controller-ma
On Wed, 19 Apr 2023 16:41:07 +0200, Arnaud Vrac wrote:
> This series include misc fixes related to hardware resource allocations
> in the msm dpu driver, some specifically for msm8998 (including hw
> catalog fixes and cursor sspp support for cursor planes, instead of
> using Smart DMA pipes).
>
On Wed, 26 Apr 2023 01:11:08 +0200, Marijn Suijten wrote:
> Doing a for loop in every DPU HW block driver init to find a catalog
> entry matching the given ID is rather useless if the init function
> called by RM already has that catalog entry pointer, and uses exactly
> its ID to drive this init
On Fri, 21 Apr 2023 15:56:57 +0100, Srinivas Kandagatla wrote:
> while binding the code always registers a audio driver, however there
> is no corresponding unregistration done in unbind. This leads to multiple
> redundant audio platform devices if dp_display_bind and dp_display_unbind
> happens
On 4/27/2023 5:21 AM, Jianhua Lu wrote:
This fixes warning:
sm8250-xiaomi-elish-csot.dtb: dsi@ae94000: Unevaluated properties are not
allowed ('qcom,master-dsi', 'qcom,sync-dual-dsi' were unexpected)
Reviewed-by: Dmitry Baryshkov
Acked-by: Rob Herring
Signed-off-by: Jianhua Lu
---
Chan
On Fri, Apr 28, 2023 at 3:56 AM Tvrtko Ursulin
wrote:
>
>
> On 27/04/2023 18:53, Rob Clark wrote:
> > From: Rob Clark
> >
> > Add support to dump GEM stats to fdinfo.
> >
> > v2: Fix typos, change size units to match docs, use div_u64
> > v3: Do it in core
> > v4: more kerneldoc
> >
> > Signed-of
On Fri, Apr 28, 2023 at 1:50 AM Christian König
wrote:
>
> Am 27.04.23 um 19:53 schrieb Rob Clark:
> > From: Rob Clark
> >
> > Fix a couple missing ':'s.
> >
> > Signed-off-by: Rob Clark
> > Reviewed-by: Rodrigo Vivi
>
> Reviewed-by: Christian König
>
> Since this is a pretty clear fix I sugge
On 27/04/2023 18:37, Marijn Suijten wrote:
On 2023-04-21 00:31:16, Konrad Dybcio wrote:
Add SM6350 support to the DPU1 driver to enable display output.
Signed-off-by: Konrad Dybcio
Signed-off-by: Konrad Dybcio
After addressing the comments from Dmitry (CURSOR0->DMA1 and
CURSOR1->DMA2), this
On 4/27/23 16:46, Marijn Suijten wrote:
> On 2023-04-21 00:31:18, Konrad Dybcio wrote:
>> Add basic SM6375 support to the DPU1 driver to enable display output.
>>
>> Signed-off-by: Konrad Dybcio
>> ---
>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 5 -
>> .../gpu/drm/msm/disp/dpu1/c
On 4/27/23 16:48, Marijn Suijten wrote:
> On 2023-04-27 17:37:42, Marijn Suijten wrote:
>> On 2023-04-21 00:31:16, Konrad Dybcio wrote:
>>> Add SM6350 support to the DPU1 driver to enable display output.
>>>
>>> Signed-off-by: Konrad Dybcio
>>> Signed-off-by: Konrad Dybcio
>> After addressing t
[...]
>> +
>> +static const struct dpu_caps sm6350_dpu_caps = {
>> +.max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
>> +.max_mixer_blendstages = 0x7,
>> +.qseed_type = DPU_SSPP_SCALER_QSEED4,
> I thought it was QSEED3LITE, but doesn't really matter as both are
> handled similarly.
On 27/04/2023 18:53, Rob Clark wrote:
From: Rob Clark
These are useful in particular for VM scenarios where the process which
has opened to drm device file is just a proxy for the real user in a VM
guest.
Signed-off-by: Rob Clark
---
Documentation/gpu/drm-usage-stats.rst | 18
On 27/04/2023 18:53, Rob Clark wrote:
From: Rob Clark
Add support to dump GEM stats to fdinfo.
v2: Fix typos, change size units to match docs, use div_u64
v3: Do it in core
v4: more kerneldoc
Signed-off-by: Rob Clark
Reviewed-by: Emil Velikov
Reviewed-by: Daniel Vetter
---
Documentatio
Am 27.04.23 um 19:53 schrieb Rob Clark:
From: Rob Clark
Fix a couple missing ':'s.
Signed-off-by: Rob Clark
Reviewed-by: Rodrigo Vivi
Reviewed-by: Christian König
Since this is a pretty clear fix I suggest to get this pushed to reduce
the number of patches in the set.
Christian.
---
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