Re: Re: intel checksum offload

2012-04-13 Thread beezarliu
04:58:10 收件人： Hooman Fazaeli 抄送： jfv; freebsd-hackers 主题： Re: intel checksum offload On Sat, Sep 17, 2011 at 11:57:10AM +0430, Hooman Fazaeli wrote: > Hi list, > > The data sheet for intel 82576 advertises IP TX/RX checksum offload > but the driver does not set CSUM_IP in ifp-&

Re: intel checksum offload

2011-09-19 Thread Arnaud Lacombe
Hi, On Mon, Sep 19, 2011 at 12:59 PM, YongHyeon PYUN wrote: > On Mon, Sep 19, 2011 at 10:17:22AM -0400, Arnaud Lacombe wrote: >> Hi, >> >> On Mon, Sep 19, 2011 at 5:28 AM, Adrian Chadd wrote: >> > Arnaud (and others), >> > >> > Liaising with vendors is not an easy task. The reason why Intel (and

Re: intel checksum offload

2011-09-19 Thread YongHyeon PYUN
On Mon, Sep 19, 2011 at 10:17:22AM -0400, Arnaud Lacombe wrote: > Hi, > > On Mon, Sep 19, 2011 at 5:28 AM, Adrian Chadd wrote: > > Arnaud (and others), > > > > Liaising with vendors is not an easy task. The reason why Intel (and > > other vendors) don't supply detailed history and reasoning for t

Re: intel checksum offload

2011-09-19 Thread Arnaud Lacombe
Hi, On Mon, Sep 19, 2011 at 5:28 AM, Adrian Chadd wrote: > Arnaud (and others), > > Liaising with vendors is not an easy task. The reason why Intel (and > other vendors) don't supply detailed history and reasoning for their > development efforts is that their engineers are likely tasked with > "m

Re: intel checksum offload

2011-09-19 Thread John Baldwin
On Sunday, September 18, 2011 10:48:32 pm Arnaud Lacombe wrote: > As the PCI spec is not public, I've not been able to find out from the > few public datasheet how the PCI MSI-X capability field is first > programmed. I'd assume that the BIOS is using the data in the NVM to > program it at power up

Re: intel checksum offload

2011-09-19 Thread Jack Vogel
On Sun, Sep 18, 2011 at 7:48 PM, Arnaud Lacombe wrote: > Hi, > > On Sun, Sep 18, 2011 at 10:01 PM, Luigi Rizzo wrote: > > On Sun, Sep 18, 2011 at 06:05:33PM -0400, Arnaud Lacombe wrote: > >> Hi, > >> > >> On Sun, Sep 18, 2011 at 5:06 PM, Luigi Rizzo > wrote: > >> > On Sun, Sep 18, 2011 at 03:19

Re: intel checksum offload

2011-09-19 Thread Adrian Chadd
Arnaud (and others), Liaising with vendors is not an easy task. The reason why Intel (and other vendors) don't supply detailed history and reasoning for their development efforts is that their engineers are likely tasked with "making it work" versus "writing lots of stuff down for public release."

Re: intel checksum offload

2011-09-19 Thread Hooman Fazaeli
It is interesting that how a thread goes off topic! Anyway, I will appreciate if folks, especially Jack, provide a firm comment on the original question: Does intel chips (specifically 82576) support IP TX checksum offload? If so, why the driver does not support it? On 9/19/2011 8:59 AM, Jack V

Re: intel checksum offload

2011-09-18 Thread Arnaud Lacombe
Hi, On Mon, Sep 19, 2011 at 12:29 AM, Jack Vogel wrote: > [...] > If you notice, the Linux driver did not enable multiqueue on the hardware > either, so do you think a whole department of software engineers backed > by the hardware engineers who designed the damn thing might have had > a reason?

Re: intel checksum offload

2011-09-18 Thread Arnaud Lacombe
Hi, On Sun, Sep 18, 2011 at 10:01 PM, Luigi Rizzo wrote: > On Sun, Sep 18, 2011 at 06:05:33PM -0400, Arnaud Lacombe wrote: >> Hi, >> >> On Sun, Sep 18, 2011 at 5:06 PM, Luigi Rizzo wrote: >> > On Sun, Sep 18, 2011 at 03:19:46PM -0400, Arnaud Lacombe wrote: >> >> Hi, >> >> >> >> On Sat, Sep 17, 2

Re: intel checksum offload

2011-09-18 Thread Adrian Chadd
.. and believe me, lots of people will appreciate it if you can verify/diagnose issues. :) Adrian ___ freebsd-hackers@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-hackers To unsubscribe, send any mail to "freebsd-hackers-u

Re: intel checksum offload

2011-09-18 Thread Luigi Rizzo
On Sun, Sep 18, 2011 at 06:05:33PM -0400, Arnaud Lacombe wrote: > Hi, > > On Sun, Sep 18, 2011 at 5:06 PM, Luigi Rizzo wrote: > > On Sun, Sep 18, 2011 at 03:19:46PM -0400, Arnaud Lacombe wrote: > >> Hi, > >> > >> On Sat, Sep 17, 2011 at 4:32 PM, YongHyeon PYUN wrote: > >> > On Sat, Sep 17, 2011

Re: intel checksum offload

2011-09-18 Thread Arnaud Lacombe
Hi, On Sun, Sep 18, 2011 at 5:06 PM, Luigi Rizzo wrote: > On Sun, Sep 18, 2011 at 03:19:46PM -0400, Arnaud Lacombe wrote: >> Hi, >> >> On Sat, Sep 17, 2011 at 4:32 PM, YongHyeon PYUN wrote: >> > On Sat, Sep 17, 2011 at 11:57:10AM +0430, Hooman Fazaeli wrote: >> >> Hi list, >> >> >> >> The data s

Re: intel checksum offload

2011-09-18 Thread Luigi Rizzo
On Sun, Sep 18, 2011 at 03:19:46PM -0400, Arnaud Lacombe wrote: > Hi, > > On Sat, Sep 17, 2011 at 4:32 PM, YongHyeon PYUN wrote: > > On Sat, Sep 17, 2011 at 11:57:10AM +0430, Hooman Fazaeli wrote: > >> Hi list, > >> > >> The data sheet for intel 82576 advertises IP TX/RX checksum offload > >> but

Re: intel checksum offload

2011-09-18 Thread Arnaud Lacombe
Hi, On Sat, Sep 17, 2011 at 4:32 PM, YongHyeon PYUN wrote: > On Sat, Sep 17, 2011 at 11:57:10AM +0430, Hooman Fazaeli wrote: >> Hi list, >> >> The data sheet for intel 82576 advertises IP TX/RX checksum offload >> but the driver does not set CSUM_IP in ifp->if_hwassist. Does this mean that >> dri

Re: intel checksum offload

2011-09-17 Thread YongHyeon PYUN
On Sat, Sep 17, 2011 at 11:57:10AM +0430, Hooman Fazaeli wrote: > Hi list, > > The data sheet for intel 82576 advertises IP TX/RX checksum offload > but the driver does not set CSUM_IP in ifp->if_hwassist. Does this mean that > driver (and chip) do not support IP TX checksum offload or the support