Ivan Voras <[EMAIL PROTECTED]> wrote:
> [EMAIL PROTECTED] wrote:
>
> > The degree to which a PowerPC imposes a strict alignment
> > requirement depends on both the particular processor model
> > and the operation being performed.
> >
> > For ordinary integer arithmetic and logical operations, new
PJ> Date: Sun, 30 Dec 2007 08:35:21 +1100
PJ> From: Peter Jeremy
PJ> On Sat, Dec 29, 2007 at 08:50:14PM +, Edward B. DREGER wrote:
PJ> >
PJ> >perfect_hash = ( hash1[x] + hash2[x] ) % entry_count ;
PJ> This relies on pre-knowledge of all possible entries. It's
PJ> excellent for (eg) keyword l
[EMAIL PROTECTED] wrote:
> The degree to which a PowerPC imposes a strict alignment requirement
> depends on both the particular processor model and the operation
> being performed.
>
> For ordinary integer arithmetic and logical operations, newer
> PPC processors tend to be more tolerant (althou
"M. Warner Losh" <[EMAIL PROTECTED]> wrote:
> In message: <[EMAIL PROTECTED]>
> Ivan Voras <[EMAIL PROTECTED]> writes:
> : Which of the architectures FreeBSD supports (if any) have strict
> : memory alignment requirements? (in the sense that accessing a
> : 32-bit integer not aligned o
Wilko Bulte <[EMAIL PROTECTED]> writes:
> In the past the alpha port had it too.
No, it was optional and defaulted to off.
DES
--
Dag-Erling Smørgrav - [EMAIL PROTECTED]
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Chuck Robey <[EMAIL PROTECTED]> writes:
> I'm sorry, Dag, but I am myself having problem describing it. I have been
> asking for names, but while I get some guesses about the loss of printing,
> they haven't given me names to use. I see two items that I can get, when
> booting. If I stick "-v" i
> (though the AMD29K could apparently generate
> dummy bus cycles to limit the number of bit transitions on any cycle
> to reduce the I/O load).
Are you sure it was the amd29k? I don't recall anything like
that (and am too lazy to dig out its datasheets!).
It too requiredd st
On Sat, Dec 29, 2007 at 06:03:15PM +0800, Erich Dollansky wrote:
>All RISC based designs need the alignment so that the CPU can fetch a CPU
>word in one go. CISC based designs do not have this limitiation.
It's more that the additional logic required to split a single memory
operation (load/store
On Sat, Dec 29, 2007 at 08:50:14PM +, Edward B. DREGER wrote:
>...have you explored [order-preserving] minimal perfect hash functions?
>
>perfect_hash = ( hash1[x] + hash2[x] ) % entry_count ;
This relies on pre-knowledge of all possible entries. It's excellent for
(eg) keyword lookups in a c
On Sat, Dec 29, 2007 at 01:58:32PM -0500, Chuck Robey wrote:
>booting. If I stick "-v" in /boot.config, then when the kernel probes, all
>the probes are verbose. Stuff like my HDaudio card print incredibly
>verbose listings. OK, that's what I will call here Print#1
>
>The other thing is what I c
GC> Date: Thu, 27 Dec 2007 16:34:32 -0800
GC> From: Garrett Cooper
GC> On Dec 27, 2007, at 4:30 PM, Garrett Cooper wrote:
GC>
GC> > Just wondering if anyone knew of a good BSD license compatible
GC> > key-based hash placement / retrieval algorithm that was available
GC> > anywhere.
GC>
GC> 1. It n
On Sat, Dec 29, 2007 at 09:42:38PM +0100, Erik Trulsson wrote:
> If you do not see any boot messages at all, then my guess is that you
> probably have messed around with /boot/device.hints (or compiled in a hints
> file in the kernel) and removed or disabled the hints for the video
> adapter/system
On Sat, Dec 29, 2007 at 01:58:32PM -0500, Chuck Robey wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> Dag-Erling Smørgrav wrote:
> > Chuck Robey <[EMAIL PROTECTED]> writes:
> >> Anyhow, in the midst of all the screwing around, I now find that, on the
> >> Ascii-graphics FreeBSD loader
Quoting M. Warner Losh, who wrote on Sat, Dec 29, 2007 at 12:22:21PM -0700 ..
> In message: <[EMAIL PROTECTED]>
> Ivan Voras <[EMAIL PROTECTED]> writes:
> : Which of the architectures FreeBSD supports (if any) have strict memory
> : alignment requirements? (in the sense that accessing a
In message: <[EMAIL PROTECTED]>
Ivan Voras <[EMAIL PROTECTED]> writes:
: Which of the architectures FreeBSD supports (if any) have strict memory
: alignment requirements? (in the sense that accessing a 32-bit integer
: not aligned on a 32-bit address results in a hardware trap/exception
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Dag-Erling Smørgrav wrote:
> Chuck Robey <[EMAIL PROTECTED]> writes:
>> Anyhow, in the midst of all the screwing around, I now find that, on the
>> Ascii-graphics FreeBSD loader UI, if I choose Option #5 (verbose loading)
>> then the printing of the re
Am 29.12.2007 um 13:01 schrieb Joerg Sonnenberger:
On Sat, Dec 29, 2007 at 06:03:15PM +0800, Erich Dollansky wrote:
I also do not know of any other CISC based design which made it to
mainstream.
VAX?
There is a working FreeBSD/VAX?
(Whatever - just as I don't understand any sane being run
On Sat, 29 Dec 2007 13:41:21 +0100 Erik Trulsson <[EMAIL PROTECTED]> wrote:
> On Sat, Dec 29, 2007 at 06:03:15PM +0800, Erich Dollansky wrote:
> > All RISC based designs need the alignment so that the CPU can fetch a CPU
> > word in one go. CISC based designs do not have this limitiation.
> >
> >
On Tuesday 25 December 2007 5:21:25 pm you wrote:
> A problem internal to GDB has been detected,
> ---Type to continue, or q to quit---
> further debugging may prove unreliable.
> Create a core file of GDB? (y or n) n
> 0x29b2287f in ?? ()
> (gdb) b file.cpp:420
> No symbol table is loaded. Use
On Tuesday 25 December 2007 5:21:25 pm you wrote:
> Hi hackers
>
> I'm trying to make some debbuging on kde compiled with debbugfull
>
> but gdb is complaing about:
>
> kde4# gdb -pid 12241
> GNU gdb 6.1.1 [FreeBSD]
> Copyright 2004 Free Software Foundation, Inc.
> GDB is free software, covered by
On Sat, Dec 29, 2007 at 06:03:15PM +0800, Erich Dollansky wrote:
> Hi,
>
> Kip Macy wrote:
>> Isn't it everything except x86?
>
> not really.
>
> All RISC based designs need the alignment so that the CPU can fetch a CPU
> word in one go. CISC based designs do not have this limitiation.
>
> I a
On Sat, Dec 29, 2007 at 06:03:15PM +0800, Erich Dollansky wrote:
> I also do not know of any other CISC based design which made it to
> mainstream.
VAX?
Joerg
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"Aryeh M. Friedman" <[EMAIL PROTECTED]> writes:
> All hashs have issues with pooling see
> http://www.burtleburtle.net/bob/hash/index.html... btw it is a old
> wives tale that the number of buckets should be prime (mostly based on
> the very weak implementation Knuth offered)
Not an "old wives
On Sat, Dec 29, 2007 at 12:14:11AM -0800, Kip Macy wrote:
> Isn't it everything except x86?
>
> -Kip
x86 has the AC bit in the eflags. The AM bit in cr0 is enabled by the
kernel, and AC could be switched on by LD_PRELOADed shared object.
Last time I checked, our libc caused unaligned access in th
Hi,
Kip Macy wrote:
Isn't it everything except x86?
not really.
All RISC based designs need the alignment so that the CPU can fetch a
CPU word in one go. CISC based designs do not have this limitiation.
I also do not know of any other CISC based design which made it to
mainstream.
Erich
On Dec 7, 2007, at 6:43 PM, Ivan Voras wrote:
Hi,
Which of the architectures FreeBSD supports (if any) have strict
memory
alignment requirements? (in the sense that accessing a 32-bit integer
not aligned on a 32-bit address results in a hardware trap/exception).
ia64 and sparc64 at least.
Isn't it everything except x86?
-Kip
On Dec 29, 2007 12:11 AM, Erich Dollansky <[EMAIL PROTECTED]> wrote:
> Hi,
>
>
> Ivan Voras wrote:
> > Hi,
> >
> > Which of the architectures FreeBSD supports (if any) have strict memory
> > alignment requirements? (in the sense that accessing a 32-bit integer
Hi,
Ivan Voras wrote:
Hi,
Which of the architectures FreeBSD supports (if any) have strict memory
alignment requirements? (in the sense that accessing a 32-bit integer
not aligned on a 32-bit address results in a hardware trap/exception).
isn't this the case with SPARC and Itanium?
I know, t
Ivan Voras wrote:
Which of the architectures FreeBSD supports (if any) have strict memory
alignment requirements? (in the sense that accessing a 32-bit integer
not aligned on a 32-bit address results in a hardware trap/exception).
I believe ARM has such requirements (at least,
GCC for Arm does
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