ssage into
debug message.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..a3
ssage into
debug message.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 24 ---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f0
ssage into
debug message.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 27 +--
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f0
Add err code check for enable_communication on resume path, set wedged if
failed.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 5 -
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 9 +++--
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu
Add err code check for enable_communication on resume path. When resume failed,
we can no longer use the GPU, marking the GPU as wedged.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 7 ++-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 9 +++--
2 files changed, 13
Add err code check for enable_communication on resume path. When resume failed,
we can no longer use the GPU, marking the GPU as wedged.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 7 ++-
drivers/gpu/drm/i915/gt/intel_reset.c | 19 ---
drivers
lls
asynchronous cancel.
v3: Add sync flag to intel_guc_submission_disable to ensure reset path calls
asynchronous cancel.
Signed-off-by: Zhanjun Dong
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 17 ++---
.../gpu/drm/i915/gt/uc/intel_guc_submission.h | 2 +-
drivers/gpu/drm/
The previouse i915_gem_object_create_internal already set it with proper value
before function return. This hard coded setting is incorrect for platforms like
MTL, thus need to be removed.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 2 --
1 file changed, 2
The previouse i915_gem_object_create_internal already set it with proper
value before function return. This hard coded setting is incorrect for
platforms like MTL, thus need to be removed.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 2 --
1 file changed, 2
The previouse i915_gem_object_create_internal already set it with proper
value before function return. This hard coded setting is incorrect for
platforms like MTL, thus need to be removed.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 2 --
1 file changed, 2
asynchronous cancel.
v3: Add sync flag to intel_guc_submission_disable to ensure reset path calls
asynchronous cancel.
v4: Set to always sync from __uc_fini_hw path.
Signed-off-by: Zhanjun Dong
Cc: John Harrison
Cc: Andi Shyti
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 17 +
30 (sb_writers#15){.+.+}-{0:0}, at: ksys_write+0x64/0xe0
#1: 888136c7eab8 (&attr->mutex){+.+.}-{3:3}, at:
simple_attr_write_xsigned.constprop.0+0x47/0x110
#2: 88813e6cce90 (>->reset.mutex){+.+.}-{3:3}, at:
intel_gt_reset+0x19e/0x470 [i915]
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/
e+0x64/0xe0
#1: 888136c7eab8 (&attr->mutex){+.+.}-{3:3}, at:
simple_attr_write_xsigned.constprop.0+0x47/0x110
#2: 88813e6cce90 (>->reset.mutex){+.+.}-{3:3}, at:
intel_gt_reset+0x19e/0x470 [i915]
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/uc/intel_guc_
intel_gt_reset called, reset_in_progress flag will be set, add code
to check the flag, call async verion if reset is in progress.
Signed-off-by: Zhanjun Dong
Cc: John Harrison
Cc: Andi Shyti
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 11 ++-
1 file
As context structure is shared memory for CPU/GPU, Wa_22016122933 is
needed for this memory block as well.
Signed-off-by: Zhanjun Dong
CC: Fei Yang
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt
gt wedged is fatal error, skip the pxp init on this situation.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c
b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index dc327cf40b5a
The gt wedged could be triggered by missing guc firmware file, HW not
working, etc. Once triggered, it means all gt usage is dead, therefore we
can't enable pxp under this fatal error condition.
v2: Updated commit message.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/pxp/intel_
The gt wedged could be triggered by missing guc firmware file, HW not
working, etc. Once triggered, it means all gt usage is dead, therefore we
can't enable pxp under this fatal error condition.
v2: Updated commit message.
v3: Updated return code check.
Signed-off-by: Zhanjun Dong
---
dr
.
Signed-off-by: Zhanjun Dong
Zhanjun Dong (9):
drm/xe/guc: Add register defines for GuC based register capture
drm/xe/guc: Expose dss per group for GuC error capture
drm/xe/guc: Update GuC ADS size for error capture
drm/xe/guc: Add XE_LP steered register lists
drm/xe/guc: Add capture size
Add registers defines and list of registers for GuC based error state capture.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/Kconfig | 11 +++
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 12 +++
drivers/gpu/drm/xe/regs
. This is reserved for future.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/xe_guc_capture.c | 99 ++-
drivers/gpu/drm/xe/xe_guc_capture.h | 10 +++
drivers/gpu/drm/xe/xe_hw_engine.c | 73 -
drivers/gpu/drm/xe/xe_hw_engine_types.h | 103
Pre-allocate a fixed number of empty nodes up front (at the
time of ADS registration) that we can consume from or return to
an internal cached list of nodes.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/xe_guc_capture.c | 83 +
1 file changed, 83 insertions
The capture-nodes is included in GuC log buffer, add the size check
for capture region in the whole GuC log buffer.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/xe_gt_printk.h | 3 +
drivers/gpu/drm/xe/xe_guc_fwif.h | 48 +++
drivers/gpu/drm/xe/xe_guc_log.c | 179
every engine-class type on the current hardware.
Ensure we allocate a persistent store for the register lists
that are populated into ADS so that we don't need to allocate
memory during GT resets when GuC is reloaded and ADS population
happens again.
Signed-off-by: Zhanjun Dong
---
driver
Expose helper for dss per group of mcr, GuC error capture feature
need this info to prepare buffer required.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/xe_gt_mcr.c | 4 ++--
drivers/gpu/drm/xe/xe_gt_mcr.h | 1 +
drivers/gpu/drm/xe/xe_gt_topology.c | 3
Add capture output size check function to provide a reasonable
minimum size for error capture region before allocating the shared
buffer.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/xe_guc_capture.c | 76 +
1 file changed, 76 insertions(+)
diff --git a
Add the ability for runtime allocation and freeing of
steered register list extentions that depend on the
detected HW config fuses.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/xe_guc_capture.c | 187 +++-
1 file changed, 185 insertions(+), 2 deletions(-)
diff
ned-off-by: Zhanjun Dong
---
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 7 +
drivers/gpu/drm/xe/xe_guc_capture.c | 572 +++
drivers/gpu/drm/xe/xe_guc_ct.c | 2 +
drivers/gpu/drm/xe/xe_guc_submit.c | 22 +-
drivers/gpu/drm/xe/xe_guc_submit.h | 3
During GuC reset prepare, interrupt disabled before hardware reset.
Add disable ct to prevent unnecessary message processing.
Signed-off-by: Zhanjun Dong
Zhanjun Dong (1):
drm/i915/guc: Disable ct during GuC reset
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 3 +++
drivers/gpu/drm
During GuC reset prepare, interrupt disabled before hardware reset.
Add disable ct to prevent unnecessary message processing.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 3 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 ++
2 files changed, 5
the
context already been destroyed.
Signed-off-by: Zhanjun Dong
Zhanjun Dong (1):
drm/i915/guc: Move destroy context at end of reset prepare
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.34.1
the
context already been destroyed.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index
intel_uc_reset_prepare
already finished guc sanitize and set ct->enable to false. This will
causes warning on incorrect ct->enable state.
Fixed by disable ct receive tasklet during reset preparation to avoid
the above race condition.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915
sanitize and set ct->enable to false. This will
causes warning on incorrect ct->enable state.
(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12439)
Add the missing tasklet flush to flush all 3 parts.
Signed-off-by: Zhanjun Dong
Reviewed-by: Alan Previn
---
drivers/gpu/drm/i915
all 3 parts.
Signed-off-by: Zhanjun Dong
Cc: John Harrison
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submis
/guc: Correctly handle GuC interrupts on Gen11")
Fixes: 2ae096872a2c ("drm/i915/pxp: Implement PXP irq handler")
Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management")
Signed-off-by: Zhanjun Dong
---
Cc: Alan Previn
Cc: Daniele Ceraolo Spurio
Cc: Rodr
36 matches
Mail list logo
