VDDA is not present and the specified load value is wrong. Fix it.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 1 -
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi
The previous registers were *almost* correct, but instead of
PHYs, they were pointing at DSI PLLs, resulting in the PHY id
autodetection failing miserably.
Fixes: dcefc117cc19 ("drm/msm/dsi: Add support for msm8x94")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/phy/dsi_
The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
index
Add a compatible for PMI8994 WLED. It uses the V4 of WLED IP.
Signed-off-by: Konrad Dybcio
---
drivers/video/backlight/qcom-wled.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/backlight/qcom-wled.c
b/drivers/video/backlight/qcom-wled.c
index 3bc7800eb0a9..497b9035a908
Document the newly added PMI8994 compatible.
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml
b/Documentation/devicetree/bindings
Del Regno
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index b2ff68a15791..f3f1c03c7db9 100644
--- a/drivers/gpu/drm/msm/dsi
While passing the A530-specific lm_setup func to A530 and A540
to !A530 was fine back when only these two were supported, it
certainly is not a good idea to send A540 specifics to smaller
GPUs like A508 and friends.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a5xx_power.c | 2
Leading spaces are not something checkpatch likes, and it says so when
they are present. Use tabs consistently to indent function body and
unwrap a 83-char-long line, as 100 is cool nowadays.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 17 -
1 file
There are various SKUs of A619, ranging from 565 MHz to 850 MHz, depending
on the bin. Add support for distinguishing them, so that proper frequency
ranges can be applied, depending on the HW.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 18 ++
1 file
Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350),
480 (SM4350) and 750G (SM7225).
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 ++--
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 70 +-
drivers/gpu/drm/msm/adreno
There is *almost no reason* to keep separate compatibles for different
SoCs utilizing the DPU1 driver, as it checks the HW version at runtime.
Introduce a common compatible, while not removing the old ones to keep
old DT compatibility.
Signed-off-by: Konrad Dybcio
---
Bar some very very very
[snipping to not have the entire thread here]
I've no objections to seeing the DT updated. However I don't really see
what benefit we get from breaking existing DTs in order to do so.
"Cleaning up annoying legacy" is seldom a good reason to break existing
DTs since, if we could break DTs wheneve
Kind reminder that MSM8974, 8994, 8992 and friends are held back by the lack of
IOMMU support upstream. There has been an attempt back in 2014(!) [1], but it
was either overlooked or forgotten about ever since. I'd be more than happy to
see someone look into this, as I have some other bits (almo
Using this code on A5xx (and probably older too) causes a
smmu bug.
Fixes: 474dadb8b0d5 ("drm/msm/a6xx: Add support for using system cache(LLC)")
Signed-off-by: Konrad Dybcio
Tested-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 21
> Konrad, can you please test this below change without your change?
This brings no difference, a BUG still happens. We're still calling to_a6xx_gpu
on ANY device that's probed! Too bad it won't turn my A330 into an A640..
Also, relying on disabling LLCC in the config is out of question as it ma
On 15.06.2022 01:01, Emma Anholt wrote:
> Required for turning on per-process page tables for the GPU.
>
> Signed-off-by: Emma Anholt
> ---
Reviewed-by: Konrad Dybcio
Konrad
>
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
Add yaml binding for MSM8996 DPU.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/dpu-msm8996.yaml | 221 ++
1 file changed, 221 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dpu-msm8996.yaml
diff --git a/Documentation/devicetree
y SoC
supported by DPU that uses RGB pipes.
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 268 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
drivers/gpu/drm/msm/msm_drv.c | 1 +
3 files changed, 270 insertions(+)
diff --
Due to MSM8998 support having been stuck in review for so long,
another struct was added nearby, which confused git and resulted
in the definitions not being sorted alphabetically. Fix it.
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 22 +--
1
On 03/05/2022 22:43, Dmitry Baryshkov wrote:
Correct a typo in the address of the second DSI PHY in the SDM660 device
config.
Fixes: 694dd304cc29 ("drm/msm/dsi: Add phy configuration for SDM630/636/660")
Cc: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
1.838944] geni_i2c 99.i2c: DMA txn failed:3
[1.839166] geni_i2c 99.i2c: GPI transfer failed: -5
Still, this is a very nice improvement.
Reviewed-by: Konrad Dybcio
Konrad
> drivers/i2c/busses/i2c-qcom-geni.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
>
This BUG_ON will never be reached, and there is a comment 20 above
explaining why.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index
There are various SKUs of A619, ranging from 565 MHz to 850 MHz, depending
on the bin. Add support for distinguishing them, so that proper frequency
ranges can be applied, depending on the HW.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 19 +++
1
Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350),
480 (SM4350) and 750G (SM7225).
Signed-off-by: Konrad Dybcio
---
Changes since v2:
- Fix some values in a619_build_bw_table (I think I miscopied things last
time around..)
- Add a comment about icache/dcache allocation for
Leading spaces are not something checkpatch likes, and it says so when
they are present. Use tabs consistently to indent function body and
unwrap a 83-char-long line, as 100 is cool nowadays.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 17 -
1 file
On 10.07.2022 11:00, Dmitry Baryshkov wrote:
> Rename DPU device node to display-controller@ae01000 to follow the
> DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
> 1 file chang
On 10.07.2022 11:00, Dmitry Baryshkov wrote:
> Rename DPU device node to display-controller@ae01000 to follow the
> DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> 1 file chang
On 10.07.2022 11:00, Dmitry Baryshkov wrote:
> Rename DPU device node to display-controller@ae01000 to follow the
> DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
> 1 file chang
Leading spaces are not something checkpatch likes, and it says so when
they are present. Use tabs consistently to indent function body and
unwrap a 83-char-long line, as 100 is cool nowadays.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 17 -
1 file
There are various SKUs of A619, ranging from 565 MHz to 850 MHz, depending
on the bin. Add support for distinguishing them, so that proper frequency
ranges can be applied, depending on the HW.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
drivers/gpu/drm/msm
Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350),
480 (SM4350) and 750G (SM7225).
Signed-off-by: Konrad Dybcio
---
Changes in v2:
- Don't reserve icache/dcache regions on legacy GMUs, as that
is apparently not necessary and simply a downstream leftover.
drivers/gp
Add bindings for the display panel used on some Sony Xperia XZ2 and XZ2
Compact smartphones.
Signed-off-by: Konrad Dybcio
---
Changes since v1:
- remove device-specific compatibles in favour of panel-common
height/width-mm properties
- fix indentation in the example
.../display/panel/sony
/dev/null
+++ b/drivers/gpu/drm/panel/panel-sony-td4353-jdi.c
@@ -0,0 +1,328 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022 Konrad Dybcio
+ *
+ * Generated with linux-mdss-dsi-panel-driver-generator with a
+ * substantial amount of manual adjustments.
+ *
+ * SONY Downstrea
On 22.09.2022 17:11, Krzysztof Kozlowski wrote:
> On 22/09/2022 15:58, Konrad Dybcio wrote:
>> Add bindings for the display panel used on some Sony Xperia XZ2 and XZ2
>> Compact smartphones.
>>
>> Signed-off-by: Konrad Dybcio
>
> Thank you for your patch. Ther
ulain
> [DB: changed compat to follow the agreed scheme, rebased and updated commit
> msg]
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
Konrad
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
>
I PHY node name to generic one
> arm64: dts: qcom: sdm660: change DSI PHY node name to generic one
> arm64: dts: qcom: sdm845: change DSI PHY node name to generic one
> arm64: dts: qcom: sm8250: change DSI PHY node name to generic one
Reviewed-by: Konrad Dybcio
for the entire seri
On 24.09.2022 11:43, Dmitry Baryshkov wrote:
> Change HDMI PHY node names from custom 'hdmi-phy' to the generic 'phy'.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +-
>
On 24.09.2022 11:43, Dmitry Baryshkov wrote:
> Change HDMI PHY node name from custom 'hdmi-phy' to the generic 'phy'.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
> 1 fi
ulain
> [DB: rebased and updated commit msg]
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
(sorry I didn't notice earlier that there was a v2)
Konrad
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
Add bindings for the display panel used on some Sony Xperia XZ2 and XZ2
Compact smartphones.
Signed-off-by: Konrad Dybcio
---
Changes since v2:
- preset -> panel-reset
- treset -> touch-reset
.../display/panel/sony,td4353-jdi.yaml| 82 +++
1 file changed, 82 inse
, however
there could possibly be some room for expansion, as the display panels
used on Sony devices have historically been capable of >2x refresh rate
overclocking.
Signed-off-by: Konrad Dybcio
---
Changes since v2:
- "GPL v2" -> "GPL"
- add missing S-o-b (how e
9080324d6ca ("drm/msm/dsi: add support for dsc data")
> Signed-off-by: Marijn Suijten
> ---
Reviewed-by: Konrad Dybcio
Konrad
> drivers/gpu/drm/msm/dsi/dsi_host.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/d
On 1.10.2022 21:08, Marijn Suijten wrote:
> slice_per_intf is already computed for intf_width, which holds the same
> value as hdisplay.
>
> Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration")
> Signed-off-by: Marijn Suijten
> ---
Reviewe
80324d6ca ("drm/msm/dsi: add support for dsc data")
> Signed-off-by: Marijn Suijten
> ---
Reviewed-by: Konrad Dybcio
Konrad
> drivers/gpu/drm/msm/dsi/dsi_host.c | 34 +++---
> 1 file changed, 26 insertions(+), 8 deletions(-)
>
> diff --g
Add bindings for the display panel used on some Sony Xperia XZ2 and XZ2
Compact smartphones.
Signed-off-by: Konrad Dybcio
---
.../display/panel/sony,td4353-jdi.yaml| 84 +++
1 file changed, 84 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display
dentifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022 Konrad Dybcio
+ *
+ * Generated with linux-mdss-dsi-panel-driver-generator with a
+ * substantial amount of manual adjustments.
+ *
+ * SONY Downstream kernel calls this one:
+ * - "JDI ID3" for Akari
+ * - "JDI ID4" for Apo
On 12.07.2022 22:47, Krzysztof Kozlowski wrote:
> On 12/07/2022 22:02, Konrad Dybcio wrote:
>> Add bindings for the display panel used on some Sony Xperia XZ2 and XZ2
>> Compact smartphones.
>>
>> Signed-off-by: Konrad Dybcio
>> ---
>> .../display
)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/sony,synaptics-jdi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SONY Synaptics JDI panel
+
+maintainers:
+ - Konrad Dybcio
+
+description: |+
+ This panel seems to only be found in SONY Xperia
+ X, X
, detailing the devices they are used on.
Co-developed-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-sony-synaptics-jdi.c
Hi,
> Why are you Reviewing/Acking a patch that was applied on the 10th?
Forgive me if it turns out I'm blind, but I can't see the patch being in either
-next, backlight/for-next, or 5.13-rc3. Perhaps it was omitted after all?
Konrad
: SONY Synaptics JDI panel
+
+maintainers:
+ - Konrad Dybcio
+
+description: |+
+ This panel seems to only be found in SONY Xperia
+ X, X Performance, X Compact, XZ and XZs
+ smartphones and we have no straightforward way of
+ actually getting the correct model number,
+ as no schematics are re
, detailing the devices they are used on.
Co-developed-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-sony-synaptics-jdi.c
>> +
>> +maintainers:
>> + - Konrad Dybcio
>> +
>> +description: |+
> Do you need the formatting? If not, drop '|+'.
I'm not sure whether I do, so I guess dropping it is fine.
>> + This panel seems to only be found in SON
These two will be reused by at least A619_holi in the non-gmu
paths. De-staticize them to make it possible.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 4 ++--
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git
Port setting min_access_length, ubwc_mode and upper_bit from downstream.
Values were validated using downstream device trees for SM8[123]50 and
left default (as per downstream) elsewhere.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 26 ++
1
ging the GDSCs.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 51 -
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 198 +---
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 14 +-
drivers/gpu/
These SKUs don't support the feature. Disable it to make the GPU stop
crashing after almost each and every submission - the received data on
the GPU end was simply incomplete in garbled, resulting in almost nothing
being executed properly.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/dr
n and it won't cause any issues if it's unnecessary.
Also, add a memory barrier to ensure it's gone through.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a
Adreno 619 expects some tunables to be set differently. Make up for it.
Fixes: b7616b5c69e6 ("drm/msm/adreno: Add A619 support")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/g
dd support for this GPU on the kernel side, which comes down to
pretty simply adding A612 HWCG tables, altering a few values and
adding a special case for handling the reset line.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 95 --
drivers/g
A619_holi is a GMU-less variant of the already-supported A619 GPU.
It's present on at least SM4350 (holi) and SM6375 (blair). No mesa
changes are required. Add the required kernel-side support for it.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
One of the protected ranges was too small (compared to the data we
have downstream). Fix it.
Fixes: 408434036958 ("drm/msm/a6xx: update/fix CP_PROTECT initialization")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
1 file changed, 1 insertion(+),
Tell the OPP framework that we want to scale the "core" clock
and swap out the clk_set_rate to a dev_pm_opp_set_rate in
msm_devfreq_target() to enable usage of required-opps and by
extension proper voltage level/corner scaling.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adre
On GMU-equipped GPUs, the GMU requests appropriate bandwidth votes
for us. This is however not the case for the other GPUs. Add the
dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle
bus voting as part of power level setting.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm
The GPU can only be one at a time. Turn a series of ifs into if +
elseifs to save some CPU cycles.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers
these SoCs.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 452ba32699b2..89990bec897f 100644
--- a/drivers/gp
igned-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 89990bec897f..214d81537431 100644
--- a/drivers/gpu/drm/msm/a
On 27.01.2023 15:19, Dmitry Baryshkov wrote:
> On 26/01/2023 17:16, Konrad Dybcio wrote:
>> A619_holi is implemented on at least two SoCs: SM4350 (holi) and SM6375
>> (blair). This is what seems to be a first occurrence of this happening,
>> but it's easy to ov
On 27.01.2023 15:19, Dmitry Baryshkov wrote:
> On 26/01/2023 17:16, Konrad Dybcio wrote:
>> A619_holi is implemented on at least two SoCs: SM4350 (holi) and SM6375
>> (blair). This is what seems to be a first occurrence of this happening,
>> but it's easy to ov
Add support for gpu_busy on a3xx, which is required for devfreq
support.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index
On 1.02.2023 10:30, Akhil P Oommen wrote:
> On 1/26/2023 8:46 PM, Konrad Dybcio wrote:
>> Port setting min_access_length, ubwc_mode and upper_bit from downstream.
>> Values were validated using downstream device trees for SM8[123]50 and
>> left default (as per
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
> Add another power saving state used on SM8350.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> include/dt-bindings/power/qcom-rpmpd.h | 1 +
Wrong patch?
Konrad
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/power/qcom-rpmpd.h
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
> Add another power saving state used on SM8350.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> include/dt-bindings/power/qcom-rpmpd.h | 1 +
Wrong patch once more?
Konrad
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/power/qc
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
> Add device nodes required to enable GPU on the SM8350 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 179 +++
> 1 file changed, 179 insertions(+)
>
> diff --git a/arch/arm64/bo
On 6.02.2023 11:17, Neil Armstrong wrote:
> Add the Display Port controller subnode to the MDSS node.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 4 +-
> arch/arm64/boot/dts/qcom/sm8450.dtsi| 82
> +++--
> 2 files chang
subject: s/dst/dts here and in 5/5
On 6.02.2023 11:17, Neil Armstrong wrote:
> The QMP PHY is a USB3/DP combo phy, switch to the newly
> documented bindings and register the clocks to the GCC
> and DISPCC controllers.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8450.dts
On 6.02.2023 12:22, Dmitry Baryshkov wrote:
> On 06/02/2023 12:44, Konrad Dybcio wrote:
>>
>>
>> On 6.02.2023 01:27, Dmitry Baryshkov wrote:
>>> Add another power saving state used on SM8350.
>>>
>>> Signed-off-by: Dmitry Baryshkov
>>
On 26.01.2023 16:16, Konrad Dybcio wrote:
> Currently we only utilize the OPP table connected to the GPU for
> getting (available) frequencies. We do however need to scale the
> voltage rail(s) accordingly to ensure that we aren't trying to
> run the GPU at 1GHz with a VDD_
On 6.02.2023 15:57, Dmitry Baryshkov wrote:
> Add define for another power saving state used on SM8350 for the GPU.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> include/dt-bindings/power/qcom-rpmpd.h | 1 +
> 1 file changed, 1 insertion(+)
On 8.02.2023 04:40, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> Add Adreno SMMU, GPU clock controller, GMU and GPU nodes for the
> SC8280XP.
>
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 171 +
On 6.02.2023 15:57, Dmitry Baryshkov wrote:
> Start ordering DT nodes according to agreed order. Move apps SMMU, GIC,
> timer, apps RSC, cpufreq ADSP and cDSP nodes to the end to the proper
> position at the end of /soc/.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Moving adjacent nodes is prett
On 6.02.2023 15:57, Dmitry Baryshkov wrote:
> Enable the GPU on the SM8350-HDK device. The ZAP shader is required for
> the GPU to function properly.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 8
On 10.02.2023 11:34, Neil Armstrong wrote:
> The first QMP PHY is an USB3/DP combo phy, switch to the newly
> documented bindings and register the clocks to the GCC
> and DISPCC controllers.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 40
> ---
On 9.02.2023 14:38, Dmitry Baryshkov wrote:
> Continue ordering DT nodes by their address. Move RNG, UFS, system NoC
> and SLPI nodes to the proper position.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom
* sm8350_hdk boards reboot using this
> + * opp.
> + */
It's not a part of this patch, but an idea came into my
head.. could you check with socid that your HDK has an
8350v2.1?
As for the patch itself.. I *think* I don
,adreno-660.1", "qcom,adreno";
> +
The newlines between compatible and reg trigger my OCD..
But the patch looks good!
Reviewed-by: Konrad Dybcio
Konrad
P.S I can add binning after the big GMUless series lands..
And maybe I should also rework the binning code a bit to
be cleane
On 10.02.2023 12:12, Dmitry Baryshkov wrote:
> On 10/02/2023 13:09, Konrad Dybcio wrote:
>>
>>
>> On 9.02.2023 14:38, Dmitry Baryshkov wrote:
>>> Finish reordering DT nodes by their address. Move PDC, tsens, AOSS,
>>> SRAM, SPMI and TLMM nodes to the
The qcom, prefix was missed previously. Fix it.
Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible
strings for every current SoC")
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 +-
1 file changed, 1 inser
the number of
DSI hosts (1 or 2, at least as of today) and the set of registers.
The regulator setup is the same, because the DSI hardware is the same,
regardless of the SoC it was implemented in.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52
ot;)
Fixes: 65c391b31994 ("drm/msm/dsi: Add DSI support for SC7280")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 77 +++
1 file changed, 26 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/
In preparation for supporting multiple sets of possible base registers,
Zero-terminate the array that contains them to remove the need of
specifying num_dsi for each set.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 39 ++
drivers/gpu/drm/msm
)
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 12 +++-
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
index 03493cc6b772..4a47705234
this could have been done back when
7180 support was introduced.
Fixes: 6125bd327e16 ("drm/msm: add DSI support for sc7180")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/d
Now that the logic can handle multiple sets of registers, move
the QCM2290 to the common logic and mark it deprecated. This allows us
to remove a couple of structs, saving some memory.
Fixes: ee1f09678f14 ("drm/msm/dsi: Add support for qcm2290 dsi controller")
Signed-off-by: Kon
Now that the only user is handled by common code, remove the option to
specify custom handlers through match data.
This is effectively a revert of commit:
5ae15e76271 ("drm/msm/dsi: Allow to specify dsi config as pdata")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi.
Add a compatible for the DSI on SM6115.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree
Add the DSI host found on SM6350.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings
Add the DSI host found on SM6375.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings
Document SM6375 DPU and MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6375-dpu.yaml | 106 +
.../display/msm/qcom,sm6375-mdss.yaml | 216 ++
2 files changed, 322 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display
These blocks are of variable length on different SoCs. Set the
correct values where I was able to retrieve it from downstream
DTs and leave the old defaults (0x1c8 for sspp and 0x280 for
intf) otherwise.
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 242
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