Hi,
Am Mittwoch, 6. November 2024, 14:54:39 CET schrieb neil.armstr...@linaro.org:
> > +#define UPDATE(v, h, l)(((v) << (l)) & GENMASK((h),
> > (l)))
>
> I'm not super fan of this macro, overall I thinkg you should switch to
> regmap and make use of regmap_update_bits and dro
Hi Damon,
Am Mittwoch, 27. November 2024, 08:51:57 CET schrieb Damon Ding:
> Add the necessary DT changes to enable eDP0 on RK3588S EVB1 board.
>
> Signed-off-by: Damon Ding
> ---
> .../boot/dts/rockchip/rk3588s-evb1-v10.dts| 84 +++
> 1 file changed, 84 insertions(+)
>
> d
Hi Damon,
Am Mittwoch, 27. November 2024, 08:51:51 CET schrieb Damon Ding:
> Add basic support for RBR/HBR/HBR2 link rates, and the voltage swing and
> pre-emphasis configurations of each link rate have been verified according
> to the eDP 1.3 requirements.
>
> Signed-off-by: Damon Ding
> ---
[
Hi Damon,
Am Mittwoch, 27. November 2024, 12:00:10 CET schrieb Damon Ding:
> Hi Heiko:
>
> On 2024/11/27 17:29, Heiko Stübner wrote:
> > Hi Damon,
> >
> > Am Mittwoch, 27. November 2024, 08:51:51 CET schrieb Damon Ding:
> >> Add basic support for RBR/HBR/HB
Hi Damon,
Am Freitag, 29. November 2024, 03:43:57 CET schrieb Damon Ding:
> On 2024/11/27 19:04, Heiko Stübner wrote:
> > Am Mittwoch, 27. November 2024, 12:00:10 CET schrieb Damon Ding:
> >> On 2024/11/27 17:29, Heiko Stübner wrote:
> >>> Am Mittwoch, 27. Novem
Hi Piotr,
Am Mittwoch, 4. Dezember 2024, 16:45:21 CET schrieb Piotr Zalewski:
> I just noticed that after coming out of suspend gamma LUT is lost and must
> be rewritten by userspace.
>
> So I guess it will be needed to save LUT to a buffer and rewrite it after
> going out of suspend during modes
Hi Andy,
Am Samstag, 28. Dezember 2024, 13:21:43 CET schrieb Andy Yan:
> From: Andy Yan
>
>
> As the VOP[0] and HDMI[1] driver have already been submitted for review.
> This series send all display related device tree part together.
> [0]
> https://lore.kernel.org/linux-rockchip/20241219073931
Am Montag, 6. Januar 2025, 09:35:26 CET schrieb Andy Yan:
>
> Hi Heiko,
>
> At 2025-01-02 19:51:58, "Heiko Stübner" wrote:
> >Hi Andy,
> >
> >Am Mittwoch, 25. Dezember 2024, 11:37:29 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
>
Hi Andy,
Am Sonntag, 29. Dezember 2024, 07:48:36 CET schrieb Andy Yan:
>
> Hi Heiko,
>
> At 2024-12-29 02:36:36, "Heiko Stübner" wrote:
> >Hi Andy,
> >
> >Am Samstag, 28. Dezember 2024, 13:21:43 CET schrieb Andy Yan:
> >> From: Andy Yan
>
Hi Detlev,
Am Donnerstag, 6. Februar 2025, 18:17:51 MEZ schrieb Detlev Casanova:
> On Tuesday, 4 February 2025 05:14:37 EST Quentin Schulz wrote:
> > This is an address/bus-less device, so I believe it needs to be put
> > among other address/bus-less devices, which for Rockchip SoCs is at the
> >
Hi Andy,
Am Mittwoch, 12. Februar 2025, 10:34:57 MEZ schrieb Andy Yan:
> From: Andy Yan
>
> This help avoid "exceeds 100 columns" warning from checkpatch
>
> Signed-off-by: Andy Yan
I'm not much of a fan of "randomly" renaming individual constants
(especially when one is now named OFFS, while
Hi Damon,
Am Donnerstag, 23. Januar 2025, 11:07:41 MEZ schrieb Damon Ding:
> Move drm_of_find_panel_or_bridge() a little later and combine it with
> component_add() into a new function rockchip_dp_link_panel(). The function
> will serve as done_probing() callback of devm_of_dp_aux_populate_bus(),
Am Mittwoch, 11. Dezember 2024, 18:07:57 CET schrieb Maxime Ripard:
> On Wed, Dec 11, 2024 at 12:15:07PM +0200, Cristian Ciocaltea wrote:
> > The RK3588 specific implementation is currently quite limited in terms
> > of handling the full range of display modes supported by the connected
> > screens
Am Mittwoch, 11. Dezember 2024, 18:47:44 CET schrieb Maxime Ripard:
> On Wed, Dec 11, 2024 at 06:23:03PM +0100, Heiko Stübner wrote:
> > Am Mittwoch, 11. Dezember 2024, 18:07:57 CET schrieb Maxime Ripard:
> > > On Wed, Dec 11, 2024 at 12:15:07PM +0200, Cristian Ciocaltea wrote:
Hi Cristian,
Am Mittwoch, 11. Dezember 2024, 00:06:13 CET schrieb Cristian Ciocaltea:
> The patches provide the basic support to handle the second HDMI output
> port found on Rockchip RK3588 SoC.
>
> For now I enabled it on Radxa ROCK 5B only, the board I've been using to
> validate this.
>
> **
Hi Andy,
Am Mittwoch, 11. Dezember 2024, 08:07:21 CET schrieb Andy Yan:
> At 2024-12-10 19:57:44, "Heiko Stübner" wrote:
> >Am Montag, 9. Dezember 2024, 13:29:13 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> /sys/kernel/debug/dri/vop2/sum
Am Montag, 9. Dezember 2024, 17:11:03 CET schrieb Diederik de Haas:
> Hi,
>
> On Mon Dec 9, 2024 at 4:06 PM CET, Daniel Semkowicz wrote:
> > On 03.12.24 21:54, Heiko Stuebner wrote:
> > > This series adds a bridge and glue driver for the DSI2 controller found
> > > in the rk3588 soc from Rockchip,
, 10 Dec 2024 at 03:22, Andy Yan wrote:
> >> >> 在 2024-12-10 09:01:38，"Dmitry Baryshkov"
> >> >> 写道：
> >> >> >On Tue, Dec 10, 2024 at 08:50:51AM +0800, Andy Yan wrote:
> >> >> >> At 2024-12-10 07:12:26, "Heiko Stübne
Am Montag, 9. Dezember 2024, 13:33:29 CET schrieb Andy Yan:
> From: Andy Yan
>
> There is a version number hardcoded in the VOP VERSION_INFO
> register, and the version number increments sequentially based
> on the production order of the SOC.
>
> So using this version number to distinguish diff
2-10 09:01:38，"Dmitry Baryshkov" 写道：
> >> >On Tue, Dec 10, 2024 at 08:50:51AM +0800, Andy Yan wrote:
> >> >>
> >> >>
> >> >> Hi,
> >> >>
> >> >> At 2024-12-10 07:12:26, "Heiko Stübner"
Hi Andy,
Am Montag, 9. Dezember 2024, 13:29:13 CET schrieb Andy Yan:
> From: Andy Yan
>
> /sys/kernel/debug/dri/vop2/summary: dump vop display state
> /sys/kernel/debug/dri/vop2/regs: dump whole vop registers
> /sys/kernel/debug/dri/vop2/active_regs: only dump the registers of
> activated modul
Am Montag, 16. Dezember 2024, 09:57:41 CET schrieb Dmitry Baryshkov:
> On Mon, Dec 16, 2024 at 11:12:17AM +0800, Damon Ding wrote:
> > RK3588 integrates the analogix eDP 1.3 TX controller IP and the HDMI/eDP
> > TX Combo PHY based on a Samsung IP block, and there are also two
> > independent eDP di
Hi Damon,
Am Montag, 16. Dezember 2024, 04:12:25 CET schrieb Damon Ding:
> The related nodes are hdptxphy1_grf, hdptxphy1 and edp1. And the
> aliases edp0 and edp1 are added to separate two independent eDP
> devices.
>
> Signed-off-by: Damon Ding
> ---
> .../arm64/boot/dts/rockchip/rk3588-extra
Hi Damon,
Am Montag, 16. Dezember 2024, 04:12:18 CET schrieb Damon Ding:
> Add basic support for RBR/HBR/HBR2 link rates, and the voltage swing and
> pre-emphasis configurations of each link rate have been verified according
> to the eDP 1.3 requirements.
>
> Signed-off-by: Damon Ding
>
> ---
>
Hi Daemon,
Am Mittwoch, 27. November 2024, 08:51:47 CET schrieb Damon Ding:
> These patchs have been tested with a 1536x2048p60 eDP panel on
> RK3588S EVB1 board, and HDMI 1080P/4K display also has been verified
> on RK3588 EVB1 board.
>
> Patch 1~3 are the RK3588 eDP support of Rockchip analogix
Am Donnerstag, 9. Januar 2025, 15:57:13 CET schrieb Thomas Zimmermann:
> Call drm_mode_size_dumb() to compute dumb-buffer scanline pitch and
> buffer size. Align the pitch to a multiple of 64.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Sandy Huang
> Cc: "Heiko Stübner&
Hi Chris,
Am Montag, 30. Dezember 2024, 03:20:55 CET schrieb Chris Hofstaedtler:
> On Tue, Dec 10, 2024 at 12:10:19AM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > Add a Synopsys Designware MIPI DSI host DRM bridge driver for their
> > DSI2 host controller, based on the Rockchip
Hi Andy,
Am Mittwoch, 25. Dezember 2024, 11:37:29 CET schrieb Andy Yan:
> From: Andy Yan
>
> There are some control bits for IO and interrupts status scattered
> across different GRF on differt SOC.
> Add platform callback for this IO setting and interrupts status
> handling.
>
> Signed-off-by:
Hi Andy,
Am Dienstag, 31. Dezember 2024, 10:07:45 CET schrieb Andy Yan:
> From: Andy Yan
>
> The VOP interface mux, overlay, background delay cycle configuration
> of different SOC are much different. Add platform specific callback
> ops to let the core driver look cleaner and more refined.
>
>
Am Mittwoch, 25. Dezember 2024, 11:37:31 CET schrieb Andy Yan:
> From: Andy Yan
>
> The HDMI on RK3576 shares the same IP block (PHY and Controller)
> with rk3588.
> However, there are some control bits scattered in different GRF.
>
> Signed-off-by: Andy Yan
> Signed-off-by: Detlev Casanova
>
Am Mittwoch, 12. Februar 2025, 10:34:59 MEZ schrieb Andy Yan:
> From: Andy Yan
>
> Now these two function share the same logic, the can
> be merged as one.
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 42 +---
>
Hi Andy,
Am Freitag, 14. März 2025, 08:57:47 Mitteleuropäische Sommerzeit schrieb Andy
Yan:
> From: Andy Yan
>
> It is not recommended for drivers to include UAPI header
> directly.
>
> Signed-off-by: Andy Yan
Reviewed-by: Heiko Stuebner
But looking at
scripts/get_maintainer.pl -
Hi Dan,
Am Mittwoch, 9. April 2025, 12:59:39 Mitteleuropäische Sommerzeit schrieb Dan
Carpenter:
> Commit e09be2a6ab1a ("HACK: drm/panel: ltk050h3146w: read panel-id")
that commit was accientially merged into my for-next branch but never
applied to any actual kernel branch (and is already gone a
Hi Alex,
Am Dienstag, 22. April 2025, 09:04:39 Mitteleuropäische Sommerzeit schrieb Andy
Yan:
> From: Andy Yan
>
> When preparing to convert the current inno hdmi driver into a
> bridge driver, I found that there are several issues currently
> existing with it:
>
> 1. When the system starts up
Am Dienstag, 22. April 2025, 09:04:39 Mitteleuropäische Sommerzeit schrieb Andy
Yan:
> From: Andy Yan
>
> When preparing to convert the current inno hdmi driver into a
> bridge driver, I found that there are several issues currently
> existing with it:
>
> 1. When the system starts up, the firs
Am Montag, 28. April 2025, 12:23:07 Mitteleuropäische Sommerzeit schrieb Andy
Yan:
> From: Andy Yan
>
> Convert it to drm bridge driver, it will be convenient for us to
> migrate the connector part to the display driver later.
>
> Note: I don't have the hardware to test this driver, so for now
Am Donnerstag, 10. April 2025, 14:36:45 Mitteleuropäische Sommerzeit schrieb
Arnd Bergmann:
> On Wed, Apr 9, 2025, at 09:07, Arnd Bergmann wrote:
> > On Tue, Apr 8, 2025, at 19:51, Arnd Bergmann wrote:
> >> From: Arnd Bergmann
> >>
> >> clang-16 and earlier complain about what it thinks might be
Am Montag, 17. Februar 2025, 03:44:37 MEZ schrieb Jianfeng Liu:
> Hi Cristian,
>
> On Sat, 15 Feb 2025 02:55:39 +0200, Cristian Ciocaltea wrote:
> >The HDMI1 PHY PLL clock source cannot be added directly to vop node in
> >rk3588-base.dtsi, along with the HDMI0 related one, because HDMI1 is an
> >o
Am Dienstag, 18. Februar 2025, 10:52:16 MEZ schrieb Jianfeng Liu:
> Hi Cristian,
>
> No matter one or two hdmi ports the rk3588 boards have, most of
> devicetrees in mainline kernel only have hdmi0 supported. After applying
> this patch their hdmi0 support is broken.
>
> So I recommend moving the
Am Dienstag, 18. Februar 2025, 15:13:07 MEZ schrieb Sebastian Reichel:
> Hi,
>
> On Tue, Feb 18, 2025 at 08:17:46PM +0800, Jianfeng Liu wrote:
> > On Tue, 18 Feb 2025 11:00:57 +0100, Heiko Stübnerwrote:
> > >So I guess step1, check what error is actually returned.
> >
> > I have checked that the
Hi Andy,
Am Dienstag, 18. Februar 2025, 12:27:34 MEZ schrieb Andy Yan:
> From: Andy Yan
>
> In the upcoming VOP of rk3576, a Window cannot attach to all Video Ports,
> so make sure all VP find it's suitable primary plane, then register the
> remain windows as overlay plane will make code easier.
Hi Andy,
Am Dienstag, 18. Februar 2025, 12:28:58 MEZ schrieb Andy Yan:
> From: Andy Yan
>
> VOP2 on rk3576:
> Three video ports:
> VP0 Max 4096x2160
> VP1 Max 2560x1600
> VP2 Max 1920x1080
>
> 2 4K Cluster windows with AFBC/RFBC, line RGB and YUV
> 4 Esmart windows with line RGB/YUV support:
>
Am Dienstag, 4. März 2025, 12:46:59 MEZ schrieb Quentin Schulz:
> > @@ -465,14 +464,14 @@ static int rk3288_lvds_probe(struct platform_device
> > *pdev,
> >
> > lvds->pins->p = devm_pinctrl_get(lvds->dev);
> > if (IS_ERR(lvds->pins->p)) {
> > - DRM_DEV_ERROR(lvds->dev, "no pin
Am Freitag, 28. Februar 2025, 18:42:32 MEZ schrieb Quentin Schulz:
> Hi Heiko,
>
> On 2/28/25 5:57 PM, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > Commit 52d11c863ac9 ("drm/rockchip: lvds: do not print scary message when
> > probing defer") already started hiding scary messages that a
Am Samstag, 1. März 2025, 10:11:54 MEZ schrieb Piotr Oniszczuk:
>
> > Wiadomość napisana przez Detlev Casanova w
> > dniu 25 lut 2025, o godz. 15:58:
> >
> > From what I see, the error is not present anymore on linux 6.14-rc4. I
> > tried
> > reverting your patch "ASoC: simple-card-utils.c: a
Am Dienstag, 4. März 2025, 21:30:22 MEZ schrieb Dragan Simic:
> Hello Heiko,
>
> On 2025-03-04 13:44, Heiko Stuebner wrote:
> > diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c
> > b/drivers/gpu/drm/rockchip/rockchip_lvds.c
> > index 385cf6881504..ecfae8d5da89 100644
> > --- a/drivers/gpu/drm
Hi Greg,
Am Freitag, 21. Februar 2025, 07:14:07 MEZ schrieb Greg KH:
> On Fri, Feb 21, 2025 at 12:41:40AM +0100, Heiko Stuebner wrote:
> > The component helpers already expose the bound status in debugfs, but at
> > times it might be necessary to also check that state in the kernel and
> > act dif
Am Freitag, 9. Mai 2025, 09:34:47 Mitteleuropäische Sommerzeit schrieb Chaoyi
Chen:
> Hi Krzysztof,
>
> On 2025/5/9 15:11, Krzysztof Kozlowski wrote:
> > On 09/05/2025 09:02, Chaoyi Chen wrote:
> >> +
> >> + clock-names:
> >> +items:
> >> + - const: core-clk
> >> + - const: pclk
>
Am Donnerstag, 15. Mai 2025, 17:54:20 Mitteleuropäische Sommerzeit schrieb
Krzysztof Kozlowski:
> On 15/05/2025 14:35, long.yunj...@zte.com.cn wrote:
> > From: Yumeng Fang
> >
> > In the probe path, dev_err() can be replaced with dev_err_probe()
>
> That's not probe path. I am not sure if you r
Am Sonntag, 2. März 2025, 09:30:43 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> With the commit f37952339cc2 ("drm/bridge: analogix_dp: handle clock via
> runtime PM"), the PM operations can help enable/disable the clock. The
> err_disable_clk label and clk_disable_unprepare() operations are
[resending to update to Dmitry's new address]
Am Sonntag, 2. März 2025, 09:30:43 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> With the commit f37952339cc2 ("drm/bridge: analogix_dp: handle clock via
> runtime PM"), the PM operations can help enable/disable the clock. The
> err_disable_clk l
Hi,
Am Mittwoch, 28. Mai 2025, 09:17:13 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> On 2025/5/28 11:42, Stephen Rothwell wrote:
> > Hi all,
> >
> > After merging the drm-misc tree, today's linux-next build (arm
> > multi_v7_defconfig) failed like this:
> >
> > drivers/gpu/drm/bridge/anal
Hi,
Am Dienstag, 13. Mai 2025, 03:19:04 Mitteleuropäische Sommerzeit schrieb Chaoyi
Chen:
> From: Chaoyi Chen
> + ports:
> +$ref: /schemas/graph.yaml#/properties/ports
> +
> +properties:
> + port@0:
> +$ref: /schemas/graph.yaml#/properties/port
> +description: Input
Am Mittwoch, 4. Juni 2025, 09:57:14 Mitteleuropäische Sommerzeit schrieb Tomeu
Vizoso:
> Add the bindings for the Neural Processing Unit IP from Rockchip.
>
> v2:
> - Adapt to new node structure (one node per core, each with its own
> IOMMU)
> - Several misc. fixes from Sebastian Reichel
>
> v
Am Mittwoch, 4. Juni 2025, 09:57:16 Mitteleuropäische Sommerzeit schrieb Tomeu
Vizoso:
> Enable the nodes added in a previous commit to the rk3588s device tree.
shouldn't the quartzpro64 also need a vdd_npu regulator, like the rock-5b
support at the end of the series? If not, please mention that
Am Freitag, 6. Juni 2025, 11:20:32 Mitteleuropäische Sommerzeit schrieb Nicolas
Frattaroli:
> Hi Tomeu,
>
> On Friday, 6 June 2025 08:28:30 Central European Summer Time Tomeu Vizoso
> wrote:
> > From: Nicolas Frattaroli
> >
> > The NPU on the ROCK5B uses the same regulator for both the sram-su
Am Donnerstag, 5. Juni 2025, 13:54:50 Mitteleuropäische Sommerzeit schrieb
Diederik de Haas:
> On Tue Jun 3, 2025 at 9:39 PM CEST, Chris Morgan wrote:
> > From: Chris Morgan
> >
> > Add support for the Huiling hl055fhav028c panel as used on the
> > Gameforce Ace handheld gaming console. This pane
Am Sonntag, 13. Juli 2025, 10:38:58 Mitteleuropäische Sommerzeit schrieb Tomeu
Vizoso:
> See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).
>
> The IP is divided in three cores, programmed independently. The first
> core though is special, being able to delegate work to the other cores.
>
> The
Hi Cristian,
Am Freitag, 4. Juli 2025, 16:23:22 Mitteleuropäische Sommerzeit schrieb
Cristian Ciocaltea:
> In preparation to support the CEC interface of the DesignWare HDMI QP IP
> block, extend the platform data to provide the required IRQ number.
>
> Signed-off-by: Cristian Ciocaltea
> ---
>
Am Dienstag, 8. Juli 2025, 15:23:32 Mitteleuropäische Sommerzeit schrieb Rob
Herring (Arm):
>
> On Mon, 07 Jul 2025 18:48:53 +0200, Heiko Stuebner wrote:
> > This enables all the necesary bits and bindings to get display output
> > on the dm-m10r800-v3s addon module for the Firefly roc-rk3576-pc
Hi Damon,
Am Mittwoch, 9. Juli 2025, 09:01:31 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> Use &analogix_dp_plat_data.bridge instead of &exynos_dp_device.ptn_bridge
> directly.
>
> Signed-off-by: Damon Ding
> @@ -155,7 +154,7 @@ static int exynos_dp_bind(struct device *dev, struct
> dev
Hi Damon,
Am Mittwoch, 9. Juli 2025, 09:01:32 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> The &analogix_dp_plat_data.skip_connector related check can be replaced
> by &analogix_dp_plat_data.bridge.
>
> Signed-off-by: Damon Ding
> ---
> drivers/gpu/drm/exynos/exynos_dp.c | 1 -
> 1 file
Am Mittwoch, 9. Juli 2025, 09:01:39 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> Apply drm_bridge_connector helper for Analogix DP driver.
>
> The following changes have been made:
> - Remove &analogix_dp_device.connector and change
> &analogix_dp_device.bridge from a pointer to an instan
Hi Damon,
Am Mittwoch, 9. Juli 2025, 09:01:34 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> Since the panel/bridge should logically be positioned behind the
> Analogix bridge in the display pipeline, it makes sense to handle
> the panel/bridge parsing on the Analogix side.
>
> Signed-off-by
Am Freitag, 15. November 2024, 17:20:40 Mitteleuropäische Sommerzeit schrieb
Detlev Casanova:
> Add the documentation for VOP2 video ports reset clocks.
> One reset can be set per video port.
>
> Reviewed-by: Conor Dooley
> Signed-off-by: Detlev Casanova
> ---
> .../display/rockchip/rockchip-v
Am Sonntag, 6. Juli 2025, 12:37:40 Mitteleuropäische Sommerzeit schrieb
Diederik de Haas:
> Hi Piotr,
>
> On Sun Jul 6, 2025 at 12:20 PM CEST, Piotr Zalewski wrote:
> >> With a new version of a patch, you're supposed to add the tags you
> >> received for previous versions, like my Tested-by tag [
Am Freitag, 6. Juni 2025, 08:28:23 Mitteleuropäische Sommerzeit schrieb Tomeu
Vizoso:
> This uses the SHMEM DRM helpers and we map right away to the CPU and NPU
> sides, as all buffers are expected to be accessed from both.
>
> v2:
> - Sync the IOMMUs for the other cores when mapping and unmappin
Am Mittwoch, 16. Juli 2025, 03:56:27 Mitteleuropäische Sommerzeit schrieb
Chaoyi Chen:
> Hi Dmitry,
>
> On 2025/7/15 20:05, Dmitry Baryshkov wrote:
> > On Tue, Jul 15, 2025 at 07:24:54PM +0800, Chaoyi Chen wrote:
> >> From: Chaoyi Chen
> >>
> >> This patch add support for Type-C Port Controller
Hi Jeff,
Am Montag, 21. Juli 2025, 16:55:01 Mitteleuropäische Sommerzeit schrieb Jeff
Hugo:
> On 7/21/2025 3:17 AM, Tomeu Vizoso wrote:
> > This series adds a new driver for the NPU that Rockchip includes in its
> > newer SoCs, developed by them on the NVDLA base.
> >
> > In its current form, it
Am Donnerstag, 24. Juli 2025, 10:02:50 Mitteleuropäische Sommerzeit schrieb
Damon Ding:
> PATCH 1 is a small format optimization for struct analogid_dp_device.
> PATCH 2 is to perform mode setting in &drm_bridge_funcs.atomic_enable.
> PATCH 3 is to apply a better API for the encoder initialization
Hi Damon,
Am Donnerstag, 24. Juli 2025, 10:03:04 Mitteleuropäische Sommerzeit schrieb
Damon Ding:
> In order to unify the handling of the panel and bridge, apply
> panel_bridge helpers for Analogix DP driver. With this patch, the
> bridge support will also become available.
>
> The following cha
Hi Damon,
Am Donnerstag, 24. Juli 2025, 10:02:58 Mitteleuropäische Sommerzeit schrieb
Damon Ding:
> Apply drm_bridge_connector helper for Analogix DP driver.
>
> The following changes have been made:
> - Apply drm_bridge_connector helper to get rid of &drm_connector_funcs
> and &drm_connector_
Hi Damon,
Am Freitag, 25. Juli 2025, 04:15:06 Mitteleuropäische Sommerzeit schrieb Damon
Ding:
> On 2025/7/24 21:10, Heiko Stübner wrote:
> > Am Donnerstag, 24. Juli 2025, 10:02:50 Mitteleuropäische Sommerzeit schrieb
> > Damon Ding:
> >> PATCH 1 is a small format
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