Am Freitag, 5. Januar 2024, 17:47:21 CET schrieb Alex Bee:
> Hi Heiko,
>
>
> Am 04.01.24 um 09:14 schrieb Heiko Stuebner:
> > On Fri, 22 Dec 2023 18:41:51 +0100, Alex Bee wrote:
> >> This is version 4 of my series that aims to add support for the display
> >> controller (VOP) and the HDMI control
Am Freitag, 5. Januar 2024, 18:33:34 CET schrieb Alex Bee:
>
> Am 05.01.24 um 18:02 schrieb Heiko Stübner:
> > Am Freitag, 5. Januar 2024, 17:47:21 CET schrieb Alex Bee:
> >> Hi Heiko,
> >>
> >>
> >> Am 04.01.24 um 09:14 schrieb Heiko Stuebner:
&g
Am Montag, 15. Januar 2024, 09:45:10 CET schrieb neil.armstr...@linaro.org:
> Hi,
>
> On 12/01/2024 19:07, Farouk Bouabid wrote:
> > dw-mipi-dsi based drivers such as dw-mipi-dsi-rockchip or dw_mipi_dsi-stm
> > depend on dw_mipi_dsi_probe() to initialize the dw_mipi_dsi driver
> > structure (dmd p
Hi Maxime,
Am Mittwoch, 17. Januar 2024, 10:46:57 CET schrieb Maxime Ripard:
> On Mon, 15 Jan 2024 10:24:35 +0100, Alex Bee wrote:
> > Commit d3e040f450ec ("drm/rockchip: inno_hdmi: Get rid of mode_set")
> > started using drm_atomic_get_new_connector_state and
> > drm_atomic_get_new_crtc_state whi
Am Mittwoch, 17. Januar 2024, 14:47:48 CET schrieb Maxime Ripard:
> On Wed, Jan 17, 2024 at 10:52:04AM +0100, Heiko Stübner wrote:
> > Hi Maxime,
> >
> > Am Mittwoch, 17. Januar 2024, 10:46:57 CET schrieb Maxime Ripard:
> > > On Mon, 15 Jan 2024 10:24:35 +0100,
Am Montag, 22. Januar 2024, 17:30:31 CET schrieb Boris Brezillon:
> Hello,
>
> This is the 4th version of the kernel driver for Mali CSF-based GPUs.
>
> A branch based on drm-misc-next and containing all the dependencies
> that are not yet available in drm-misc-next here[1], and another [2]
> con
Am Montag, 22. Januar 2024, 17:30:42 CET schrieb Boris Brezillon:
> This is the last piece missing to expose the driver to the outside
> world.
>
> This is basically a wrapper between the ioctls and the other logical
> blocks.
>
> v4:
> - Add an ioctl to let the UMD query the VM state
> - Fix ker
Hi Andy,
Am Donnerstag, 7. Dezember 2023, 08:59:06 CET schrieb Andy Yan:
> From: Andy Yan
>
> This patch sets aims at enable the VOP2 support on rk3588.
>
> Main feature of VOP2 on rk3588:
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4
Hi Andy,
Am Donnerstag, 7. Dezember 2023, 09:02:47 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add vop dt node for rk3588.
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 96 +++
> 1 file changed, 96 insertions(+
Am Donnerstag, 7. Dezember 2023, 09:02:35 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add a Rockchip RK3588 compatible
>
> Signed-off-by: Andy Yan
Reviewed-by: Heiko Stuebner
In the next iteration, please split this out into a separate patch and send
it to the iommu+dt maintainers.
Supportin
Hi Andy,
Am Samstag, 9. Dezember 2023, 02:26:25 CET schrieb Andy Yan:
> Hi Heiko:
>
> On 12/9/23 00:29, Heiko Stübner wrote:
> > Am Donnerstag, 7. Dezember 2023, 09:02:35 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> Add a Rockchip RK3588 co
Am Freitag, 22. Dezember 2023, 12:05:45 CET schrieb Manuel Traut:
> devicetree checks show some warnings:
>
> video-codec@fdea0400: 'interrupt-names' is a required property
> from schema $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
>
> hdmi@fe0a: Unevaluated properties are not
Am Freitag, 22. Dezember 2023, 18:41:52 CET schrieb Alex Bee:
> The integration for this SoC is different from the currently existing: It
> needs it's PHY's reference clock rate to calculate the DDC bus frequency
> correctly. The controller is also part of a powerdomain, so this gets added
> as an
Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
> Samsung IP block.
>
> Add just the basic support for now, i.e. RGB output u
Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
> Samsung IP block.
>
> Add just the basic support for now, i.e. RGB output u
Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> > The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> > Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo
Am Dienstag, 10. September 2024, 17:41:42 CEST schrieb Cristian Ciocaltea:
> On 9/10/24 6:21 PM, Heiko Stübner wrote:
> > Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
> >> Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> >
Am Freitag, 6. September 2024, 03:17:42 CEST schrieb Cristian Ciocaltea:
> The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
> Samsung IP block.
>
> Add just the basic support for now, i.e. RGB output u
Am Dienstag, 10. September 2024, 18:39:54 CEST schrieb Heiko Stübner:
> Am Dienstag, 10. September 2024, 17:41:42 CEST schrieb Cristian Ciocaltea:
> > On 9/10/24 6:21 PM, Heiko Stübner wrote:
> > > Am Dienstag, 10. September 2024, 17:07:57 CEST schrieb Heiko Stübner:
&g
Am Sonntag, 2. Juni 2024, 17:57:12 CEST schrieb Andy Shevchenko:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
>
Am Samstag, 1. Juni 2024, 15:12:35 CEST schrieb Cristian Ciocaltea:
> The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller supports
> the following features, among others:
>
> * Fixed Rate Link (FRL)
> * 4K@120Hz and 8K@60Hz video modes
> * Variable Refresh Rate (VRR) including Quick Med
Am Mittwoch, 5. Juni 2024, 21:58:23 CEST schrieb Luis de Arquer:
> On 6/5/24 16:48, Heiko Stübner wrote:
> > Without this change, connecting to a DVI display does not work, and
> > reading the EDID ends in the "i2c read error" below.
>
> I had a lot of problems init
Am Donnerstag, 6. Juni 2024, 11:53:23 CEST schrieb Cristian Ciocaltea:
> On 6/5/24 5:48 PM, Heiko Stübner wrote:
> > Am Samstag, 1. Juni 2024, 15:12:35 CEST schrieb Cristian Ciocaltea:
> >> The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller supports
> >> th
Am Freitag, 3. Mai 2024, 17:11:17 CEST schrieb Lucas Stach:
> Hook up the runtime PM suspend/resume paths to make the rockchip
> glue behave more like the exynos one. The same suspend/resume
> functions are used for system sleep via the runtime PM force
> suspend/resume.
>
> Signed-off-by: Lucas S
Am Freitag, 3. Mai 2024, 17:11:15 CEST schrieb Lucas Stach:
> Currently the AUX channel support in the Analogix DP driver is severely
> limited as the AUX block of the bridge is only initialized when the video
> link is to be enabled. This is okay for the purposes of link training,
> but does not a
Am Freitag, 17. Februar 2012, 00:25:51 schrieb Laurent Pinchart:
> Hello everybody,
>
> First of all, I would like to thank all the attendees for their
> participation in the mini-summit that helped make the meeting a success.
>
> Here are my consolidated notes that cover both the Linaro Connect
Hi,
Am Donnerstag, 15. September 2011, 14:07:05 schrieb Tomi Valkeinen:
> Now, I'm quite sure the above framework could work quite well with any
> OMAP like hardware, with unified memory (i.e. the video buffers are in
> SDRAM) and 3D chips and similar components are separate. But what I'm
> not su
Hi,
Am Donnerstag, 15. September 2011, 14:07:05 schrieb Tomi Valkeinen:
> Now, I'm quite sure the above framework could work quite well with any
> OMAP like hardware, with unified memory (i.e. the video buffers are in
> SDRAM) and 3D chips and similar components are separate. But what I'm
> not su
Am Freitag, 17. Februar 2012, 00:25:51 schrieb Laurent Pinchart:
> Hello everybody,
>
> First of all, I would like to thank all the attendees for their
> participation in the mini-summit that helped make the meeting a success.
>
> Here are my consolidated notes that cover both the Linaro Connect
Am Montag, 4. August 2014, 12:55:59 schrieb mark yao:
> Signed-off-by: mark yao
> ---
> .../devicetree/bindings/video/rockchip-panel.txt | 34
> 1 file changed, 34 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/video/rockchip-panel.txt
> b/Documentation/
Hi Mark,
Am Dienstag, 2. Dezember 2014, 17:13:20 schrieb Mark Yao:
> This a series of patches is a DRM Driver for Rockchip Socs, add support
> for vop devices. Future patches will add additional encoders/connectors,
> such as eDP, HDMI.
>
> The basic "crtc" for rockchip is a "VOP" - Video Output
Hi Dave,
Am Freitag, 5. Dezember 2014, 17:26:04 schrieb Dave Airlie:
> On 5 December 2014 at 05:29, Daniel Kurtz wrote:
> > I thought the recommended solution for this was to fix OMAP3 to not
> > select ARM_DMA_USE_IOMMU and OMAP_IOMMU, not to drop the 'depends on'
> > in drm/rockchip?
>
> Lets
Hi Daniel,
Am Mittwoch, 10. Dezember 2014, 20:36:17 schrieb Daniel Kurtz:
> This driver adds HDMI to rockchip/drm. The fact that rockchip's hdmi
> uses dw_hdmi is an implementation detail. I do not think that the names
> used for rk3288-hdmi should include "dw" in them.
>
> See inline for what
Am Montag, 16. November 2015, 12:50:21 schrieb Daniel Stone:
> Passing -1 as the pipe for vblank events now triggers a WARN_ON, but had
> previously made multi-screen unusable anyway. Pass the correct pipe to
> the event-send function, and use the new API to make this a bit easier
> for us.
>
> Fi
Am Montag, 16. November 2015, 12:50:22 schrieb Daniel Stone:
> Rockchip previously treated a pageflip to the same framebuffer as a
> no-op, discarding the event if one was requested. This breaks Weston,
> which, when idle, sends a no-op vblank event to discover vblank
> timings if the vblank query
Hi Liviu,
Am Montag, 16. November 2015, 14:44:51 schrieb Liviu Dudau:
> When I have introduced the drm_of_component_probe() function I have managed
> to break rockchip's DRM driver as the compare_of() function had to match
> both local crtc ports and remote encoder ones. As suggested by Russell
>
Am Montag, 16. November 2015, 16:52:06 schrieb Liviu Dudau:
> On Mon, Nov 16, 2015 at 04:30:16PM +, Russell King - ARM Linux wrote:
> > I've tweaked your patch to make the above (buggy) change a little clearer.
> >
> > On Mon, Nov 16, 2015 at 02:44:53PM +, Liviu Dudau wrote:
> > > - for (i
Hi Chris,
Am Freitag, 20. November 2015, 16:15:27 schrieb Chris Zhong:
> Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
>
> Signed-off-by: Chris Zhong
>
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> add the mipi clk id in a single patch
>
> include/
Am Freitag, 20. November 2015, 14:22:03 schrieb Liviu Dudau:
> Hello,
>
> This is v2 of the patchset trying to make drm_of_component_probe() cope with
> finding both local crtc ports and remote encoder ones. Heiko Stübner was
> nice enough to test an earlier version that was patched following Rus
Hi Yakir,
Am Mittwoch, 28. Oktober 2015, 16:21:59 schrieb Yakir Yang:
> Split the dp core driver from exynos directory to bridge directory,
> and rename the core driver to analogix_dp_*, rename the platform
> code to exynos_dp.
>
> Beside the new analogix_dp driver would export four hooks.
> "ana
Hi Yakir,
Am Mittwoch, 28. Oktober 2015, 16:27:45 schrieb Yakir Yang:
> Rockchip have three clocks for dp controller, we leave pclk_edp
> to analogix_dp driver control, and keep the sclk_edp_24m and
> sclk_edp in platform driver.
>
> Tested-by: Javier Martinez Canillas
> Signed-off-by: Yakir Yan
Hi Yakir,
Am Freitag, 27. November 2015, 09:20:44 schrieb Yakir Yang:
> Hi Heiko,
>
> Thanks you for feedback, I do see some conflicts in Exynos Make/Kconfig
> file [02/17] and dtsi file [07/17] when I try to apply this series on
> 4.4-rc1
> branch.
>
> Hmm... Due to I have update some patches t
Am Mittwoch, 28. Oktober 2015, 16:56:01 schrieb Yakir Yang:
> There are some IP limit on rk3288 that only support 4 physical lanes
> of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
>
> Tested-by: Javier Martinez Canillas
> Signed-off-by: Yakir Yang
> ---
[...]
> diff --git a/dri
Hi Mark,
Am Freitag, 26. Juni 2015, 09:27:18 schrieb Mark Yao:
> We want to display a buffer allocated by other driver, need import
> the buffer to gem.
>
> Signed-off-by: Mark Yao
This looks interesting ... do you want to follow up on it?
Heiko
> ---
> Changes in v2:
> Adviced by Russell Ki
Am Montag, 12. Oktober 2015, 20:32:47 schrieb Kishon Vijay Abraham I:
> Hi,
>
> On Saturday 10 October 2015 09:25 PM, Yakir Yang wrote:
> > This phy driver would control the Rockchip DisplayPort module
> > phy clock and phy power, it is relate to analogix_dp-rockchip
> > dp driver. If you want DP
Am Dienstag, 21. Juli 2015, 16:25:40 schrieb Mark Yao:
> Win2/3 support multiple area function, but we haven't found
> a suitable way to use it yet, so let's just use them as other windows
> with only area 0 enabled.
>
> Signed-off-by: Mark Yao
this could go as fix into 4.2 please.
With what is
Am Dienstag, 21. Juli 2015, 16:28:52 schrieb Mark Yao:
> Win_full support 1/8 to 8 scale down/up engine, support
> all format scale.
>
> Signed-off-by: Mark Yao
> ---
> Changes in v3:
> Adviced by Tomasz Figa
> - remove unused code and unnecessary scale path.
> - use static inline funcion instead
Am Dienstag, 21. Juli 2015, 16:20:04 schrieb Mark Yao:
> vop support yuv with NV12, NV16 and NV24, only 2 plane yuv.
>
> Signed-off-by: Mark Yao
> ---
> Changes in v3:
> Adviced by Tomasz Figa
> - separate dest calculate to another patch
> - fix src x1,x2 when do align, and remove unnecessary src
Am Dienstag, 21. Juli 2015, 16:20:01 schrieb Mark Yao:
> This series patches are used for yuv image overlay display.
>
> Rockchip vop support NV11, NV16, NV24 yuv format,
> and can scale the image scale 1/8 to 8.
I've tested this series on veyron-pinky on 4.2-rc3, as mentioned as response
to pat
Add a check for the presence of fb_helper to rockchip_drm_output_poll_changed()
to only call drm_fb_helper_hotplug_event if there is actually a fb_helper
available. Without this check I see NULL pointer dereferences when the
hdmi hotplug irq fires before the fb_helper got initialized.
Signed-off-b
Hi Thierry
Am Freitag, 5. Juni 2015, 13:02:01 schrieb Thierry Reding:
> On Mon, Mar 23, 2015 at 07:17:49PM +0100, Heiko Stuebner wrote:
> > Hi Philipp,
> >
> > Am Donnerstag, 12. März 2015, 21:45:19 schrieb Heiko Stuebner:
> > > At least the Rockchip variant of the dw_hdmi can have controllable
The Designware HDMI block has two supplies for 1.0 and 1.8V. Not all IP
implementations expose or want to use these, so they remain optional.
Signed-off-by: Heiko Stuebner
Acked-by: Philipp Zabel
---
changes since v3:
- split generic dt-bindings and rockchip implementation
- add Ack from Philipp
The Rockchip implementation of the IP exposes the supplies outside and
expects them to be supplied by a pmic. So implement regulator handling
for them.
Signed-off-by: Heiko Stuebner
Acked-by: Philipp Zabel
---
changes since v3:
- split generic dt-bindings and rockchip implementation
- add Ack fr
Add the recently added hdmi power supplies to evb and firefly boards.
Signed-off-by: Heiko Stuebner
---
changes since v3:
- add entries for popmetal board
arch/arm/boot/dts/rk3288-evb.dtsi | 2 ++
arch/arm/boot/dts/rk3288-firefly.dtsi | 2 ++
arch/arm/boot/dts/rk3288-popmetal.dts | 2 ++
3
Hi Thierry
Am Freitag, 5. Juni 2015, 14:23:14 schrieb Thierry Reding:
> On Fri, Jun 05, 2015 at 02:16:40PM +0200, Heiko Stübner wrote:
> > > If this is specific to the Rockchip implementation, shouldn't this go
> > > into Documentation/devicetree/bindings/video/dw_hdmi-rockchip.txt? It
> > > coul
Am Dienstag, 9. Juni 2015, 09:53:32 schrieb Thierry Reding:
> On Mon, Jun 08, 2015 at 05:34:21PM +0100, Russell King - ARM Linux wrote:
> > On Mon, Jun 08, 2015 at 05:44:53PM +0200, Thierry Reding wrote:
> > > On Mon, Jun 08, 2015 at 03:29:26PM +0100, Russell King - ARM Linux
wrote:
> > > > You're
Am Mittwoch, 10. Juni 2015, 00:36:18 schrieb Russell King - ARM Linux:
> On Wed, Jun 10, 2015 at 01:29:43AM +0200, Heiko Stübner wrote:
> > Allthough from the discussion and explanations I've now also got the
> > "don't
> > make it worse" feeling, so am somehow reluctant to add supplies that also
Hi Philipp,
Am Samstag, 6. Dezember 2014, 00:31:46 schrieb Andy Yan:
> > I am happy with the series so far. Pending Acks from the device tree
> > maintainers for the new binding documents, I'd like to apply either the
> > whole of it on top of
> >
> > git://git.pengutronix.de/git/pza/linux.g
From: Andy Yan
IMX6 and Rockchip RK3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly differences, such as phy pll configuration,
register width, 4K support, clk useage, and the crtc mux configuration
is also platform specific.
Am Donnerstag, 22. Januar 2015, 11:15:02 schrieb Mark Yao:
> Vop set wrong vsync/hsync polarity, it may cause some
> display problem. known problem is that caused HDMI hdcp
> authenticate failed, caused pixel offset with hdmi display.
> the polarity description at RK3288 TRM doc:
> dsp_vsync_pol
Am Donnerstag, 22. Januar 2015, 18:29:55 schrieb Mark Yao:
> drm dpms have many power modes, ON,OFF,SUSPEND,STANDBY, etc.
> but vop only have enable/disable mode, maybe case such bug:
> --> DRM_DPMS_ON: power on vop
> --> DRM_DPMS_SUSPEND: power off vop
> --> DRM_DPMS_OFF: already power off at S
Commits 8eb17f05bc18 ("drm/bridge: do not pass drm_bridge_funcs to
drm_bridge_init") and fbc4572e9c48 ("drm/bridge: make bridge registration
independent of drm flow") changed the bridge API without taking into account
the also newly introduced dw_hdmi bridge.
Therefore adapt the dw_hdmi bridge to
From: Daniel Kurtz
Register connectors with userspace after all components are bound.
Signed-off-by: Daniel Kurtz
Reviewed-by: Dominik Behr
drm_connector_get_name -> connector->name
This patch is necessary to make X11 see screens it seems.
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/
The function disables the dclk at the beginning, so don't simply return
when an error happens, but instead enable the clock again, so that
enable and disable calls are balanced.
ret_clk is introduced to hold the clk_enable result and not mangle the
original error code.
Signed-off-by: Heiko Stuebn
Am Samstag, 31. Januar 2015, 13:43:23 schrieb Daniel Kurtz:
> Hi Heiko,
>
> On Sat, Jan 31, 2015 at 3:28 AM, Heiko Stübner wrote:
> > The function disables the dclk at the beginning, so don't simply return
> > when an error happens, but instead enable the clock again, so that
> > enable and disa
Hi Mark,
Am Samstag, 31. Januar 2015, 16:41:38 schrieb Mark Yao:
> Vop standby will take effect end of current frame,
> if dsp_hold_valid_irq happen, it means vop standby complete.
>
> we must wait standby complete when we want to disable aclk,
> if not, memory bus maybe dead.
>
> Signed-off-by:
Hi Mark,
Am Mittwoch, 1. Juli 2015, 17:49:33 schrieb Mark Yao:
> hardware cursor windows only have some fixed size, and not support
> width virtual, when move hardware cursor windows outside of left,
> the display would be wrong, so this window can't for cursor now.
>
> And Tag hardware cursor wi
Hi Dave,
Am Freitag, 20. November 2015, 14:22:03 schrieb Liviu Dudau:
> This is v2 of the patchset trying to make drm_of_component_probe() cope with
> finding both local crtc ports and remote encoder ones. Heiko Stübner was
> nice enough to test an earlier version that was patched following Russe
Hi Yakir,
Am Montag, 7. Dezember 2015, 14:37:19 schrieb Yakir Yang:
>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some plat
Hi Chris,
Am Mittwoch, 16. Dezember 2015, 18:10:10 schrieb Chris Zhong:
> The rk3288 MIPI DSI is a Synopsys DesignWare MIPI DSI host controller
> IP. This series adds support for a Synopsys DesignWare MIPI DSI host
> controller DRM driver.
>
> The MIPI DSI feature is tested on rk3288 evb board, b
Hi Mark,
Am Donnerstag, 17. Dezember 2015, 11:01:07 schrieb Mark Yao:
> The series of patches coverting drm rockchip to atomic API, do some
> cleanup and some fixes on atomic side.
>
> TODO: fence is not support on current version.
>
> Tested on rk3288 popmetal board.
In general this works nice
Hi Mark,
Am Donnerstag, 17. Dezember 2015, 18:32:31 schrieb Mark yao:
> On 2015å¹´12æ17æ¥ 18:00, Heiko Stübner wrote:
> > Am Donnerstag, 17. Dezember 2015, 11:01:07 schrieb Mark Yao:
> >> The series of patches coverting drm rockchip to atomic API, do some
> >> cleanup and some fixes on atomic
Hi Yakir,
Am Mittwoch, 16. Dezember 2015, 11:20:18 schrieb Yakir Yang:
>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some p
Hi,
Am Samstag, 31. Januar 2015, 17:32:53 schrieb Heiko Stuebner:
> This series adds support for the lvds encoder present on rk3288 soc and
> allows external connectors to use the generic rgb pins.
>
> On the older socs (rk3188, rk3066, etc) these pins where accessible by
> anyone, while on the r
Hi Laurent,
thanks for the comments
Am Donnerstag, 26. Februar 2015, 20:33:33 schrieb Laurent Pinchart:
> On Saturday 31 January 2015 17:32:56 Heiko Stuebner wrote:
> > There exist simple vga encoders without any type of management interface
> > and just maybe a simple gpio for turning it on or o
Hi Caesar,
Am Mittwoch, 8. April 2015, 16:52:08 schrieb Caesar Wang:
> To fix pop noise when shutdown,the pop noise during shutdown
> is the pmic cutoff power of codec without any notice.
>
> Signed-off-by: jay.xu
> Signed-off-by: zhengxing
> Signed-off-by: Caesar Wang
>
> Serien-cc: linux-ke
Mark Yao looks after the Rockchip drm drivers and should thus also get
patches touching these.
Signed-off-by: Heiko Stuebner
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7687fc6..7e4d386 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -
platform_get_irq() can return negative error values and we already test for
these. Therefore the variable holding this value should be signed to not
loose error values.
Reported-by: David Binderman
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
1 file chan
Am Donnerstag, 16. April 2015, 16:41:51 schrieb Ãrjan Eide:
> Set vm_pgoff to 0 after using it to look up the GEM node, before passing
> it on rockchip_gem_mmap_buf() where the offset must be from the start of
> the buffer.
>
> Passing in the fake offset currently works because the
> dma_mmap_att
Mark Yao looks after the Rockchip drm drivers and should thus also get
patches touching these.
Signed-off-by: Heiko Stuebner
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7687fc6..7e4d386 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -
platform_get_irq() can return negative error values and we already test for
these. Therefore the variable holding this value should be signed to not
loose possible error values.
Reported-by: David Binderman
Signed-off-by: Heiko Stuebner
Reviewed-By: Daniel Kurtz
---
changed since v1:
- instead
Hi Boris,
Am Freitag, 17. April 2015, 09:29:28 schrieb Boris Brezillon:
> Clock rates are stored in an unsigned long field, but ->round_rate()
> (which returns a rounded rate from a requested one) returns a long
> value (errors are reported using negative error codes), which can lead
> to long ove
Am Donnerstag, 16. April 2015, 11:09:58 schrieb Archit Taneja:
> On 04/09/2015 02:13 PM, Thierry Reding wrote:
> > On Thu, Feb 12, 2015 at 02:01:34PM +0800, Liu Ying wrote:
> > [...]
> >
> >> diff --git a/drivers/gpu/drm/bridge/dw_mipi_dsi.c
> >> b/drivers/gpu/drm/bridge/dw_mipi_dsi.c>
> > [...]
Hi Dave,
Am Montag, 20. April 2015, 09:30:06 schrieb Mark yao:
> Hi Dave
> I'm interesting to maintain the rockchip drm, so add entry for
> Rockchip drm.
> and some fixes.
can you consider these as fixes for 4.1?
Thanks
Heiko
>
> Can you land them?
>
> The following changes s
Hi Yakir,
I think this Rockchip portion is missing a devicetree binding.
You have the ability to power down the actual edp phy by using
grf_edp_iddq_en from GRF_SOC_CON12. This is similar to how the
rk3288 usb-phy gets put into a deeper state. So maybe you could
provide a phy driver (drivers/phy
Hi Yakir,
Am Samstag, 8. August 2015, 11:54:38 schrieb Yakir Yang:
> >> +static int rockchip_dp_init(struct rockchip_dp_device *dp)
> >> +{
> >> + struct device *dev = dp->dev;
> >> + struct device_node *np = dev->of_node;
> >> + int ret;
> >> +
> >> + dp->grf = syscon_regmap_lookup_by_phandle
Mark,
Am Donnerstag, 20. November 2014, 09:46:34 schrieb Mark Yao:
> This a series of patches is a DRM Driver for Rockchip Socs, add support
> for vop devices. Future patches will add additional encoders/connectors,
> such as eDP, HDMI.
>
> The basic "crtc" for rockchip is a "VOP" - Video Output
Hi Joerg, Dave,
Am Mittwoch, 26. November 2014, 09:12:56 schrieb Dave Airlie:
> On 26 November 2014 at 02:38, Heiko Stübner wrote:
> > Mark,
> >
> > Am Donnerstag, 20. November 2014, 09:46:34 schrieb Mark Yao:
> >> This a series of patches is a DRM Driver for Rockchip Socs, add support
> >> for
Am Donnerstag, 27. November 2014, 14:05:00 schrieb Daniel Kurtz:
> On Thu, Nov 27, 2014 at 2:08 AM, Mark yao wrote:
> > On 2014å¹´11æ27æ¥ 10:12, Dave Airlie wrote:
> >>> Hi Dave
> >>>
> >>> Do you mean that I need send you a branch, based on drm-next, merge
> >>> with
> >>>
> >>> io
Hi Mark,
Am Freitag, 17. Oktober 2014, 12:22:53 schrieb Mark yao:
> On 2014?10?17? 08:46, Dave Airlie wrote:
> > On 17 October 2014 10:40, Mark yao wrote:
> >> Hi
> >> I think Rockchip drm driver is ready now, can it land?
> >
> > I probably want to wait until -rc1 though I suppose since its a n
Am Freitag, 17. Oktober 2014, 16:16:01 schrieb Mark yao:
> On 2014?10?17? 14:24, Heiko St?bner wrote:
> > Hi Mark,
> >
> > Am Freitag, 17. Oktober 2014, 12:22:53 schrieb Mark yao:
> >> On 2014?10?17? 08:46, Dave Airlie wrote:
> >>> On 17 October 2014 10:40, Mark yao wrote:
> Hi
> I thin
Hi Mark,
Am Freitag, 17. Oktober 2014, 16:42:54 schrieb Mark yao:
> On 2014?10?17? 16:25, Heiko St?bner wrote:
> > Am Freitag, 17. Oktober 2014, 16:16:01 schrieb Mark yao:
> >> On 2014?10?17? 14:24, Heiko St?bner wrote:
> >>> Hi Mark,
> >>>
> >>> Am Freitag, 17. Oktober 2014, 12:22:53 schrieb Mar
Hi Detlev,
Am Freitag, 8. November 2024, 19:50:38 CET schrieb Detlev Casanova:
> Detlev Casanova (3):
> vop2: Add clock resets support
> arm64: dts: rockchip: Add VOP clock resets for rk3588s
> dt-bindings: display: vop2: Add VP clock resets
while it isn't that important for this short seri
Am Freitag, 8. November 2024, 16:21:24 CET schrieb Diederik de Haas:
> On Fri Nov 8, 2024 at 3:44 PM CET, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > DRM_DEV_ERROR is deprecated and using dev_err_probe saves quite a number
> > of lines too, so convert the error prints for the dsi-driver
Am Freitag, 20. September 2024, 12:28:02 CEST schrieb Liviu Dudau:
> Since 641bb4394f40 ("fs: move FMODE_UNSIGNED_OFFSET to fop_flags")
> the FMODE_UNSIGNED_OFFSET flag has been moved to fop_flags and renamed,
> but the patch failed to make the changes for the panthor driver.
> When user space open
Hey Dragan,
Am Freitag, 8. November 2024, 14:53:57 CET schrieb Dragan Simic:
> Perform a few trivial code cleanups, to make one logged message a bit more
> consistent with the other logged messages by capitalizing its first word, and
> to avoid line wrapping by using the 100-column width better.
>
Am Freitag, 8. November 2024, 15:05:02 CET schrieb Dragan Simic:
> Hello Heiko,
>
> On 2024-11-08 14:56, Heiko Stübner wrote:
> > Am Freitag, 8. November 2024, 14:53:57 CET schrieb Dragan Simic:
> >> Perform a few trivial code cleanups, to make one logged message a bit
&
Am Freitag, 8. November 2024, 15:13:33 CET schrieb Dragan Simic:
> On 2024-11-08 15:09, Heiko Stübner wrote:
> > Am Freitag, 8. November 2024, 15:05:02 CET schrieb Dragan Simic:
> >> On 2024-11-08 14:56, Heiko Stübner wrote:
> >> > Am Freitag, 8. November 2024, 14:
Hi Detlev,
Am Freitag, 8. November 2024, 19:50:39 CET schrieb Detlev Casanova:
> At the end of initialization, each VP clock needs to be reset before
> they can be used.
>
> Failing to do so can put the VOP in an undefined state where the
> generated HDMI signal is either lost or not matching the
Hi,
Am Mittwoch, 6. November 2024, 14:33:25 CET schrieb Diederik de Haas:
> > +#define IPI_DEPTH_5_6_5_BITS 0x02
> > +#define IPI_DEPTH_6_BITS 0x03
> > +#define IPI_DEPTH_8_BITS 0x05
> > +#define IPI_DEPTH_10_BITS 0x06
>
> Possibly dumb remark (sorry):
>
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