On Tue 20 Jul 10:33 CDT 2021, Caleb Connolly wrote:
> The OnePlus 6T panel fails to initialise if it has been reset,
> workaround this by allowing panels to not specify a reset GPIO.
>
> Signed-off-by: Caleb Connolly
> ---
> drivers/gpu/drm/panel/panel-samsung-sofef00.c | 7 +--
> 1 file ch
e old single-reg format
and apply the original offsets and sizes.
Bjorn Andersson (5):
dt-bindings: msm/dp: Change reg definition
drm/msm/dp: Use devres for ioremap()
drm/msm/dp: Refactor ioremap wrapper
drm/msm/dp: Store each subblock in the io region
drm/msm/dp: Allow sub-regions
handle existing DTBs, even
though the schema defines the new layout.
Signed-off-by: Bjorn Andersson
---
.../bindings/display/msm/dp-controller.yaml | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
In order to deal with multiple memory ranges in the following commit
change the ioremap wrapper to not poke directly into the dss_io_data
struct.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_parser.c | 28 ++--
drivers/gpu/drm/msm/dp/dp_parser.h | 2
The non-devres version of ioremap is used, which requires manual
cleanup. But the code paths leading here is mixed with other devres
users, so rely on this for ioremap as well to simplify the code.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_parser.c | 29
Not all platforms has DP_P0 at offset 0x1000 from the beginning of the
DP block. So dss_io_data into representing each of the sub-regions, to
make it possible in the next patch to specify each of the sub-regions
individually.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp
Not all platforms has P0 at an offset of 0x1000 from the base address,
so add support for specifying each sub-region in DT. The code falls back
to the predefined offsets in the case that only a single reg is
specified, in order to support existing DT.
Signed-off-by: Bjorn Andersson
---
drivers
Some bootloaders set the widebus enable bit in the INTF_CONFIG register,
but configuration of widebus isn't yet supported ensure that the
register has a known value, with widebus disabled.
Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
Signed-off-by:
driving single device, with clocks being locked) to "bonded DSI".
>
> Signed-off-by: Dmitry Baryshkov
> Reviewed-by: Abhinav Kumar
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c | 2 +-
> drivers/gpu/drm/msm/dsi
This patch adds a Adreno 680 entry to the gpulist.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 5 +++--
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++-
drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 2 +-
drivers/gpu/drm/msm/adreno
gt; *msm_dsi,
> static inline void msm_dsi_snapshot(struct msm_disp_state *disp_state,
> struct msm_dsi *msm_dsi)
> {
> }
> -
> +static inline bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi)
> +{
> + return false;
> +}
> +static bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi)
Missing "inline"
> +{
> + return false;
> +}
> +bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi)
Same.
Looks good otherwise!
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> +{
> + return false;
> +}
> #endif
>
> #ifdef CONFIG_DRM_MSM_DP
> --
> 2.30.2
>
endent DSI" configurations. In future this would also help adding
> support for multiple DP connectors.
>
> Signed-off-by: Dmitry Baryshkov
> Reviewed-by: Abhinav Kumar
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1
On Sat 17 Jul 07:40 CDT 2021, Dmitry Baryshkov wrote:
> Move a call to mdp5_encoder_set_intf_mode() after
> msm_dsi_modeset_init(), removing set_encoder_mode callback.
>
> Signed-off-by: Dmitry Baryshkov
> Reviewed-by: Abhinav Kumar
Reviewed-by: Bjorn Andersson
On Sat 17 Jul 07:40 CDT 2021, Dmitry Baryshkov wrote:
> None of the display drivers now implement set_encoder_mode callback.
> Stop calling it from the modeset init code.
>
> Signed-off-by: Dmitry Baryshkov
> Reviewed-by: Abhinav Kumar
Reviewed-by: Bjorn Andersson
On Sat 17 Jul 07:40 CDT 2021, Dmitry Baryshkov wrote:
> None of the display drivers now implement set_encoder_mode callback.
> Stop calling it from the modeset init code.
>
> Signed-off-by: Dmitry Baryshkov
> Reviewed-by: Abhinav Kumar
Reviewed-by: Bjorn Andersson
On Sat 17 Jul 07:40 CDT 2021, Dmitry Baryshkov wrote:
> set_encoder_mode callback is completely unused now. Drop it from
> msm_kms_func().
>
> Signed-off-by: Dmitry Baryshkov
> Reviewed-by: Abhinav Kumar
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/gpu/
e DSI interfaces:
https://lore.kernel.org/linux-arm-msm/20210717124016.316020-1-dmitry.barysh...@linaro.org/
With that in place add SC8180x DP and eDP controllers.
Bjorn Andersson (5):
drm/msm/dp: Remove global g_dp_display variable
drm/msm/dp: Modify prototype of encoder based API
drm/msm/dp: Suppo
stly, bump the number of struct msm_dp instances carries by priv->dp
to 3, the currently known maximum number of controllers found in a
Qualcomm SoC.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 60 +++
.../gpu/drm/msm/disp/msm_disp_snapshot_u
drm_encoder at hand.
The information for doing this lookup is available inside the DP driver,
so update the API to take the struct msm_drm_private and the struct
drm_encoder and have the DP code figure out which struct msm_dp the
operation relates to.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm
s and drvdata.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_display.c | 78 ++---
1 file changed, 37 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index 70b319a8fe83..8696b36d30e4 100644
The Qualcomm SC8180x has 2 DP controllers and 1 eDP controller, add
compatibles for these to the msm/dp binding.
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree
The sc8180x has 2 DP and 1 eDP controllers, add support for these to the
DP driver.
Link:
https://lore.kernel.org/linux-arm-msm/20210511042043.592802-5-bjorn.anders...@linaro.org/
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_display.c | 12
1 file changed, 12
The sc8180x has 2 DP and 1 eDP controllers, add support for these to the
DP driver.
Link:
https://lore.kernel.org/linux-arm-msm/20210511042043.592802-5-bjorn.anders...@linaro.org/
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_display.c | 12
1 file changed, 12
Add bindings for the two AUO panels B133HAN05 and B140HAN06, both
1920x1080 panels with 16.7M colors, first being 13.3" and the latter
14.0".
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 4
1 file changed, 4 insertions(+)
di
Add definition of the AUO B133HAN05.4 13.3" FHD panel and the
B140HAN06.4 14.0" FHD panel.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/panel/panel-simple.c | 66
1 file changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
eDP panels might need some power sequencing and backlight management,
so make it possible to associate a drm_panel with a DP instance and
prepare and enable the panel accordingly.
Signed-off-by: Bjorn Andersson
---
This solves my immediate problem on my 8cx laptops, of indirectly controlling
r to f8f934c180f629bb927a04fd90d)
>
> Reported-by: Dmitry Baryshkov
> Reported-by: Yassine Oudjana
> Fixes: 2a574cc05d38 ("drm/msm: Improve the a6xx page fault handler")
> Signed-off-by: Rob Clark
> Tested-by: John Stultz
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> --
no-op change.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 86 +--
> 1 file changed, 43 insertions(+), 43 deletions(-)
>
functions / structures making sure that
> anything applicable to the whole chip (instead of just the MIPI to eDP
> bridge part) included "sn65dsi86" somewhere in the name instead of
> just "ti_sn_bridge".
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
>
ou're not supposed to handle errors from debugfs_create_dir(), but I
like what you're doing with devm here and that needs a check.
Also worth mentioning is that at this point in the patch stack the
debugfs "status" file will outlive the activation of pm_runtime, this is
however taken care
On Fri 16 Apr 17:39 CDT 2021, Douglas Anderson wrote:
> Tiny cleanup for probe so we don't keep having to specify
> "&client->dev" or "pdata->dev". No functional changes intended.
>
Nice
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-o
as dev_set_drvdata().
>
> No functional changes intended.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 8 ++--
> 1 file changed, 2 insertions(+)
hanges intended by this change.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 14 +-
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --
eaking the driver into sub-drivers.
>
> Since we're using devm for all of the "whole chip" stuff this is
> actually quite easy now.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no chang
On Fri 16 Apr 17:39 CDT 2021, Douglas Anderson wrote:
> Let's use the newly minted aux bus to break up the driver into sub
> drivers. We're not doing a full breakup here: all the code is still in
> the same file and remains largely untouched. The big goal here of
> using sub-drivers is to allow pa
be a
> collection of sub-drivers. Now the GPIO part can probe separately and
> that breaks the chain. Let's get rid of the old code to clean things
> up.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
>
ransfer all the chunks.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 14 --
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/dr
On Fri 16 Apr 17:39 CDT 2021, Douglas Anderson wrote:
> No functional changes--this just makes the diffstat of a future change
> easier to understand.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no changes since v1)
e it was.
>
> Even if someone is using the bridge chip without the "refclk" they're
> in no worse shape than they were before the (fairly recent) commit
> 58074b08c04a ("drm/bridge: ti-sn65dsi86: Read EDID blob over DDC").
>
Reviewed-by: Bjorn Andersson
R
On Fri 16 Apr 17:39 CDT 2021, Douglas Anderson wrote:
> We'd like to be able to expose the DDC-over-AUX channel bus to our
> panel. This gets into a chicken-and-egg problem because:
> - The panel wants to get its DDC at probe time.
> - The ti-sn65dsi86 MIPI-to-eDP bridge code, which provides the D
On Fri 16 Apr 17:39 CDT 2021, Douglas Anderson wrote:
> As of commit 5186421cbfe2 ("drm: Introduce epoch counter to
> drm_connector") the drm_get_edid() function calls
> drm_connector_update_edid_property() for us. There's no reason for us
> to call it again.
>
we can add a
> per-panel flag. It appears that providing the DDC bus to the panel in
> the past was somewhat uncommon in any case.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/pa
mple_suspend(struct device *dev)
> regulator_disable(p->supply);
> p->unprepared_time = ktime_get();
>
> + kfree(p->edid);
> + p->edid = NULL;
Reviewed-by: Bjorn Andersson
But separate of this, shouldn't the driver have a pm_runtim
like this to their panel in the
> dts:
> ddc-i2c-bus = <&sn65dsi86_bridge>;
>
> Presumably it's OK to land this without waiting for users to add the
> dts property since the EDID reading was a bit broken anyway, was
> "recently" added, and we know we m
ange that code or
> revert this patch. :-) If nobody breaks then we've nicely saved a few
> lines of code and some complexity.
>
> [1] https://lore.kernel.org/r/yhepsqgqoau1v...@pendragon.ideasonboard.com
>
Acked-by: Bjorn Andersson
Regards,
Bjorn
> Suggested-b
On Mon 26 Apr 19:18 CDT 2021, Dmitry Baryshkov wrote:
[..]
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> index 92fe844b517b..be578fc4e54f 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -124,7 +124,7 @@ struct clk *msm_clk_get
On Wed 28 Apr 08:41 CDT 2021, Dmitry Baryshkov wrote:
> On 28/04/2021 05:47, Bjorn Andersson wrote:
> > On Mon 26 Apr 19:18 CDT 2021, Dmitry Baryshkov wrote:
> > [..]
> > > diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> > > index
e old single-reg format
and apply the original offsets and sizes.
Bjorn Andersson (5):
dt-bindings: msm/dp: Change reg definition
drm/msm/dp: Use devres for ioremap()
drm/msm/dp: Refactor ioremap wrapper
drm/msm/dp: Store each subblock in the io region
drm/msm/dp: Allow sub-regions
Not all platforms has DP_P0 at offset 0x1000 from the beginning of the
DP block. So split the dss_io_data memory region into a set of
sub-regions, to make it possible in the next patch to specify each of
the sub-regions individually.
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Fixed
The non-devres version of ioremap is used, which requires manual
cleanup. But the code paths leading here is mixed with other devres
users, so rely on this for ioremap as well to simplify the code.
Reviewed-by: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Bjorn Andersson
---
Changes
handle existing DTBs, even
though the schema defines the new layout.
Reviewed-by: Stephen Boyd
Reviewed-by: Rob Herring
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Include the p1 region (although unused by the implementation for now)
.../bindings/display/msm/dp-controller.yaml
: Abhinav Kumar
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Reworked on top of changes in 4/5
drivers/gpu/drm/msm/dp/dp_parser.c | 49 +++---
1 file changed, 38 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c
b/drivers/gpu/drm/msm/dp
: Bjorn Andersson
---
Changes since v1:
- Dropped initialization of "res"
- Fixed devm_ioremap() return value check
- Dropped error prints (as devm_ioremap() already does that)
drivers/gpu/drm/msm/dp/dp_parser.c | 30 ++
drivers/gpu/drm/msm/dp/dp_parser.h
On Thu 12 Aug 19:28 CDT 2021, sbill...@codeaurora.org wrote:
> On 2021-08-12 06:11, Stephen Boyd wrote:
> > Quoting Sankeerth Billakanti (2021-08-11 17:08:01)
[..]
> > > +static int dp_parser_gpio(struct dp_parser *parser)
> > > +{
> > > + struct device *dev = &parser->pdev->dev;
> > > +
On Thu 29 Jul 04:59 CDT 2021, Dmitry Baryshkov wrote:
> On 27/07/2021 02:13, Bjorn Andersson wrote:
> > eDP panels might need some power sequencing and backlight management,
> > so make it possible to associate a drm_panel with a DP instance and
> > prepare and enable
e DSI interfaces:
https://lore.kernel.org/linux-arm-msm/20210717124016.316020-1-dmitry.barysh...@linaro.org/
With that in place add SC8180x DP and eDP controllers.
Bjorn Andersson (5):
drm/msm/dp: Remove global g_dp_display variable
drm/msm/dp: Modify prototype of encoder based API
drm/msm/dp: Suppo
s and drvdata.
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Renamed dev_get_dp_display_private()
- Drop incorrect checks for !container_of()
- Dropped the checks for !NULL checks of dev in the USB api
- Use right accessor in dp_display_remove()
drivers/gpu/drm/msm/dp/dp_display.c
_virt.
Lastly, bump the number of struct msm_dp instances carries by priv->dp
to 3, the currently known maximum number of controllers found in a
Qualcomm SoC.
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Update dpu_encoder_setup() to store the reference to the msm_dp in our dpu_enc
The Qualcomm SC8180x has 2 DP controllers and 1 eDP controller, add
compatibles for these to the msm/dp binding.
Reviewed-by: Stephen Boyd
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Picked up Stephen's R-b
.../devicetree/bindings/display/msm/dp-controller.yaml | 2
drm_encoder at hand.
Store a reference to the struct msm_dp associated with each
dpu_encoder_virt to allow the particular instance to be associate with
the encoder in the following patch.
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Store msm_dp reference in dpu_encoder_virt instead of carrying
The sc8180x has 2 DP and 1 eDP controllers, add support for these to the
DP driver.
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Squashed DP and eDP data, as there's no reason to keep them separate today
drivers/gpu/drm/msm/dp/dp_display.c | 7 +++
1 file changed, 7 inser
On Thu 26 Aug 00:13 PDT 2021, Stephen Boyd wrote:
> Quoting Bjorn Andersson (2021-08-25 16:42:31)
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
[..]
> > @@ -203,8 +204,8 @@ static int dpu_kms_debugfs_ini
des the DPU platform_device.
Replace the open coded test for compatibles with a check against the
match data of the mdss device to save others this trouble in the future.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/msm_drv.c | 15 +--
1 file changed, 9 insertions(+)
On Fri 26 Mar 10:24 CDT 2021, Rob Clark wrote:
> On Fri, Mar 26, 2021 at 8:18 AM Rob Clark wrote:
> >
> > On Fri, Mar 26, 2021 at 5:38 AM Thierry Reding
> > wrote:
> > >
> > > On Wed, Mar 17, 2021 at 06:53:04PM -0700, Rob Clark wrote:
> > > > On Wed, Mar 17, 2021 at 4:27 PM Matthias Kaehlcke
") ||
> - of_device_is_compatible(dev->of_node, "qcom,sdm845-mdss") ||
> - of_device_is_compatible(dev->of_node, "qcom,sc7180-mdss")) {
> + if (!of_device_is_compatible(dev->of_node, "qcom,mdp4")) {
Please consider reviewing my pro
On Mon 29 Mar 07:00 CDT 2021, Dmitry Baryshkov wrote:
> From: Jonathan Marek
>
> The driver already has support for sm8150/sm8250, but the compatibles were
> never added.
>
> Also inverse the non-mdp4 condition in add_display_components() to avoid
> having to check every new compatible in the c
't go all the way to the TTBR1 path.
>
> Signed-off-by: Eric Anholt
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
>
> We've been seeing a flaky test per day or so in Mesa CI where the
> kernel gets wedged after an iommu fault turns into CP errors. With
> th
On Fri 26 Mar 18:13 CDT 2021, Eric Anholt wrote:
> This enables the adreno-specific SMMU path that sets HUPCF so
> (user-managed) page faults don't wedge the GPU.
>
> Signed-off-by: Eric Anholt
Acked-by: Bjorn Andersson
@Will, can you pick this together with the driver pat
r EDID ready event, which was delayed because IRQ handler was stuck
> trying to deliver hotplug event.
> Move hotplug notifications from IRQ handler to separate work to be able
> to process IRQ events without delays.
>
I see a couple of other drivers doing the same, and the patch looks
g
On Fri 27 Nov 03:23 CST 2020, Dmitry Baryshkov wrote:
> - Call wake_up() when EDID ready event is received to wake
> wait_event_interruptible_timeout()
>
> - Increase waiting timeout, reading EDID can take longer than 100ms, so
> let's be on a safe side.
>
> - Return NULL pointer from get_ed
On Fri 15 Jan 05:02 CST 2021, Dmitry Baryshkov wrote:
> - Call wake_up() when EDID ready event is received to wake
> wait_event_interruptible_timeout()
>
> - Increase waiting timeout, reading EDID can take longer than 100ms, so
> let's be on a safe side.
>
Revie
On Fri 15 Jan 05:02 CST 2021, Dmitry Baryshkov wrote:
> Return NULL pointer from get_edid() callback rather than ERR_PTR()
> pointer, as DRM code does NULL checks rather than IS_ERR(). Also while
> we are at it, return NULL if getting EDID timed out.
>
Reviewed-by: Bjorn Andersso
The meta-schema recently gained a definition for the common -supply$
property, which denotes that maxItems is not a valid property. Drop this
to clear up the binding validation error.
Fixes: a46c112512de ("dt-bindings: dp-connector: add binding for DisplayPort
connector")
Signed-off
On Fri 08 Jan 12:15 CST 2021, Akhil P Oommen wrote:
Please align the $subject prefix with other changes in the same file.
I fixed it up while picking up the patch this time.
Regards,
Bjorn
> Add support for gpu fuse to help identify the supported opps.
>
> Signed-off-by: Akhil P Oommen
> ---
>
On Thu 18 Feb 14:55 CST 2021, Kuogee Hsieh wrote:
> Allow supported link rate to be limited to the value specified at
> dtsi. If it is not specified, then link rate is derived from dpcd
> directly. Below are examples,
> link-rate = <162000> for max link rate limited at 1.62G
> link-rate = <27>
t; check for NULL in the enable case anyway so why not avoid the extra
> call?
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Douglas Anderson
> ---
>
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 11 +++
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
> d
On Thu 04 Mar 17:52 CST 2021, Douglas Anderson wrote:
> This patch is _only_ code motion to prepare for the patch
> ("drm/bridge: ti-sn65dsi86: Properly get the EDID, but only if
> refclk") and make it easier to understand.
>
Reviewed-by: Bjorn Andersson
Regards,
ndamental DRM API change. After
> looking at it a bunch, it also doesn't feel as hacky to me as I first
> thought. The things that pre-enable does are well defined and well
> understood and there should be no problems with doing them early nor
> with doing them before userspace requ
On Fri 07 May 16:18 CDT 2021, Lyude Paul wrote:
> Adding ville from Intel to also get their take on this.
>
> In general we've been trying to move DRM to a design where we don't expose any
> devices until everything is ready. That's pretty much the main reason that we
> register things during bri
controller.
Bjorn Andersson (3):
drm/msm/dpu: Introduce knowledge of widebus feature
drm/msm/dpu: Clear boot loader configured data paths
dpu: hack up the irq table for 8180 intf_5
Rob Clark (1):
drm/msm/dpu: Add SC8180x to hw catalog
.../devicetree/bindings/display/msm/dpu.txt | 4 +
signal the timing configuration code that the INTF_CONFIG2
register should be written - which will clear the bit, in the case that
the bootloader left it set.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
gured data paths, to avoid the graphical artifacts.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 4 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 36 ++
drivers/gpu/drm/msm/disp/dpu
Signed-off-by: Bjorn Andersson
---
This is a hack and as discussed on IRC this should be replaced by some sane
mechanism for dealing with the old and new IRQ layout. Including it in the
series for completeness.
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 14 ++
1 file
the widebus bit set, so this
is flagged appropriately to ensure widebus is disabled - for now.
Signed-off-by: Rob Clark
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/display/msm/dpu.txt | 4 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 121 ++
.../gpu/drm
SC8180x eDP block.
The third patch configures the INTF_CONFIG register, which carries the
configuration for widebus handling. As with the DPU the bootloader enables
widebus and we need to disable it, or implement support for adjusting the
timing.
Bjorn Andersson (4):
drm/msm/dp: Simplify the
cancelling out step 1).
Left is the code that finds the ratio between the two arguments, scaled
to keep the denominator close to or larger than 0x8000. And this is our
mvid/nvid pair.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 41 +
1 file changed
Not all platforms has DP_P0 at offset 0x1000 from the beginning of the
DP block. So move the offsets into dss_io_data, to make it possible in
the next patch to specify alternative offsets and sizes of these
segments.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 57
Some bootloaders set the widebus enable bit in the INTF_CONFIG register,
but configuration of widebus isn't yet supported ensure that the
register has a known value, with widebus disabled.
Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
Signed-off-by:
The eDP controller found in SC8180x is at large compatible with the
current implementation, but has its register blocks at slightly
different offsets.
Add the compatible and the new register layout.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/msm/dp/dp_display.c | 1 +
drivers/gpu/drm
On Mon 10 May 07:16 CDT 2021, sbill...@codeaurora.org wrote:
> On 2021-05-06 20:32, Rob Clark wrote:
> > On Wed, May 5, 2021 at 11:47 PM wrote:
> > >
> > > On 2021-05-05 15:31, Dmitry Baryshkov wrote:
> > > > Hi,
> > > >
> > > > On Wed, 5 May 2021 at 11:17, Sankeerth Billakanti
> > > > wrote:
>
On Wed 12 May 17:58 CDT 2021, Dmitry Baryshkov wrote:
> On Tue, 11 May 2021 at 07:19, Bjorn Andersson
> wrote:
> >
> > From: Rob Clark
> >
> > Add SC8180x to the hardware catalog, for initial support for the
> > platform. Due to limitations in t
On Sun 11 Apr 19:09 CDT 2021, Dmitry Baryshkov wrote:
> There is little sense in reading interrupt statuses and right after that
> going after the array of statuses to dispatch them. Merge both loops
> into single function doing read and dispatch.
>
Reviewed-by: Bjorn Andersson
Re
;
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 9 -
> .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 39 +--
> .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 9 -
>
On Sun 11 Apr 19:09 CDT 2021, Dmitry Baryshkov wrote:
> Change huge lookup table to contain just sensible entries. IRQ index is
> now not an index in the table, but just register id (multiplied by 32,
> the amount of IRQs in the register) plus offset in the register. This
> allows us to remove all
On Sat 15 May 14:56 CDT 2021, Dmitry Baryshkov wrote:
> Remove most of remains of downstream usbpd code. Mainline kernel uses
> different approach for managing Type-C / USB-PD, so this remains unused.
> Do not touch usbpd callbacks for now, since they look usefull enough as
> an example of how to
ng to get Type-C DP working. Once that's in place I'd
need a better INTF/encoder picker - because the current model of just
picking INTF_DP 0 (or in a sequential fashion) won't work.
Regards,
Bjorn
> Thanks
>
> Abhinav
>
> On 2021-05-10 21:20, Bjorn Andersson
A combination of recent bug fixes by Doug Anderson and the proper
definition of iommu streams means that this hack is no longer needed.
Let's clean up the code by reverting '127068abe85b ("i2c: qcom-geni:
Disable DMA processing on the Lenovo Yoga C630")'.
Signe
f the backlight as the panel is turned on or
off.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/drm_panel.c | 47 +++--
include/drm/drm_panel.h | 8 +++
2 files changed, 43 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gp
Doug Anderson for suggestions related to the involved
math.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 202 ++
1 file changed, 202 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index
On Mon 07 Dec 23:48 CST 2020, Sam Ravnborg wrote:
> Hi Bjorn,
> On Mon, Dec 07, 2020 at 10:44:46PM -0600, Bjorn Andersson wrote:
> > Some bridge chips, such as the TI SN65DSI86 DSI/eDP bridge, provides
> > means of generating a PWM signal for backlight control of the attac
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