[PATCH v2 3/4] dt-bindings: display: ti, am65x-dss: Add OLDI properties for AM625 DSS

2024-07-15 Thread Aradhya Bhatia
the data flow path. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am65x-dss.yaml | 134 ++ 1 file changed, 134 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x

[PATCH v2 1/4] dt-bindings: display: ti, am65x-dss: Re-indent the example

2024-07-15 Thread Aradhya Bhatia
Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Acked-by: Rob Herring (Arm) Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am65x-dss.yaml | 54 +-- 1

[PATCH v2 4/4] drm/tidss: Add OLDI bridge support

2024-07-15 Thread Aradhya Bhatia
their own devicetree and their own bridge entity will help support the various display modes and sharing possiblilities of the OLDI hardware. For all these reasons, add support for the OLDI TXes as DRM bridges. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/tidss/Makefile | 3 +- drive

[PATCH v2 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

2024-07-15 Thread Aradhya Bhatia
ntrol module, which contains a few registers to control OLDI IO power and characteristics. Add devicetree binding schema for AM625 OLDI TXes. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am625-oldi.yaml| 153 ++ MAINTAINERS

[PATCH v3 1/4] dt-bindings: display: ti, am65x-dss: Re-indent the example

2024-07-16 Thread Aradhya Bhatia
Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Acked-by: Rob Herring (Arm) Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am65x-dss.yaml | 54 +-- 1

[PATCH v3 0/4] drm/tidss: Add OLDI bridge support

2024-07-16 Thread Aradhya Bhatia
tree/next_oldi-v3-tests/ [4]: ("ti,am65x-dss.yaml: oldi-txes: Missing additionalProperties/ unevaluatedProperties constraint") https://lore.kernel.org/all/172107979988.1595945.9666141982402158422.r...@kernel.org/ Aradhya Bhatia (4): dt-bindings: display: ti,am65x-dss: Re-indent the example

[PATCH v3 3/4] dt-bindings: display: ti, am65x-dss: Add OLDI properties for AM625 DSS

2024-07-16 Thread Aradhya Bhatia
the data flow path. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am65x-dss.yaml | 135 ++ 1 file changed, 135 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x

[PATCH v3 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

2024-07-16 Thread Aradhya Bhatia
ntrol module, which contains a few registers to control OLDI IO power and characteristics. Add devicetree binding schema for AM625 OLDI TXes. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am625-oldi.yaml| 153 ++ MAINTAINERS

[PATCH v3 4/4] drm/tidss: Add OLDI bridge support

2024-07-16 Thread Aradhya Bhatia
their own devicetree and their own bridge entity will help support the various display modes and sharing possiblilities of the OLDI hardware. For all these reasons, add support for the OLDI TXes as DRM bridges. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/tidss/Makefile | 3 +- drive

Re: [PATCH 1/2] Revert "drm/tidss: Annotate dma-fence critical section in commit path"

2023-10-02 Thread Aradhya Bhatia
[drm_kms_helper] > drm_atomic_helper_commit+0x1a8/0x1c0 [drm_kms_helper] > drm_atomic_commit+0xa8/0xe0 [drm] > drm_mode_atomic_ioctl+0x9ec/0xc80 [drm] > drm_ioctl_kernel+0xc4/0x170 [drm] > drm_ioctl+0x234/0x4b0 [drm] > drm_compat_ioctl+0x110/0x12c [drm] > __arm64_compat_sys_ioctl+0x128

Re: [PATCH 2/2] Revert "drm/omapdrm: Annotate dma-fence critical section in commit path"

2023-10-02 Thread Aradhya Bhatia
ioctl+0x9a4/0xc38 > drm_mode_atomic_ioctl from drm_ioctl+0x210/0x4a8 > drm_ioctl from sys_ioctl+0x138/0xf00 > sys_ioctl from ret_fast_syscall+0x0/0x1c > Exception stack(0xf1011fa8 to 0xf1011ff0) > 1fa0: 00466d58 be9ab510 0003 c03864bc be9ab510 be9ab4e0 >

Re: [PATCH v7 7/8] drm/tidss: Update encoder/bridge chain connect model

2023-10-30 Thread Aradhya Bhatia
On 30-Oct-23 14:55, Jan Kiszka wrote: > On 06.06.23 10:21, Aradhya Bhatia wrote: >> With the new encoder/bridge chain model, the display controller driver >> is required to create a drm_connector entity instead of asking the >> bridge to do so during drm_bridge_attach. Mor

[PATCH] drm/bridge: tc358767: Support input format negotiation hook

2023-10-30 Thread Aradhya Bhatia
DRM_BRIDGE_ATTACH_NO_CONNECTOR support. Input format is selected to MEDIA_BUS_FMT_RGB888_1X24 as default, as is the case with older model. Reported-by: Jan Kiszka Signed-off-by: Aradhya Bhatia --- Notes: * Since I do not have hardware with me, this was just build tested. I would appreciate it if

Re: [PATCH 2/2] drm/bridge: tc358767: Fix link properties discovery

2023-10-31 Thread Aradhya Bhatia
> Closes: > https://lore.kernel.org/all/24282420-b4dd-45b3-bb1c-fc37fe4a8...@siemens.com/ > Signed-off-by: Tomi Valkeinen > --- Thank you, Tomi, for quickly debugging this! Reviewed-by: Aradhya Bhatia Regards Aradhya > drivers/gpu/drm/bridge/tc358767.c | 7 +++ >

Re: [PATCH] drm/tilcdc: Fix irq free on unload

2023-10-31 Thread Aradhya Bhatia
causing issues on loading the driver a second time. > > Fixes: b6366814fa77 ("drm/tilcdc: Convert to Linux IRQ interfaces") > Cc: Thomas Zimmermann > Signed-off-by: Tomi Valkeinen > --- Reviewed-by: Aradhya Bhatia Regards Aradhya > drivers/gpu/drm/tilcdc/tilcdc_drv

Re: [PATCH] drm/bridge: tc358767: Support input format negotiation hook

2023-11-06 Thread Aradhya Bhatia
Hi Sam, Thank you for the suggestion! On 06-Nov-23 18:08, Sam Ravnborg wrote: > Hi Aradhya, > > On Tue, Oct 31, 2023 at 12:58:46AM +0530, Aradhya Bhatia wrote: >> With new connector model, tc358767 will not create the connector, when >> DRM_BRIDGE_ATTACH_NO_CONNECT

Re: [PATCH] drm/bridge: tc358767: Support input format negotiation hook

2023-11-07 Thread Aradhya Bhatia
Hi Sam, On 07-Nov-23 21:11, Sam Ravnborg wrote: > Hi Aradhya, > > On Tue, Nov 07, 2023 at 01:17:03AM +0530, Aradhya Bhatia wrote: >> Hi Sam, >> >> Thank you for the suggestion! >> >> On 06-Nov-23 18:08, Sam Ravnborg wrote: >>> Hi Aradhya, >>&

[PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

2023-11-08 Thread Aradhya Bhatia
y sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2. Previous Versions: V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhat...@ti.com/ V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhat...@ti.com/ Aradhya Bhatia (2): dt-bindings: display: ti: Add support for am62a7 dss

[PATCH v3 1/2] dt-bindings: display: ti: Add support for am62a7 dss

2023-11-08 Thread Aradhya Bhatia
Signed-off-by: Aradhya Bhatia Reviewed-by: Krzysztof Kozlowski --- .../bindings/display/ti/ti,am65x-dss.yaml | 14 ++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti

[PATCH v3 2/2] drivers/tidss: Add support for AM62A7 DSS

2023-11-08 Thread Aradhya Bhatia
tied off inside the SoC. Also add and use a new type of VP, DISPC_VP_TIED_OFF, for the tied-off VP1 of AM62A DSS. Signed-off-by: Aradhya Bhatia --- Notes: Changes from V2: * Add new DISPC_VP_TIED_OFF for tied-off video-ports. Changes from V1: * Correctly sort DISPC_A

Re: [PATCH v3 2/2] arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs

2024-02-15 Thread Aradhya Bhatia
i/ti,am65x-dss.yaml > > Fixes: 3618811657b3 ("arm64: dts: ti: k3-am62a-main: Add node for Display > SubSystem (DSS)") > Fixes: 8ccc1073c7bb ("arm64: dts: ti: k3-am62-main: Add node for DSS") > Fixes: fc539b90eda2 ("arm64: dts: ti: am654: Add DSS node"

Re: [PATCH 1/2] drm/tidss: Fix initial plane zpos values

2024-02-15 Thread Aradhya Bhatia
ior would be very similar in this > option, and I'm not aware that this would actually help us in any way. > So, to keep the code simple, I opted for the 0, 1, 2, 3 values. > > Signed-off-by: Tomi Valkeinen > Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platf

Re: [PATCH 2/2] drm/tidss: Fix sync-lost issue with two displays

2024-02-15 Thread Aradhya Bhatia
shows that the > OVR's CHANNELIN field has similar issue. So we may need to revisit this > when we find out more about the core issue. > > Signed-off-by: Tomi Valkeinen > Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platform Display > SubSystem") Re

Re: [PATCH v3 1/2] dt-bindings: display: ti,am65x-dss: Add support for common1 region

2024-02-15 Thread Aradhya Bhatia
for "common1" register region too as supported by the > hardware. > > [1]: > AM62x TRM: > https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers) > > AM65x TRM: > https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers) Can you add the

Re: [PATCH v5 0/4] Add common1 region for AM62, AM62A & AM65x

2024-02-16 Thread Aradhya Bhatia
64: dts: ti: Add common1 register space for AM62A SoC For the series, Reviewed-by: Aradhya Bhatia Regards Aradhya > > .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 7 +-- > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++-- > arch/arm64/

[PATCH 3/7] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

2024-05-11 Thread Aradhya Bhatia
adence DSI driver") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 557b037bbc6

[PATCH 0/7] drm/bridge: cdns-dsi: Fix the color-shift issue

2024-05-11 Thread Aradhya Bhatia
/spruil1 [1]: https://github.com/aradhya07/linux-ab/tree/next_dsi_finals-v1-test_rpi Aradhya Bhatia (7): drm/tidss: Add CRTC mode_fixup drm/bridge: cdns-dsi: Fix minor bugs drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready drm/bridge: cdns-dsi: Reset the DCS write FIFO drm/bridg

[PATCH 6/7] drm/bridge: Introduce early_enable and late disable

2024-05-11 Thread Aradhya Bhatia
e. Some bridges need to be up and running before and after their source gets enabled and has run. In some case, that source is a display unit, controlled as part of &drm_crtc. For those bridges, add support for early_enable and late_disable function hooks. Signed-off-by: Aradhya Bha

[PATCH 2/7] drm/bridge: cdns-dsi: Fix minor bugs

2024-05-11 Thread Aradhya Bhatia
y config checks to use mode->clock instead of mode->crtc_clock during mode_valid checks, like everywhere else in the driver. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 7 --- 1 f

[PATCH 1/7] drm/tidss: Add CRTC mode_fixup

2024-05-11 Thread Aradhya Bhatia
Add support for mode_fixup for the tidss CRTC. Some bridges like the cdns-dsi consume the crtc_* timing parameters for programming the blanking values. Allow for the normal timing parameters to get copied to crtc_* timing params. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/tidss

[PATCH 5/7] drm/bridge: cdns-dsi: Support atomic bridge APIs

2024-05-11 Thread Aradhya Bhatia
Change the existing (and deparacated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Signed-off-by: Aradhya Bhatia --- .../gpu/drm/bridge/cadence/cdns-dsi

[PATCH 4/7] drm/bridge: cdns-dsi: Reset the DCS write FIFO

2024-05-11 Thread Aradhya Bhatia
Allow the DCS Write FIFO in the cdns-dsi controller to reset before any DCS packet is transmitted to the DSI sink device. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/bridge/cadence/cdns

[PATCH 7/7] drm/bridge: cdns-dsi: Implement early_enable and late_disable

2024-05-11 Thread Aradhya Bhatia
t pass the color issues. Signed-off-by: Aradhya Bhatia --- .../gpu/drm/bridge/cadence/cdns-dsi-core.c| 36 --- 1 file changed, 6 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-co

[PATCH 3/4] dt-bindings: display: ti, am65x-dss: Add OLDI properties for AM625 DSS

2024-05-11 Thread Aradhya Bhatia
The DSS in AM625 SoC has 2 OLDI TXes. Refer the OLDI schema to add the properties. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am65x-dss.yaml | 136 +- 1 file changed, 135 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display

[PATCH 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

2024-05-11 Thread Aradhya Bhatia
Add devicetree binding schema for AM625 OLDI Transmitters. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am625-oldi.yaml| 153 ++ MAINTAINERS | 1 + 2 files changed, 154 insertions(+) create mode 100644 Documentation

[PATCH 0/4] drm/tidss: Add OLDI bridge support

2024-05-11 Thread Aradhya Bhatia
DSS Series - v9 https://lore.kernel.org/all/20230616150900.6617-1-a-bhat...@ti.com/ [3]: GitHub Fork for OLDI tests https://github.com/aradhya07/linux-ab/tree/next_oldi_finals-v1-tests Aradhya Bhatia (4): dt-bindings: display: ti,am65x-dss: Minor Cleanup dt-bindings: display: ti: Add schema

[PATCH 4/4] drm/tidss: Add OLDI bridge support

2024-05-11 Thread Aradhya Bhatia
support the new LVDS configurations. Signed-off-by: Aradhya Bhatia --- Note: The OLDI configuration should happen before the video-port configuration takes place in tidss_crtc_atomic_enable hook. I have posted a patch allowing DRM bridges to get enabled before the CRTC of that bridge is enabled

[PATCH 1/4] dt-bindings: display: ti,am65x-dss: Minor Cleanup

2024-05-11 Thread Aradhya Bhatia
Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti/ti,am65x-dss.yaml | 54 +-- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/Documentation/devicetree

Re: [PATCH 4/4] drm/tidss: Add OLDI bridge support

2024-05-12 Thread Aradhya Bhatia
Hi Francesco, On 12/05/24 17:18, Francesco Dolcini wrote: > Hello Aradhya, thanks for you patch, I should be able to test your patch on my > hardware in the coming days. That's appreciated. Thank you! =) > > On Sun, May 12, 2024 at 01:00:55AM +0530, Aradhya Bhatia wrote: &g

Re: [PATCH 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

2024-05-13 Thread Aradhya Bhatia
Hi Laurent, Thank you for reviewing the patches! On 13-May-24 01:04, Laurent Pinchart wrote: > Hi Aradhya, > > Thank you for the patch. > > On Sun, May 12, 2024 at 01:00:53AM +0530, Aradhya Bhatia wrote: >> Add devicetree binding schema for AM625 OLDI Transmitters. >>

Re: [PATCH 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

2024-05-13 Thread Aradhya Bhatia
Hi Rob, Thank you for reviewing the patches! On 14/05/24 01:00, Rob Herring wrote: > On Mon, May 13, 2024 at 02:07:44PM +0530, Aradhya Bhatia wrote: >> Hi Laurent, >> >> Thank you for reviewing the patches! >> >> On 13-May-24 01:04, Laurent Pinchart wrote: >

Re: [PATCH 3/4] dt-bindings: display: ti,am65x-dss: Add OLDI properties for AM625 DSS

2024-05-13 Thread Aradhya Bhatia
On 14/05/24 01:05, Rob Herring wrote: > On Sun, May 12, 2024 at 01:00:54AM +0530, Aradhya Bhatia wrote: >> The DSS in AM625 SoC has 2 OLDI TXes. Refer the OLDI schema to add the >> properties. >> >> Signed-off-by: Aradhya Bhatia >> --- >> .../bindings

Re: [PATCH 1/4] dt-bindings: display: ti,am65x-dss: Minor Cleanup

2024-05-13 Thread Aradhya Bhatia
On 14/05/24 00:49, Rob Herring wrote: > On Sun, May 12, 2024 at 01:00:52AM +0530, Aradhya Bhatia wrote: >> Reduce tab size from 8 spaces to 4 spaces to make the bindings >> consistent, and easy to expand. > > "Re-indent the example" would be more specific

[PATCH v3 0/6] drm/panel: simple: Add Panels and Panel Vendors

2024-05-15 Thread Aradhya Bhatia
ux-next. - Made dt-binding syntax corrections in Patch 3/4, based on comments by Krzysztof Kozlowski and Laurent Pinchart. V2: https://lore.kernel.org/all/20230124101238.4542-1-a-bhat...@ti.com/ V1: https://lore.kernel.org/all/20230103064615.5311-1-a-bhat...@ti.com/ Aradhya Bhatia (6):

[PATCH v3 1/6] dt-bindings: vendor-prefixes: Add microtips

2024-05-15 Thread Aradhya Bhatia
Add document vendor prefix for Microtips Technology USA (microtips). Signed-off-by: Aradhya Bhatia Acked-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation

[PATCH v3 3/6] dt-bindings: display: simple: Add Microtips & Lincolntech Dual-LVDS Panels

2024-05-15 Thread Aradhya Bhatia
tFile/2588/13-101HIEBCAF0-S_V1.1_20221104.pdf [1]: https://simplespec.microtipsusa.com/uploads/spec/datasheetFile/2660/13-103HIEB0GA0-S_V1.0_20211206.pdf [2]: https://lincolntechsolutions.com/wp-content/uploads/2023/04/LCD185-101CTL1ARNTT_DS_R1.3.pdf Signed-off-by: Aradhya Bhatia --- .../displa

[PATCH v3 5/6] drm/panel: simple: Add Microtips Technology 13-101HIEBCAF0-C panel

2024-05-15 Thread Aradhya Bhatia
ff-by: Aradhya Bhatia --- drivers/gpu/drm/panel/panel-simple.c | 32 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 10e974bffd28..3a0d8f0ff267 100644 --- a/drivers/gpu/drm/panel/panel-sim

[PATCH v3 2/6] dt-bindings: vendor-prefixes: Add lincolntech

2024-05-15 Thread Aradhya Bhatia
Add document vendor prefix for Lincoln Technology Solutions (lincolntech). Signed-off-by: Aradhya Bhatia Acked-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation

[PATCH v3 4/6] drm/panel: simple: Add Lincoln Tech Sol LCD185-101CT panel

2024-05-15 Thread Aradhya Bhatia
ff-by: Aradhya Bhatia --- drivers/gpu/drm/panel/panel-simple.c | 32 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index dcb6d0b6ced0..10e974bffd28 100644 --- a/drivers/gpu/drm/panel/panel-sim

[PATCH v3 6/6] drm/panel: simple: Add Microtips Technology MF-103HIEB0GA0 panel

2024-05-15 Thread Aradhya Bhatia
d-off-by: Aradhya Bhatia --- drivers/gpu/drm/panel/panel-simple.c | 32 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 3a0d8f0ff267..1b0a6b4e034c 100644 --- a/drivers/gpu/drm/panel/

Re: [PATCH 6/7] drm/bridge: Introduce early_enable and late disable

2024-05-16 Thread Aradhya Bhatia
Hi Maxime, Thank you for reviewing the patches! On 16/05/24 13:52, Maxime Ripard wrote: > On Sat, May 11, 2024 at 09:00:50PM +0530, Aradhya Bhatia wrote: >> diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h >> index 4baca0d9107b..40f93230abb2 100644 >&

Re: [PATCH 2/7] drm/bridge: cdns-dsi: Fix minor bugs

2024-05-16 Thread Aradhya Bhatia
On 16/05/24 13:41, Maxime Ripard wrote: > On Sat, May 11, 2024 at 09:00:46PM +0530, Aradhya Bhatia wrote: >> Update the Phy initialized state to "not initialized" when the driver >> (and the hardware by extension) gets suspended. This will allow the Phy >> to get

Re: [PATCH 1/7] drm/tidss: Add CRTC mode_fixup

2024-05-16 Thread Aradhya Bhatia
Hi Maxime, Thank you for reviewing the patches. On 16/05/24 13:40, Maxime Ripard wrote: > Hi, > > On Sat, May 11, 2024 at 09:00:45PM +0530, Aradhya Bhatia wrote: >> Add support for mode_fixup for the tidss CRTC. >> >> Some bridges like the cdns-dsi consume the c

Re: [PATCH v3 3/6] dt-bindings: display: simple: Add Microtips & Lincolntech Dual-LVDS Panels

2024-05-16 Thread Aradhya Bhatia
Hi Liu, Thanks for reviewing the patch. On 16/05/24 07:49, Liu Ying wrote: > On 5/15/24 17:51, Aradhya Bhatia wrote: >> Add the Microtips Technology USA's MF-101HIEBCAF0 10.1"[0] panel, >> MF-103HIEB0GA0 10.25"[1] panel, and Lincoln Technology Solutions&#

Re: [PATCH 6/7] drm/bridge: Introduce early_enable and late disable

2024-05-24 Thread Aradhya Bhatia
Hi Maxime, On 21/05/24 18:45, Maxime Ripard wrote: > Hi, > > On Thu, May 16, 2024 at 03:10:15PM GMT, Aradhya Bhatia wrote: >>>>/** >>>> * @pre_enable: >>>> * >>>> @@ -285,6 +319,26 @@ struct drm_bridge_funcs { >

Re: [PATCH v2 00/11] drm/tidss: Probe related fixes and cleanups

2023-11-30 Thread Aradhya Bhatia
/tidss: Fix dss reset > drm/tidss: IRQ code cleanup > drm/tidss: Fix atomic_flush check > drm/tidss: Use DRM_PLANE_COMMIT_ACTIVE_ONLY For the series, Reviewed-by: Aradhya Bhatia Regards Aradhya > > drivers/gpu/drm/tidss/tidss_crtc.c | 12 ++ > drivers/g

[PATCH v3 01/10] drm/bridge: cdns-dsi: Fix OF node pointer

2024-06-17 Thread Aradhya Bhatia
bridge will make the function try to fetch the bridge for the cdns-dsi which is not what's required. Fix that. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 2 +- 1 file changed, 1 insert

[PATCH v3 00/10] drm/bridge: cdns-dsi: Fix the color-shift issue

2024-06-17 Thread Aradhya Bhatia
dge enable/disable. Previous versions: v1: https://lore.kernel.org/all/20240511153051.1355825-1-a-bhat...@ti.com/ v2: https://lore.kernel.org/all/20240530093621.1925863-1-a-bhat...@ti.com/ Aradhya Bhatia (10): drm/bridge: cdns-dsi: Fix OF node pointer drm/bridge: cdns-dsi: Fix the phy_initializ

[PATCH v3 05/10] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

2024-06-17 Thread Aradhya Bhatia
cedure" in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Tested-by: Dominik Haller Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 13 - 1 file changed, 12

[PATCH v3 03/10] drm/bridge: cdns-dsi: Fix the link and phy init order

2024-06-17 Thread Aradhya Bhatia
; in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dr

[PATCH v3 02/10] drm/bridge: cdns-dsi: Fix the phy_initialized variable

2024-06-17 Thread Aradhya Bhatia
Update the Phy initialized state to "not initialized" when the driver (and the hardware by extension) gets suspended. This will allow the Phy to get initialized again after resume. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia

[PATCH v3 04/10] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

2024-06-17 Thread Aradhya Bhatia
Allow the D-Phy config checks to use mode->clock instead of mode->crtc_clock during mode_valid checks, like everywhere else in the driver. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdn

[PATCH v3 09/10] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

2024-06-17 Thread Aradhya Bhatia
TC is also a source feeding the bridge, it should not be enabled before the bridges in the pipeline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_help

[PATCH v3 08/10] drm/bridge: cdns-dsi: Support atomic bridge APIs

2024-06-17 Thread Aradhya Bhatia
Change the existing (and deprecated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Reviewed-by: Dmitry Baryshkov Signed-off-by: Aradhya Bhatia --- .../gpu

[PATCH v3 10/10] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

2024-06-17 Thread Aradhya Bhatia
sable hooks to get cdns-dsi ready and running before the tidss videoport to get pass the color shift issues. [0]: See section 12.6.5.7.3 "Start-up Procedure" in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Signed-off-by: Aradhya Bhatia --- .../gpu/drm/bridge/cadence/cdn

[PATCH v3 07/10] drm/mipi-dsi: Add helper to find input format

2024-06-17 Thread Aradhya Bhatia
Add a helper API that can be used by the DSI hosts to find the required input bus format for the given output dsi pixel format. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_mipi_dsi.c | 37 ++ include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 38

[PATCH v3 06/10] drm/bridge: cdns-dsi: Reset the DCS write FIFO

2024-06-17 Thread Aradhya Bhatia
this reset. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 05d2f4cc50da..87fdd07ca0bc 100644 --- a/dr

Re: [PATCH] drm/tidss: Add drm_panic support

2024-06-17 Thread Aradhya Bhatia
Linux kernel panic occurs. > > Signed-off-by: Javier Martinez Canillas Reviewed-by: Aradhya Bhatia > --- > Tested on an AM625 BeaglePlay board by triggering a panic using the > `echo c > /proc/sysrq-trigger` command. > > drivers/gpu/drm/tidss/tidss_plane.c | 14 ++

Re: [PATCH v3 02/10] drm/bridge: cdns-dsi: Fix the phy_initialized variable

2024-06-17 Thread Aradhya Bhatia
Hi Dmitry, Thanks for reviewing the patches! On 17/06/24 17:29, Dmitry Baryshkov wrote: > On Mon, Jun 17, 2024 at 04:23:03PM GMT, Aradhya Bhatia wrote: >> Update the Phy initialized state to "not initialized" when the driver >> (and the hardware by extension) gets suspe

Re: [PATCH v3 02/10] drm/bridge: cdns-dsi: Fix the phy_initialized variable

2024-06-19 Thread Aradhya Bhatia
On 18/06/24 01:04, Dmitry Baryshkov wrote: > On Mon, 17 Jun 2024 at 17:16, Aradhya Bhatia wrote: >> >> Hi Dmitry, >> >> Thanks for reviewing the patches! >> >> On 17/06/24 17:29, Dmitry Baryshkov wrote: >>> On Mon, Jun 17, 2024 at 04:23:03P

[PATCH v4 01/11] drm/bridge: cdns-dsi: Fix OF node pointer

2024-06-22 Thread Aradhya Bhatia
bridge will make the function try to fetch the bridge for the cdns-dsi which is not what's required. Fix that. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Reviewed-by: Dmitry Baryshkov Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c

[PATCH v4 06/11] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

2024-06-22 Thread Aradhya Bhatia
cedure" in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Tested-by: Dominik Haller Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 13 - 1 file changed, 12

[PATCH v4 03/11] drm/bridge: cdns-dsi: Fix Phy _init() and _exit()

2024-06-22 Thread Aradhya Bhatia
Initialize the Phy during the cdns-dsi _resume(), and de-initialize it during the _suspend(). Also power-off the Phy from bridge_disable. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-c

[PATCH v4 00/11] drm/bridge: cdns-dsi: Fix the color-shift issue

2024-06-22 Thread Aradhya Bhatia
53051.1355825-1-a-bhat...@ti.com/ v2: https://lore.kernel.org/all/20240530093621.1925863-1-a-bhat...@ti.com/ v3: https://lore.kernel.org/all/20240617105311.1587489-1-a-bhat...@ti.com/ Aradhya Bhatia (11): drm/bridge: cdns-dsi: Fix OF node pointer drm/bridge: cdns-dsi: Move to devm_drm_of_get_bridge() drm/bridge:

[PATCH v4 08/11] drm/mipi-dsi: Add helper to find input format

2024-06-22 Thread Aradhya Bhatia
Add a helper API that can be used by the DSI hosts to find the required input bus format for the given output dsi pixel format. Reviewed-by: Dmitry Baryshkov Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_mipi_dsi.c | 37 ++ include/drm/drm_mipi_dsi.h

[PATCH v4 09/11] drm/bridge: cdns-dsi: Support atomic bridge APIs

2024-06-22 Thread Aradhya Bhatia
Change the existing (and deprecated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Reviewed-by: Dmitry Baryshkov Signed-off-by: Aradhya Bhatia --- .../gpu

[PATCH v4 10/11] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

2024-06-22 Thread Aradhya Bhatia
TC is also a source feeding the bridge, it should not be enabled before the bridges in the pipeline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_help

[PATCH v4 07/11] drm/bridge: cdns-dsi: Reset the DCS write FIFO

2024-06-22 Thread Aradhya Bhatia
[0]. Allow the DCS Write FIFO in the cdns-dsi controller to reset as a rule, before any DCS packet is transmitted to the DSI peripheral. [0]: Section 12.6.5.7.5.2: "Command Mode Settings" in TDA4VM Technical Reference Manual: https://www.ti.com/lit/zip/spruil1 Signed-off-by: Arad

[PATCH v4 02/11] drm/bridge: cdns-dsi: Move to devm_drm_of_get_bridge()

2024-06-22 Thread Aradhya Bhatia
Instead of manually finding the next bridge/panel, and maintaining the panel-bridge (in-case the next entity is a panel), switch to using the automatically managing devm_drm_of_get_bridge() API. Drop the drm_panel support completely from the driver while at it. Signed-off-by: Aradhya Bhatia

[PATCH v4 04/11] drm/bridge: cdns-dsi: Fix the link and phy init order

2024-06-22 Thread Aradhya Bhatia
; in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dr

[PATCH v4 05/11] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

2024-06-22 Thread Aradhya Bhatia
Allow the D-Phy config checks to use mode->clock instead of mode->crtc_clock during mode_valid checks, like everywhere else in the driver. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdn

[PATCH v4 11/11] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

2024-06-22 Thread Aradhya Bhatia
sable hooks to get cdns-dsi ready and running before the tidss videoport to get pass the color shift issues. [0]: See section 12.6.5.7.3 "Start-up Procedure" in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Signed-off-by: Aradhya Bhatia --- .../gpu/drm/bridge/cadence/cdn

Re: [PATCH v2 0/2] drm/bridge: tc358767: Fix DRM_BRIDGE_ATTACH_NO_CONNECTOR case

2024-06-22 Thread Aradhya Bhatia
On 17-Jun-24 13:41, Dmitry Baryshkov wrote: > On Mon, Jun 17, 2024 at 07:40:32AM GMT, Jan Kiszka wrote: >> On 16.02.24 15:57, Marek Vasut wrote: >>> On 2/16/24 10:10, Tomi Valkeinen wrote: Ok. Does anyone have a worry that these patches make the situation worse for the DSI case than it

Re: [PATCH v2 0/2] drm/bridge: tc358767: Fix DRM_BRIDGE_ATTACH_NO_CONNECTOR case

2024-06-24 Thread Aradhya Bhatia
On 22/06/24 17:49, Dmitry Baryshkov wrote: > On Sat, Jun 22, 2024 at 05:16:58PM GMT, Aradhya Bhatia wrote: >> >> >> On 17-Jun-24 13:41, Dmitry Baryshkov wrote: >>> On Mon, Jun 17, 2024 at 07:40:32AM GMT, Jan Kiszka wrote: >>>> On 16.02.24 15:57, Marek

[PATCH] drm/bridge: display-connector: Fix atomic_get_input_bus_fmt hook

2024-06-25 Thread Aradhya Bhatia
t one that should be fixed anyway. Fix this. Fixes: 7cd70656d128 ("drm/bridge: display-connector: implement bus fmts callbacks") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/display-connector.c | 40 +- 1 file changed, 1 insertion(+), 39 deletions(-) diff

Re: [PATCH] drm/bridge: display-connector: Fix atomic_get_input_bus_fmt hook

2024-06-26 Thread Aradhya Bhatia
On 25/06/24 19:46, Neil Armstrong wrote: > On 25/06/2024 11:50, Aradhya Bhatia wrote: >> The display-connector acts as a pass-through bridge. To truly reflect >> that, this bridge should accept the same input format, as it expects to >> output. That in turn should be

Re: [PATCH v4 03/11] drm/bridge: cdns-dsi: Fix Phy _init() and _exit()

2024-06-26 Thread Aradhya Bhatia
Hi Tomi, Thanks for reviewing the patches! On 26/06/24 15:55, Tomi Valkeinen wrote: > Hi, > > On 22/06/2024 14:09, Aradhya Bhatia wrote: >> Initialize the Phy during the cdns-dsi _resume(), and de-initialize it >> during the _suspend(). >> >> Also powe

Re: [PATCH v4 05/11] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

2024-06-26 Thread Aradhya Bhatia
On 26/06/24 16:17, Tomi Valkeinen wrote: > On 22/06/2024 14:09, Aradhya Bhatia wrote: >> Allow the D-Phy config checks to use mode->clock instead of >> mode->crtc_clock during mode_valid checks, like everywhere else in the >> driver. >> >> Fixes: fced5a36

Re: [PATCH 0/2] drm/bridge: sii902x: Crash fixes

2024-01-16 Thread Aradhya Bhatia
ted kernel boot on SK-AM62, SK-AM62-LP, SK-AM62A, and I couldn't reproduce the issue. The kernel booted fine every time. For the series, Reviewed-by: Aradhya Bhatia > > drivers/gpu/drm/bridge/sii902x.c | 42 > +++- > 1 file changed, 29 inser

Re: [PATCH] drm/panel: re-alphabetize the menu list

2023-12-07 Thread Aradhya Bhatia
Hi Randy, Thanks for the patch! On 07/12/23 11:52, Randy Dunlap wrote: > A few of the DRM_PANEL entries have become out of alphabetical order, > so move them around a bit to restore alpha order. > > Signed-off-by: Randy Dunlap > Cc: Neil Armstrong > Cc: Jessica Zhang > Cc: Sam Ravnborg > Cc:

Re: [PATCH] drm/panel: re-alphabetize the menu list

2023-12-08 Thread Aradhya Bhatia
On 07/12/23 22:28, Randy Dunlap wrote: > > > On 12/7/23 01:52, Aradhya Bhatia wrote: >> Hi Randy, >> >> Thanks for the patch! >> >> On 07/12/23 11:52, Randy Dunlap wrote: >>> A few of the DRM_PANEL entries have become out of alphabetical order

Re: [PATCH v2 0/2] drm/bridge: tc358767: Fix DRM_BRIDGE_ATTACH_NO_CONNECTOR case

2023-12-11 Thread Aradhya Bhatia
t; requires DSI to be up for the AUX transactions? > >  Tomi > >> Best regards, >> Alexander >> >>> Signed-off-by: Tomi Valkeinen >>> --- >>> Changes in v2: >>> - Update the format negotiation patch as discussed in >>> https:

Re: [PATCH v3 0/4] drm/tidss: Add OLDI bridge support

2024-09-09 Thread Aradhya Bhatia
On 09/09/24 15:20, Tomi Valkeinen wrote: > On 09/09/2024 12:31, Aradhya Bhatia wrote: >> Hi, >> >> Thank you, Francesco and Max, for testing and reporting this! >> >> On 09/09/24 13:45, Tomi Valkeinen wrote: >>> Hi, >>> >>> On 06/09/20

[PATCH v2 2/9] drm/bridge: cdns-dsi: Fix the phy_initialized variable

2024-05-30 Thread Aradhya Bhatia
Update the Phy initialized state to "not initialized" when the driver (and the hardware by extension) gets suspended. This will allow the Phy to get initialized again after resume. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia

[PATCH v2 3/9] drm/bridge: cdns-dsi: Fix the link and phy init order

2024-05-30 Thread Aradhya Bhatia
; in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dr

[PATCH v2 0/9] drm/bridge: cdns-dsi: Fix the color-shift issue

2024-05-30 Thread Aradhya Bhatia
ns-dsi and use pre_enable/post_disable APIs instead to do bridge enable/disable. Previous versions: v1: https://lore.kernel.org/all/20240511153051.1355825-1-a-bhat...@ti.com/ Aradhya Bhatia (9): drm/bridge: cdns-dsi: Fix OF node pointer drm/bridge: cdns-dsi: Fix the phy_initialized variable

[PATCH v2 1/9] drm/bridge: cdns-dsi: Fix OF node pointer

2024-05-30 Thread Aradhya Bhatia
Fix the OF node pointer passed to the of_drm_find_bridge() call to find the next bridge in the display chain. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 2 +- 1 file changed, 1 inser

[PATCH v2 5/9] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

2024-05-30 Thread Aradhya Bhatia
cedure" in J721E SoC TRM TRM Link: http://www.ti.com/lit/pdf/spruil1 Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-)

[PATCH v2 4/9] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

2024-05-30 Thread Aradhya Bhatia
Allow the D-Phy config checks to use mode->clock instead of mode->crtc_clock during mode_valid checks, like everywhere else in the driver. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdn

[PATCH v2 8/9] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

2024-05-30 Thread Aradhya Bhatia
TC is also a source feeding the bridge, it should not be enabled before the bridges in the pipeline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 70 ++

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