Replace kmalloc() followed by copy_from_user() with memdup_user() to
improve and simplify kfd_criu_restore_queue().
No functional changes intended.
Signed-off-by: Thorsten Blum
---
.../amd/amdkfd/kfd_process_queue_manager.c| 22 +--
1 file changed, 6 insertions(+), 16 deleti
Introduce a DRM interface for DRM clients to further restrict the
VRR Range within the panel supported VRR range on a per-commit
basis.
The goal is to give DRM client the ability to do frame-doubling/
ramping themselves, or to set lower static refresh rates for power
savings.
This is done through
On Thu, Sep 11, 2025 at 02:37:04PM +0300, Laurentiu Palcu wrote:
> DCIF is the i.MX94 Display Controller Interface which is used to
> drive a TFT LCD panel or connects to a display interface depending
> on the chip configuration.
>
> Signed-off-by: Laurentiu Palcu
> ---
> .../bindings/display/im
On Thu, Sep 11, 2025 at 02:37:06PM +0300, Laurentiu Palcu wrote:
> Since the BLK CTL registers, like the LVDS CSR, can be used to control the
> LVDS Display Bridge controllers, add 'ldb' child node to handle
> these use cases.
>
> Signed-off-by: Laurentiu Palcu
> ---
> .../bindings/clock/nxp,imx
Krzysztof,
On 8/21/25 3:47 AM, Krzysztof Kozlowski wrote:
On Wed, Aug 20, 2025 at 02:12:50PM -0300, Ariel D'Alessandro wrote:
Convert the existing text-based DT bindings for Mediatek MT8173 Video Processor
Unit to a YAML schema.
DT schema, not YAML. Don't say YAML at all, neither here nor in
When the system is powered off the kernel will call device_shutdown()
which will issue callbacks into PCI core to wake up a device and call
it's shutdown() callback. This will leave devices in ACPI D0 which can
cause some devices to misbehave with spurious wakeups and also leave some
devices on wh
On Tue, Sep 9, 2025 at 7:05 AM Thierry Reding wrote:
>
> On Sat, Sep 06, 2025 at 08:01:27PM -0500, Aaron Kling wrote:
> [...]
> > I should note that I have only actively tested this on gm20b and
> > gp10b. I am currently unable to get nouveau running on any gk20a
> > device I own. I am trying to t
There is a spelling mistake in a xe_gt_err error message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/xe/xe_guc_submit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c
b/drivers/gpu/drm/xe/xe_guc_submit.c
index a465594b61dc..
Sharp LQ079L1SX01 panel is a LCD panel working in dual video mode found in
Xiaomi Mi Pad (A0101).
Svyatoslav Ryhel (2):
dt-bindings: display: panel: document Sharp LQ079L1SX01 panel
drm/panel: Add Sharp LQ079L1SX01 support
.../display/panel/sharp,lq079l1sx01.yaml | 99
drivers
On Wed, 10 Sept 2025 at 15:21, Dave Stevenson
wrote:
>
> Hi Dmitry
>
> On Fri, 5 Sept 2025 at 17:51, Dmitry Baryshkov
> wrote:
> >
> > On Fri, Aug 15, 2025 at 06:11:57PM +0300, Dmitry Baryshkov wrote:
> > > On Sat, Jul 05, 2025 at 01:05:13PM +0300, Dmitry Baryshkov wrote:
> > > > Switch VC4 drive
Hi,
On 03/09/2025 19:17, Prabhakar wrote:
> From: Lad Prabhakar
>
> Add MIPI DSI support for the Renesas RZ/V2H(P) SoC. Compared to the
> RZ/G2L family, the RZ/V2H(P) requires dedicated D-PHY PLL programming,
> different clock configuration, and additional timing parameter handling.
> The driver
Hi Maxime,
On Wed, 10 Sep 2025 09:52:21 +0200
Maxime Ripard wrote:
> On Mon, Sep 08, 2025 at 03:49:01PM +0200, Luca Ceresoli wrote:
> > Hello Maxime,
> >
> > On Wed, 20 Aug 2025 13:13:02 +0200
> > Luca Ceresoli wrote:
> >
> > > > > + /*
> > > > > + * sn65dsi83_atomic_disable() shou
Declare which infoframes are supported via the .hdmi_write_infoframe()
interface. Return -EOPNOTSUPP if the driver is asked to write or clear
the unsupported InfoFrame.
Reviewed-by: Liu Ying
Acked-by: Daniel Stone
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/ite-it6263.c | 5
On 02/09/2025 21:06, Chia-I Wu wrote:
> Userspace relies on the ring field of gpu_scheduler tracepoints to
> identify a drm_gpu_scheduler. The value of the ring field is taken from
> sched->name.
>
> Because we typically have multiple schedulers running in parallel in
> each process, assign uniqu
Il 11/09/25 17:09, Ariel D'Alessandro ha scritto:
Convert the existing text-based DT bindings for Mediatek MT8173 Video
Processor Unit to a DT schema.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: AngeloGioacchino Del Regno
---
.../bindings/media/mediatek,mt8173-vpu.yaml | 74 +++
Il 11/09/25 17:09, Ariel D'Alessandro ha scritto:
Convert the existing text-based DT bindings for Dialog Semiconductor DA9211
Voltage Regulators family to a DT schema. Examples are simplified, as these
are all equal.
Signed-off-by: Ariel D'Alessandro
---
.../devicetree/bindings/regulator/da92
Il 11/09/25 17:09, Ariel D'Alessandro ha scritto:
The mediatek,mt8173-thermal device tree binding schema doesn't allow
regulator supplies like the ones defined in mt8173-elm.dtsi. Drop these as
the associated driver doesn't implement them either.
Signed-off-by: Ariel D'Alessandro
Reviewed-by:
Il 11/09/25 17:09, Ariel D'Alessandro ha scritto:
Convert the existing text-based DT bindings for MediaTek MT8173 Media Data
Path to a DT schema.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: AngeloGioacchino Del Regno
---
.../bindings/media/mediatek,mt8173-mdp.yaml | 169 +++
Il 11/09/25 17:09, Ariel D'Alessandro ha scritto:
According to the mediatek,mt8173-pinctrl device tree binding schema, the
pinctrl node names should match pattern 'pins$'. Fix this.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Linus Walleij
Acked-by: Rob Herring (Arm)
Reviewed-by: AngeloG
Il 11/09/25 17:09, Ariel D'Alessandro ha scritto:
Current, the DT bindings for MediaTek's MT65xx Pin controller is missing
the gpio-line-names property, add it to the associated schema.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: AngeloGioacchino Del Regno
---
.../devicetree/bindings
On Thu, Sep 11, 2025 at 06:57:40PM -0400, Lyude Paul wrote:
> In order to implement the gem export callback, we need a type to represent
> struct dma_buf. So - this commit introduces a set of stub bindings for
> dma_buf. These bindings provide a ref-counted DmaBuf object, but don't
> currently impl
On 12.09.25 00:57, Lyude Paul wrote:
> In order to implement the gem export callback, we need a type to represent
> struct dma_buf. So - this commit introduces a set of stub bindings for
> dma_buf. These bindings provide a ref-counted DmaBuf object, but don't
> currently implement any functionality
On 9/12/25 4:15 AM, Xiangxu Yin wrote:
>
> On 9/12/2025 9:24 AM, Dmitry Baryshkov wrote:
>> On Thu, Sep 11, 2025 at 10:55:01PM +0800, Xiangxu Yin wrote:
>>> Introduce QCS615 hardware-specific configuration for DP PHY mode,
>>> including register offsets, initialization tables, voltage swing
>>> an
Il 12/09/25 10:27, Chen-Yu Tsai ha scritto:
On Fri, Sep 12, 2025 at 2:06 PM Krzysztof Kozlowski wrote:
On Thu, Sep 11, 2025 at 12:09:50PM -0300, Ariel D'Alessandro wrote:
Convert the existing text-based DT bindings for MediaTek MT8173 Media Data
Path to a DT schema.
Signed-off-by: Ariel D'Al
Il 11/09/25 17:10, Ariel D'Alessandro ha scritto:
Convert the existing text-based DT bindings for MELFAS MIP4 Touchscreen
controller to a DT schema.
Signed-off-by: Ariel D'Alessandro
Reviewed-by: Rob Herring (Arm)
Reviewed-by: AngeloGioacchino Del Regno
On Thu, Sep 11, 2025, at 22:24, Nathan Chancellor wrote:
>
> Cc: sta...@vger.kernel.org
> Link:
> https://github.com/llvm/llvm-project/commit/055bfc027141bbfafd51fb43f5ab81ba3b480649
>
> [1]
> Link: https://llvm.org/pr143908 [2]
> Signed-off-by: Nathan Chancellor
Acked-by: Arnd Bergmann
In order to move the panel/bridge parsing and attachmenet to the
Analogix side, add component struct drm_bridge *next_bridge to
platform data struct analogix_dp_plat_data.
The movement makes sense because the panel/bridge should logically
be positioned behind the Analogix bridge in the display pip
The &exynos_dp_device.connector is assigned in exynos_dp_bridge_attach()
but never used. It should make sense to remove it.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
---
Changes in v5:
- Fix the 'drm/bridge' to 'drm/exynos' in commit message.
---
drivers/gpu/drm/exynos/exynos_dp
If there is neither a panel nor a bridge, the display timing can be
parsed from the display-timings node under the dp node.
Adding a legacy bridge to parse the display-timings node would get
rid of &analogix_dp_plat_data.get_modes() and make the codes more
consistent.
Signed-off-by: Damon Ding
-
Use &analogix_dp_plat_data.bridge instead of &exynos_dp_device.ptn_bridge
directly.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
--
Changes in v3:
- Fix the typographical error for &dp->plat_data.bridge.
Changes in v4:
- Rename the &analogix_dp_plat_data.bridge to
&analogix_d
The callback &analogix_dp_plat_data.get_modes() is not implemented
by either Rockchip side or Exynos side.
Signed-off-by: Damon Ding
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 ---
include/drm/bridge/analogix_dp.h | 2 --
2 files changed, 5 deletions(-)
diff --
The &analogix_dp_plat_data.skip_connector related check can be replaced
by &analogix_dp_plat_data.bridge.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
--
Changes in v3:
- Squash the Exynos side commit and the Analogix side commit together.
Changes in v4:
- Rename the &analogix_
Use the tap instead of the space for &analogix_dp_device.aux and
&analogix_dp_device.force_hpd.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/
Apply analogix_dp_finish_probe() in order to move the panel/bridge
parsing from Rockchip side to the Analogix side.
Signed-off-by: Damon Ding
Reviewed-by: Dmitry Baryshkov
---
Changes in v4:
- Rename analogix_dp_find_panel_or_bridge() to
analogix_dp_finish_probe().
Changes in v5:
- Remove D
The analogix_dp_unbind() should be balanced with analogix_dp_bind().
There are no bridge enabling and panel preparing in analogix_dp_bind(),
so it should be reasonable to remove the bridge disabing and panel
unpreparing in analogix_dp_unbind().
Signed-off-by: Damon Ding
---
drivers/gpu/drm/bridg
Il 04/08/25 11:02, AngeloGioacchino Del Regno ha scritto:
Il 24/07/25 11:14, Krzysztof Kozlowski ha scritto:
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
The dual and triple core jpeg encoder and decoder (respectively)
on MT8195 are far apart: the only way to have this to make sense
i
Apply drm_bridge_connector helper for Analogix DP driver.
The following changes have been made:
- Apply drm_bridge_connector helper to get rid of &drm_connector_funcs
and &drm_connector_helper_funcs.
- Remove unnecessary parameter struct drm_connector* for callback
&analogix_dp_plat_data.attac
On 12.09.25 06:49, Balbir Singh wrote:
On 9/11/25 22:52, David Hildenbrand wrote:
On 11.09.25 14:49, Balbir Singh wrote:
On 9/11/25 21:45, David Hildenbrand wrote:
On 08.09.25 02:04, Balbir Singh wrote:
Add routines to support allocation of large order zone device folios
and helper functions
Il 08/08/25 12:12, Louis-Alexis Eyraud ha scritto:
This is a respin of AngeloGioacchino Del Regno's patch series, that adds
the support of HDMIv2 and DDCv2 for MT8188 and MT8195 in mediatek-drm.
CK, can we please finally get this upstream? It's been months now...
Regards,
Angelo
Changes in
On Thu, Sep 11, 2025 at 10:55:03PM +0800, Xiangxu Yin wrote:
> Move reset configuration to be managed via qmp_phy_cfg instead of
> hardcoded lists. This enables per-PHY customization and simplifies
> initialization logic for USB-only and USB/DP switchable PHYs.
>
> Signed-off-by: Xiangxu Yin
> --
September 9, 2025 at 2:27 PM, "Maxime Ripard" mailto:mrip...@kernel.org?to=%22Maxime%20Ripard%22%20%3Cmripard%40kernel.org%3E
> wrote:
>
> The tilcdc atomic_check implementation uses the deprecated
> drm_atomic_get_existing_crtc_state() helper.
>
> This hook is called as part of the global ato
On Thu, Sep 11, 2025 at 05:47:57PM +0200, Miguel Gazquez wrote:
> Le 11/09/2025 à 17:40, Miguel Gazquez a écrit :
> > Le 11/09/2025 à 15:09, Dmitry Baryshkov a écrit :
> > > On Thu, Sep 11, 2025 at 02:49:59PM +0200, Miguel Gazquez wrote:
> > > >
> > > >
> > > > Le 11/09/2025 à 11:50, Maxime Ripar
On Thu, Sep 11, 2025 at 10:55:08PM +0800, Xiangxu Yin wrote:
> Introduce mutual exclusion between USB and DP PHY modes to prevent
> simultaneous activation.
Describe the problem that you are trying to solve first.
>
> Signed-off-by: Xiangxu Yin
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
September 9, 2025 at 2:27 PM, "Maxime Ripard" mailto:mrip...@kernel.org?to=%22Maxime%20Ripard%22%20%3Cmripard%40kernel.org%3E
> wrote:
>
> In the tilcdc_crtc_atomic_check(), the tilcdc driver hand-crafts its own
> implementation of drm_atomic_helper_check_crtc_primary_plane(). And it
> does so b
Hi Marek,
On 9/12/2025 5:56 PM, Marek Szyprowski wrote:
On 12.09.2025 10:58, Damon Ding wrote:
PATCH 1 is a small format optimization for struct analogid_dp_device.
PATCH 2 is to perform mode setting in &drm_bridge_funcs.atomic_enable.
PATCH 3-9 are preparations for apply drm_bridge_connector h
On Thu, Sep 11, 2025 at 10:55:10PM +0800, Xiangxu Yin wrote:
> QCS615 platform requires non-default logical-to-physical lane mapping due
> to its unique hardware routing. Unlike the standard mapping sequence
> <0 1 2 3>, QCS615 uses <3 2 0 1>, which necessitates explicit
> configuration via the dat
On Fri, Sep 12, 2025 at 04:58:36PM +0800, Damon Ding wrote:
> If there is neither a panel nor a bridge, the display timing can be
> parsed from the display-timings node under the dp node.
>
> Adding a legacy bridge to parse the display-timings node would get
> rid of &analogix_dp_plat_data.get_mod
On Thu, Sep 11, 2025 at 10:55:05PM +0800, Xiangxu Yin wrote:
> Add USB/DP switchable PHY clock registration and DT parsing for DP offsets.
> Extend qmp_usbc_register_clocks and clock provider logic to support both
> USB and DP instances.
>
> Signed-off-by: Xiangxu Yin
> ---
> drivers/phy/qualcom
On Friday, 12 September 2025 06:48:17 Central European Summer Time Chia-I Wu
wrote:
> On Fri, Sep 5, 2025 at 3:24 AM Nicolas Frattaroli
> wrote:
> >
> > The MT8196 SoC uses an embedded MCU to control frequencies and power of
> > the GPU. This controller is referred to as "GPUEB".
> >
> > It commu
On Fri, Sep 12, 2025 at 04:58:40PM +0800, Damon Ding wrote:
> Since the panel/bridge should logically be positioned behind the
> Analogix bridge in the display pipeline, it makes sense to handle
> the panel/bridge parsing on the Analogix side. Therefore, we add
> a new API analogix_dp_finish_probe(
On Fri, Sep 12, 2025 at 04:58:42PM +0800, Damon Ding wrote:
> There may be the panel or bridge after &analogix_dp_device.bridge.
> Add rockchip_dp_attach() to support the next bridge attachment for
> the Rockchip side.
>
> Signed-off-by: Damon Ding
> ---
> .../gpu/drm/rockchip/analogix_dp-rockch
On Fri, Sep 12, 2025 at 04:58:29PM +0800, Damon Ding wrote:
> PATCH 1 is a small format optimization for struct analogid_dp_device.
> PATCH 2 is to perform mode setting in &drm_bridge_funcs.atomic_enable.
> PATCH 3-9 are preparations for apply drm_bridge_connector helper.
> PATCH 10 is to apply the
On Thu, Sep 11, 2025 at 05:47:57PM +0200, Miguel Gazquez wrote:
>
>
> Le 11/09/2025 à 17:40, Miguel Gazquez a écrit :
> >
> >
> > Le 11/09/2025 à 15:09, Dmitry Baryshkov a écrit :
> > > On Thu, Sep 11, 2025 at 02:49:59PM +0200, Miguel Gazquez wrote:
> > > >
> > > >
> > > > Le 11/09/2025 à 11:
On Fri, Sep 12, 2025 at 09:23:05AM +0800, Yongbang Shi wrote:
>
> > On Thu, Sep 11, 2025 at 05:32:40PM +0800, Yongbang Shi wrote:
> > > > On Thu, Aug 14, 2025 at 08:19:41PM +0800, Yongbang Shi wrote:
> > > > > > On Wed, Aug 13, 2025 at 05:42:29PM +0800, Yongbang Shi wrote:
> > > > > > > From: Baih
On Fri, Sep 12, 2025 at 04:58:44PM +0800, Damon Ding wrote:
> The &drm_panel_funcs.enable() and &drm_panel_funcs.disable() mainly
> help turn on/off the backlight to make the image visible, and the
> backlight operations are even needless if drm_panel_of_backlight() or
> drm_panel_dp_aux_backlight(
On Thu, Sep 11, 2025 at 06:37:18PM +0100, Dave Stevenson wrote:
> On Wed, 10 Sept 2025 at 15:21, Dave Stevenson
> wrote:
> >
> > Hi Dmitry
> >
> > On Fri, 5 Sept 2025 at 17:51, Dmitry Baryshkov
> > wrote:
> > >
> > > On Fri, Aug 15, 2025 at 06:11:57PM +0300, Dmitry Baryshkov wrote:
> > > > On Sat
| 1 +
2 files changed, 3 insertions(+)
---
base-commit: 590b221ed4256fd6c34d3dea77aa5bd6e741bbc1
change-id: 20250912-add-dp-controller-support-for-sm6150-d7db03d0062f
Best regards,
--
Xiangxu Yin
On Mon, Sep 08, 2025 at 02:01:34PM -0700, Mukesh R wrote:
> On 9/6/25 04:36, Greg KH wrote:
> > On Fri, Sep 05, 2025 at 06:09:52PM -0700, Mukesh Rathor wrote:
> >> With CONFIG_HYPERV and CONFIG_HYPERV_VMBUS separated, change CONFIG_HYPERV
> >> to bool from tristate. CONFIG_HYPERV now becomes the co
On Fri, Sep 12, 2025 at 07:39:17PM +0800, Xiangxu Yin wrote:
> Add support for SM6150 DisplayPort controller, which shares base offset
> and configuration with SC7180. While SM6150 lacks some SC7180 features
> (e.g. HBR3, MST), current msm_dp_desc_sc7180 data is sufficient. Listing it
SM6150 suppo
On Fri, Sep 12, 2025 at 04:58:39PM +0800, Damon Ding wrote:
> Apply drm_bridge_connector helper for Analogix DP driver.
>
> The following changes have been made:
> - Apply drm_bridge_connector helper to get rid of &drm_connector_funcs
> and &drm_connector_helper_funcs.
> - Remove unnecessary par
On 9/12/2025 6:19 PM, Dmitry Baryshkov wrote:
> On Thu, Sep 11, 2025 at 10:55:05PM +0800, Xiangxu Yin wrote:
>> Add USB/DP switchable PHY clock registration and DT parsing for DP offsets.
>> Extend qmp_usbc_register_clocks and clock provider logic to support both
>> USB and DP instances.
>>
>> Si
On 9/12/2025 6:31 PM, Dmitry Baryshkov wrote:
> On Thu, Sep 11, 2025 at 10:55:07PM +0800, Xiangxu Yin wrote:
>> Define qmp_usbc_dp_phy_ops struct to support DP mode on USB/DP
>> switchable PHYs.
>>
>> Signed-off-by: Xiangxu Yin
>> ---
>> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 192
>> ++
On 9/12/2025 6:32 PM, Dmitry Baryshkov wrote:
> On Thu, Sep 11, 2025 at 10:55:08PM +0800, Xiangxu Yin wrote:
>> Introduce mutual exclusion between USB and DP PHY modes to prevent
>> simultaneous activation.
> Describe the problem that you are trying to solve first.
Ok.
>> Signed-off-by: Xiang
On 9/12/2025 6:39 PM, Dmitry Baryshkov wrote:
> On Thu, Sep 11, 2025 at 10:55:09PM +0800, Xiangxu Yin wrote:
>> Since max_dp_lanes and max_dp_link_rate are link-specific parameters, move
>> their parsing from dp_panel to dp_link for better separation of concerns.
>>
>> Signed-off-by: Xiangxu Yin
On Fri, Sep 12, 2025 at 08:00:14PM +0800, Xiangxu Yin wrote:
>
> On 9/12/2025 6:19 PM, Dmitry Baryshkov wrote:
> > On Thu, Sep 11, 2025 at 10:55:05PM +0800, Xiangxu Yin wrote:
> >> Add USB/DP switchable PHY clock registration and DT parsing for DP offsets.
> >> Extend qmp_usbc_register_clocks and
On Fri, Sep 12, 2025 at 07:54:31PM +0800, Xiangxu Yin wrote:
>
> On 9/12/2025 7:46 PM, Dmitry Baryshkov wrote:
> > On Fri, Sep 12, 2025 at 07:39:16PM +0800, Xiangxu Yin wrote:
> >> Add DisplayPort controller for Qualcomm SM6150 SoC.
> >> SM6150 shares the same configuration as SM8350, its hardware
On Tue, Sep 09, 2025 at 01:21:19PM +0200, Konrad Dybcio wrote:
> On 9/9/25 1:16 PM, Dmitry Baryshkov wrote:
> > On Tue, Sep 09, 2025 at 09:14:49AM +0200, Neil Armstrong wrote:
> >> On 08/09/2025 23:14, Dmitry Baryshkov wrote:
> >>> On Mon, Sep 08, 2025 at 03:04:20PM +0200, Neil Armstrong wrote:
> >
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
The GCE Mailbox needs only one clock and the clock-names can be
used only by the driver (which, for instance, does not use it),
and this is true for all of the currently supported MediaTek SoCs.
Stop requiring to specify clock-names on al
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
Both clocks and clock-names are missing (a lot of) entries: add
all the used audio clocks and their description and also fix the
example node.
You forgot to fix the example node.
Matthias
Signed-off-by: AngeloGioacchino Del Regno
-
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
Add a compatible for the General Purpose Timer (GPT) found on the
MediaTek Helio X10 MT6795 SoC which is fully compatible with the
one found in MT6577.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Matthias Brugger
---
D
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
The node names for "pmic", "regulators", "rtc", and "keys" are
dictated by the PMIC MFD binding: change those to adhere to it.
Fixes: aef783f3e0ca ("arm64: dts: mediatek: Add MT6331 PMIC devicetree")
Signed-off-by: AngeloGioacchino Del Re
Commit 6cc44e9618f03f ("drm: Add directive to format code in comment")
fixes original Sphinx indentation warning as introduced in
471920ce25d50b ("drm/gpuvm: Add locking helpers"), by means of using
code-block:: directive. It semantically conflicts with earlier
bb324f85f72284 ("drm/gpuvm: Wrap drm_
This patch series brings the notion of JM contexts into Panfrost.
UM will be able to create contexts, get a handle for them and attach
it to a job submission. Contexts describe basic HW resource assignment
to jobs, but at the moment that includes priorities only.
There's a MR for a Mesa commit ser
From: Boris Brezillon
For DebugFS builds, create a filesystem knob that, for every single open
file of the Panfrost DRM device, shows its command name information and
PID (when applicable), and all of its existing JM contexts.
For every context, show the DRM scheduler priority value of all of it
On 12/09/2025 11:00, AngeloGioacchino Del Regno wrote:
> Il 04/08/25 11:02, AngeloGioacchino Del Regno ha scritto:
>> Il 24/07/25 11:14, Krzysztof Kozlowski ha scritto:
>>> On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
The dual and triple core jpeg encoder and decoder (respectively)
>
On 12/09/2025 10:27, Chen-Yu Tsai wrote:
>>> +properties:
>>> + compatible:
>>> +oneOf:
>>> + - enum:
>>> + - mediatek,mt8173-mdp-rdma
>>> + - mediatek,mt8173-mdp-rsz
>>> + - mediatek,mt8173-mdp-wdma
>>> + - mediatek,mt8173-mdp-wrot
>>
>> Why there is n
From: Boris Brezillon
Minor revision of the driver must be bumped because this expands the
uAPI. On top of that, let UM know about the available priorities so that
they can create contexts with legal priority values.
Signed-off-by: Boris Brezillon
Signed-off-by: Adrián Larumbe
---
drivers/gpu
From: Boris Brezillon
A JM context describes user-requested priorities for the JM queues.
Context creation leads to the initialization of scheduling entities of
the same priority for all the device's job slots.
Until context creation and destruction are exposed to UM, all issued
jobs shall be b
On 9/12/25 2:33 AM, Chuanyu Tseng wrote:
Introduce a DRM interface for DRM clients to further restrict the
VRR Range within the panel supported VRR range on a per-commit
basis.
The goal is to give DRM client the ability to do frame-doubling/
ramping themselves, or to set lower static refresh rat
On 25/07/2025 12:52, Fei Shao wrote:
On Thu, Jul 24, 2025 at 5:49 PM AngeloGioacchino Del Regno
wrote:
The "M4U" IOMMU requires a handle to the infracfg to switch to
the 4gb/pae addressing mode: add it.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Fei Shao
Applied thanks
On 25/07/2025 12:56, Fei Shao wrote:
On Thu, Jul 24, 2025 at 5:48 PM AngeloGioacchino Del Regno
wrote:
Change the pinctrl node names to adhere to the binding: the main
nodes are now named like "uart0-pins" and the children "pins-bus".
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
All of the I2C nodes in this devicetree has a bogus "id" property,
which was probably specifying the I2C bus number.
This property was never parsed and never used - and besides, it
also gives dtbs_check warnings: remove it from all i2c no
On Thu, Sep 11, 2025 at 12:09:52PM -0300, Ariel D'Alessandro wrote:
> Convert the existing text-based DT bindings for Marvell 8897/8997
> (sd8897/sd8997) bluetooth devices controller to a DT schema.
>
> While here:
>
> * bindings for "usb1286,204e" (USB interface) are dropped from the DT
> sche
Add DisplayPort controller for Qualcomm SM6150 SoC.
SM6150 shares the same configuration as SM8350, its hardware capabilities
differ about HBR3. Explicitly listing it ensures clarity and avoids
potential issues if SM8350 support evolves in the future.
Signed-off-by: Xiangxu Yin
---
Documentation
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
Add pinctrl nodes for the MicroSD slot on mmc1 and SDIO Controller
on mmc2 and assign those to the respective controller nodes.
This makes sure that all of the pins are muxed in the right state
and with the right pullup/down(s) before tryi
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
The PCIe TPHY is under the soc bus, which provides MMIO, and all
nodes under that must use the bus, otherwise those would clearly
be out of place.
Add ranges to the PCIe tphy and assign the address to the main
node to silence a dtbs_check
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
The binding wants the node to be named "i2c-number", alternatively
"i2c@address", but those are named "i2c-gpio-number" instead.
Rename those to i2c-0, i2c-1 to adhere to the binding and suppress
dtbs_check warnings.
Signed-off-by: Angel
On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
Change the latch-ck value from 0x14 to 4: as only bits [0-3] are
actually used, the final value that gets written to the register
field for DAT_LATCH_CK_SEL is just 0x4.
This also fixes dtbs_check warnings.
Fixes: 5a65dcccf483 ("arm64: d
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
Being this an interrupt controller, the binding forbids to use
interrupts-extended and wants an `interrupts` property instead.
Since this interrupt controller's parent is on the GPIO controller
set it as interrupt-parent and change interr
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
Not all of the kukui machines have got a real DSI panel, infact,
some of those have got a DSI to eDP bridge instead: this means
that the address and size cells are necessary in the first case
but unnecessary in the latter.
Instead of addi
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
Add the missing DBVDD and LDO1-IN power supplies to the codec
node as both RT5682i and RT5682s require those.
This commit only fixes a dtbs_check warning but doesn't produce
any functional changes because the VIO18 LDO is already powered
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
All of the MT6360 regulator nodes were wrong and would not probe
because the regulator names are supposed to be lower case, but
they are upper case in this devicetree.
Change all nodes to be lower case to get working regulators.
Fixes: 9
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
This devicetree contained only the SoC compatible but lacked the
machine specific one: add a "mediatek,mt8516-pumpkin" compatible
to the list to fix dtbs_check warnings.
Fixes: 9983822c8cf9 ("arm64: dts: mediatek: add pumpkin board dts")
On 25/07/2025 16:57, Lukas Zapolskas wrote:
From: Adrián Larumbe
The sampler aggregates counter and set requests coming from userspace
and mediates interactions with the FW interface, to ensure that user
sessions cannot override the global configuration.
From the top-level interface, the samp
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
Move the VBAT supply to mt8195-cherry-tomato-{r1,r2} as this power
supply is named like that only for the Realtek RT5682i codec.
Signed-off-by: AngeloGioacchino Del Regno
Applied, thanks
---
arch/arm64/boot/dts/mediatek/mt8195-che
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
There is no need to specify #address-cells and #size-cells in a
node that has only one non-addressable subnode, and this is the
case of the flash@0 node in this devicetree, as it has only one
"partitions" subnode.
Remove those to suppress
Hello Raphael,
Thanks for this patch.
On Thu, Jul 17, 2025 at 09:15:33PM +0200, Raphael Gallais-Pou wrote:
> Enhance the probing sequence by using the ports property of the
> display-subsystem node.
>
> That done, it becomes possible to handle the display-substem node
> outside of the soc node w
Convert the limited MIPI clock calculations to a full range of settings
based on math including H/W limitation validation.
Since the required DSI division setting must be specified from external
sources before calculations, expose a new API to set it.
Signed-off-by: Chris Brandt
Signed-off-by: hi
Hi,
On Fri, Sep 12, 2025 at 6:11 AM Zhijian Yan
wrote:
>
> Signed-off-by: Zhijian Yan
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
Please provide the EDID in the commit message. See nearly all recent
commits to this file. Thanks!
-Doug
On 24/07/2025 10:39, AngeloGioacchino Del Regno wrote:
Fix the pinctrl node names to adhere to the bindings, as the main
pin node is supposed to be named like "uart0-pins" and the pinmux
node named like "pins-bus".
Signed-off-by: AngeloGioacchino Del Regno
Applied, thanks
---
.../medi
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