On 22/05/2025 13:34, Christian König wrote:
On 5/22/25 14:20, Philipp Stanner wrote:
On Thu, 2025-05-22 at 14:06 +0200, Christian König wrote:
On 5/22/25 13:25, Philipp Stanner wrote:
dma_fence_is_signaled_locked(), which is used in
nouveau_fence_context_kill(), can signal fences below the s
On Thu, May 22, 2025 at 02:34:33PM +0200, Christian König wrote:
> See all the functions inside include/linux/dma-fence.h can be used by
> everybody. It's basically the public interface of the dma_fence object.
As you write below, in certain cases it is valid to call this from drivers, so
it's no
On Thu, May 22, 2025 at 01:00:36PM +0300, Jani Nikula wrote:
> Add a helper to wrap OF-specific calls in drm_panel_add_follower() in
> preparation for adding an ACPI equivalent in the future. No functional
> changes.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_panel.c | 23 +++
Hi Wolfram,
Thank you for the patch.
On Thu, May 22, 2025 at 12:34:44PM +0200, Wolfram Sang wrote:
> Not RCAR, but R-Car.
>
> Signed-off-by: Wolfram Sang
> Reviewed-by: Kieran Bingham
> Reviewed-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/renesas/rcar-du/r
On 2025-05-22 03:57, Pekka Paalanen wrote:
> On Wed, 21 May 2025 15:48:00 -0400
> Harry Wentland wrote:
>
>> On 2025-05-17 07:51, Xaver Hugl wrote:
>>> Am Do., 15. Mai 2025 um 22:00 Uhr schrieb Leandro Ribeiro
>>> :
On 5/15/25 15:39, Daniel Stone wrote:
> Hi,
>
On 22/05/2025 14:41, Christian König wrote:
Since we already iterated over the xarray we know at which index the new
entry should be stored. So instead of using xa_alloc use xa_store and
write into the index directly.
Signed-off-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c
On Thu, 22 May 2025 10:03:20 -0400
Hugo Villeneuve wrote:
> From: Hugo Villeneuve
>
> Hello,
> this patch series add support for sending MIPI DSI command packets to the
> Renesas RZ/G2L MIPI DSI driver.
>
> Tested on a custom board with a SolidRun RZ/G2L SOM, with two different LCD
> panels us
On 5/22/25 15:43, Philipp Stanner wrote:
>>
>> Well there is no need to implement it, but when it is implemented the
>> caller *must* call it when polling.
>
> I don't understand. Please elaborate on that a bit more. If there's no
> need to implement it, then why can't one have a
> __dma_fence_is_
On Thu, 22 May 2025 09:54:50 -0400
Harry Wentland wrote:
> On 2025-05-22 09:49, Simon Ser wrote:
> > On Thursday, May 22nd, 2025 at 15:28, Harry Wentland
> > wrote:
> >
> What we should
> do is reject YCbCr-type buffers with the color pipeline until we
> implement support for
On Thu, 2025-05-22 at 14:37 +0100, Tvrtko Ursulin wrote:
>
> On 22/05/2025 09:27, Philipp Stanner wrote:
> > From: Philipp Stanner
> >
> > The GPU scheduler currently does not ensure that its pending_list
> > is
> > empty before performing various other teardown tasks in
> > drm_sched_fini().
>
On 5/22/25 14:20, Philipp Stanner wrote:
> On Thu, 2025-05-22 at 14:06 +0200, Christian König wrote:
>> On 5/22/25 13:25, Philipp Stanner wrote:
>>> dma_fence_is_signaled_locked(), which is used in
>>> nouveau_fence_context_kill(), can signal fences below the surface
>>> through a callback.
>>>
>>>
On Thu, May 22, 2025 at 09:38:34AM +0200, neil.armstr...@linaro.org wrote:
> On 20/05/2025 22:44, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > Change the MSM HDMI driver to use generic PHY subsystem. Moving PHY
> > drivers allows better code sharing with the rest of the PHY system.
On 5/22/25 14:57, Tvrtko Ursulin wrote:
>
> On 22/05/2025 13:34, Christian König wrote:
>> On 5/22/25 14:20, Philipp Stanner wrote:
>>> On Thu, 2025-05-22 at 14:06 +0200, Christian König wrote:
On 5/22/25 13:25, Philipp Stanner wrote:
> dma_fence_is_signaled_locked(), which is used in
>>>
On Thu, May 22, 2025 at 03:05:02PM +0200, Christian König wrote:
> E.g. when you don't know the implementation side use the defined API and
> don't mess with the internals. If you do know the implementation side then
> it's valid that you check the internals.
I assume you meant this as "botherin
Sometimes drivers need to be able to submit multiple jobs which depend on
each other to different schedulers at the same time, but using
drm_sched_job_add_dependency() can't fail any more after the first job is
initialized.
This function preallocate memory for dependency slots so that no ENOMEM
ca
On Thursday, May 22nd, 2025 at 15:28, Harry Wentland
wrote:
> > > What we should
> > > do is reject YCbCr-type buffers with the color pipeline until we
> > > implement support for COLOR_ENCODING and COLOR_RANGE as a new
> > > CSC colorop.
> >
> > Rejecting is fine, but is implementing COLOR_ENC
On 2025-05-22 09:49, Simon Ser wrote:
> On Thursday, May 22nd, 2025 at 15:28, Harry Wentland
> wrote:
>
What we should
do is reject YCbCr-type buffers with the color pipeline until we
implement support for COLOR_ENCODING and COLOR_RANGE as a new
CSC colorop.
>>>
>>> Reject
On Thu, May 22, 2025 at 04:52:13PM +1000, Dave Airlie wrote:
From: Dave Airlie
This uses the new accessors to avoid touch iosys_map internals.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 2 +-
drivers/gpu/drm/xe/xe_bo.c | 8
drivers/g
Hi
Am 22.05.25 um 15:34 schrieb Lucas De Marchi:
[...]
We should encourage users to the other helpers for interacting with
iosys-map structures instead of decoding them manually. OTOH there
are cases where decoding them by hand is clearly better. I'd suggest
to prefix the new helpers with __
On Thu, May 22, 2025 at 04:52:09PM +1000, Dave Airlie wrote:
Hey iosys_map users :)
I fell down a bit of a refactor hole today, it was just random and
sometimes you just have to let these things run their course.
I noticed iosys_map has a 7-byte hole in a 16-byte structure, and
it gets embedded
On Thu, 2025-05-22 at 15:06 +0100, Tvrtko Ursulin wrote:
>
> On 22/05/2025 09:27, Philipp Stanner wrote:
> > The drm_gpu_scheduler now supports a callback to help
> > drm_sched_fini()
> > avoid memory leaks. This callback instructs the driver to signal
> > all
> > pending hardware fences.
> >
> >
On Wed, May 21, 2025 at 04:22:16PM +0200, Luca Ceresoli wrote:
> Hello Maxime, Shawn, Liu, all,
>
> On Fri, 09 May 2025 15:53:26 +0200
> Luca Ceresoli wrote:
>
> > devm_drm_bridge_alloc() [0] is the new API to allocate and initialize a DRM
> > bridge, and the only one supported from now on. It i
On 5/22/25 15:50, Danilo Krummrich wrote:
> On Thu, May 22, 2025 at 03:05:02PM +0200, Christian König wrote:
>> E.g. when you don't know the implementation side use the defined API and
>> don't mess with the internals. If you do know the implementation side then
>> it's valid that you check the i
Hi Christian
> On 22 May 2025, at 05:44, Christian König wrote:
>
> On 5/21/25 22:29, Lyude Paul wrote:
>> From: Asahi Lina
>>
>> This is just for basic usage in the DRM shmem abstractions for implied
>> locking, not intended as a full DMA Reservation abstraction yet.
>
> Looks good in genera
On 5/22/25 14:59, Danilo Krummrich wrote:
> On Thu, May 22, 2025 at 02:34:33PM +0200, Christian König wrote:
>> See all the functions inside include/linux/dma-fence.h can be used by
>> everybody. It's basically the public interface of the dma_fence object.
>
> As you write below, in certain cases
On Wed, May 21, 2025 at 06:10:59PM -0700, Doug Anderson wrote:
> Hi,
>
> On Thu, May 8, 2025 at 4:54 AM Jayesh Choudhary wrote:
> >
> > By default, HPD was disabled on SN65DSI86 bridge. When the driver was
> > added (commit "a095f15c00e27"), the HPD_DISABLE bit was set in pre-enable
> > call whic
The left shift int 32 bit integer constants 1 is evaluated using 32 bit
arithmetic and then assigned to a 64 bit unsigned integer. In the case
where the shift is 32 or more this can lead to an overflow. Avoid this
by shifting using the BIT_ULL macro instead.
Fixes: 6c3ac7bcfcff ("drm/nouveau/gsp:
On Mon, May 12, 2025 at 04:02:01PM +0200, Luca Ceresoli wrote:
> Hi Maxime,
>
> On Sat, 10 May 2025 10:43:04 +0200
> Maxime Ripard wrote:
>
> > Acked-by: Maxime Ripard
>
> Thanks for looking at this series!
>
> Unfortunately the exynos patch is still needing a decision. Quick recap
> of the s
On Thu, 2025-05-22 at 15:09 +0200, Christian König wrote:
> On 5/22/25 14:59, Danilo Krummrich wrote:
> > On Thu, May 22, 2025 at 02:34:33PM +0200, Christian König wrote:
> > > See all the functions inside include/linux/dma-fence.h can be
> > > used by everybody. It's basically the public interface
Durmuş , 22 May 2025 Per, 15:15 tarihinde şunu yazdı:
>
> I'm using dual monitors. I disconnected the HDMI to test with a single
> screen, but the result was the same. I also swapped the HDMI ports,
> but the issue still persisted.
> I'm not using DisplayPort — in fact, it's a bit weird: I convert
On Thu, May 22, 2025 at 05:51:52PM +0800, Yongxing Mou wrote:
>
>
> On 2024/12/6 16:51, Dmitry Baryshkov wrote:
> > On Thu, Dec 05, 2024 at 08:31:35PM -0800, Abhinav Kumar wrote:
> > > In preparation of DP MST where link caps are read for the
> > > immediate downstream device and the edid is read
On Thu, May 22, 2025 at 10:27:39AM +0200, Philipp Stanner wrote:
> +/**
> + * drm_sched_submission_and_timeout_stop - stop everything except for
> free_job
> + * @sched: scheduler instance
> + *
> + * Helper for tearing down the scheduler in drm_sched_fini().
> + */
> +static void
> +drm_sched_sub
On 5/22/25 15:16, Philipp Stanner wrote:
> On Thu, 2025-05-22 at 15:09 +0200, Christian König wrote:
>> On 5/22/25 14:59, Danilo Krummrich wrote:
>>> On Thu, May 22, 2025 at 02:34:33PM +0200, Christian König wrote:
See all the functions inside include/linux/dma-fence.h can be
used by ever
On Thu, May 15, 2025 at 4:58 AM Christian König
wrote:
>
> Explicitly adding the scheduler maintainers.
>
> On 5/15/25 04:07, Lin.Cao wrote:
> > Previously we only signaled finished fence which may cause some
> > submission's dependency cannot be cleared the cause benchmark hang.
> > Signal both s
On Thu, May 22, 2025 at 01:58:54PM +0200, Thomas Zimmermann wrote:
Am 22.05.25 um 08:52 schrieb Dave Airlie:
From: Dave Airlie
This adds accessors inlines to the iosys-map. The intent is to
roll the iomem flag into the lower bits of the vaddr eventually.
First just add accessors to move all
On Thu, 2025-05-22 at 15:24 +0200, Christian König wrote:
> On 5/22/25 15:16, Philipp Stanner wrote:
> > On Thu, 2025-05-22 at 15:09 +0200, Christian König wrote:
> > > On 5/22/25 14:59, Danilo Krummrich wrote:
> > > > On Thu, May 22, 2025 at 02:34:33PM +0200, Christian König
> > > > wrote:
> > > >
On Thu, May 22, 2025 at 04:52:14PM +1000, Dave Airlie wrote:
From: Dave Airlie
This uses the new accessors to avoid touching the iosys_map internals.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/qxl/qxl_display.c | 14 +++---
drivers/gpu/drm/qxl/qxl_draw.c| 4 ++--
drivers/gpu/dr
From: Hugo Villeneuve
Hello,
this patch series add support for sending MIPI DSI command packets to the
Renesas RZ/G2L MIPI DSI driver.
Tested on a custom board with a SolidRun RZ/G2L SOM, with two different LCD
panels using the jd9365da and st7703 drivers.
Tested short and long writes.
Tested
From: Hugo Villeneuve
The default value of 1 will result in long read commands payload not being
saved to memory.
Fix by setting this value to the DMA buffer size.
Cc: Biju Das
Cc: Chris Brandt
Signed-off-by: Hugo Villeneuve
---
drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 10 +
From: Hugo Villeneuve
Add support for sending MIPI DSI command packets from the host to a
peripheral. This is required for panels that need configuration before
they accept video data.
Based on Renesas Linux kernel v5.10 repos [1].
Link: https://github.com/renesas-rz/rz_linux-cip.git
Cc: Biju D
On Thu, May 22, 2025 at 4:00 AM Danilo Krummrich wrote:
>
> On Tue, May 20, 2025 at 10:22:54AM -0700, Rob Clark wrote:
> > On Tue, May 20, 2025 at 9:54 AM Danilo Krummrich wrote:
> > > On Tue, May 20, 2025 at 09:07:05AM -0700, Rob Clark wrote:
> > > > On Tue, May 20, 2025 at 12:06 AM Danilo Krumm
+ dri-devel
On Wed, May 21, 2025 at 10:42:35PM +, Juston Li wrote:
Add tracepoints behind CONFIG_DRM_XE_GPU_MEM_TRACEPOINTS for tracking
global and per-process GPU memory usage.
These are required by VSR on Android 12+ for reporting GPU driver memory
allocations.
v2:
- Use u64 as preferred
On 5/21/25 12:28 AM, Connor Abbott wrote:
> Calling this packet is necessary when we switch contexts because there
> are various pieces of state used by userspace to synchronize between BR
> and BV that are persistent across submits and we need to make sure that
> they are in a "safe" state when sw
On Mon, May 12, 2025 at 03:07:55PM +0200, Louis Chauvet wrote:
> Hi Maxime,
>
> Did you have the time to look at this patch?
>
> Pekka added his Acked-by, but as you made some remarks about this patch, I
> would like to have your validation before applying it.
Yep, thank you
Acked-by: Maxime Ri
On Fri, May 16, 2025 at 06:48:38PM +0200, Luca Ceresoli wrote:
> Some users of DRM bridges may need to execute specific code just before
> deallocation.
>
> As of now the only known user would be KUnit tests.
>
> Suggested-by: Maxime Ripard
> Signed-off-by: Luca Ceresoli
>
> ---
>
> This patc
On 2025-05-22 11:27, Pekka Paalanen wrote:
> On Thu, 22 May 2025 09:54:50 -0400
> Harry Wentland wrote:
>
>> On 2025-05-22 09:49, Simon Ser wrote:
>>> On Thursday, May 22nd, 2025 at 15:28, Harry Wentland
>>> wrote:
>>>
>> What we should
>> do is reject YCbCr-type buffers with the
On Thu, May 22, 2025 at 07:47:17AM -0700, Rob Clark wrote:
> On Thu, May 22, 2025 at 4:00 AM Danilo Krummrich wrote:
> > On Tue, May 20, 2025 at 10:22:54AM -0700, Rob Clark wrote:
> > > On Tue, May 20, 2025 at 9:54 AM Danilo Krummrich wrote:
> > > > On Tue, May 20, 2025 at 09:07:05AM -0700, Rob C
On Fri, May 16, 2025 at 05:38:28PM +0200, Luca Ceresoli wrote:
> > > Another way would be adding an optional .destroy a callback in struct
> > > drm_bridge_funcs that is called in __drm_bridge_free(), and only the
> > > kunit test code implements it. Maybe looks cleaner, but it would be
> > > invas
On Thu, May 22, 2025 at 11:46 AM Konrad Dybcio
wrote:
>
> On 5/21/25 12:28 AM, Connor Abbott wrote:
> > Calling this packet is necessary when we switch contexts because there
> > are various pieces of state used by userspace to synchronize between BR
> > and BV that are persistent across submits a
Hi Maxime,
On Thu, 22 May 2025 16:57:30 +0200
Maxime Ripard wrote:
[...]
> > As the commit was a mistake, I'm applying the revert by the end of this
> > week (i.e. on Friday) unless there are better instructions.
>
> Given the lack of answers, and that it looks correct to me, just leave
> it
On 5/22/25 5:53 PM, Connor Abbott wrote:
> On Thu, May 22, 2025 at 11:46 AM Konrad Dybcio
> wrote:
>>
>> On 5/21/25 12:28 AM, Connor Abbott wrote:
>>> Calling this packet is necessary when we switch contexts because there
>>> are various pieces of state used by userspace to synchronize between BR
On Mon, May 19, 2025 at 01:35:46PM +0300, Cristian Ciocaltea wrote:
> On 5/19/25 10:22 AM, Maxime Ripard wrote:
> > Hi,
> >
> > On Fri, Apr 25, 2025 at 01:27:05PM +0300, Cristian Ciocaltea wrote:
> >> In preparation to improve error handling throughout all test cases,
> >> introduce a macro to che
On 5/22/25 16:27, Tvrtko Ursulin wrote:
>
> On 22/05/2025 14:41, Christian König wrote:
>> Since we already iterated over the xarray we know at which index the new
>> entry should be stored. So instead of using xa_alloc use xa_store and
>> write into the index directly.
>>
>> Signed-off-by: Christ
On 5/22/25 7:06 PM, Maxime Ripard wrote:
> On Mon, May 19, 2025 at 01:35:46PM +0300, Cristian Ciocaltea wrote:
>> On 5/19/25 10:22 AM, Maxime Ripard wrote:
>>> Hi,
>>>
>>> On Fri, Apr 25, 2025 at 01:27:05PM +0300, Cristian Ciocaltea wrote:
In preparation to improve error handling throughout al
: b4432656b36e5cc1d50a1f2dc15357543add530e
patch link:
https://lore.kernel.org/r/20250520152436.474778-7-jens.wiklander%40linaro.org
patch subject: [PATCH v9 6/9] tee: add tee_shm_alloc_dma_mem()
config: um-randconfig-r123-20250522
(https://download.01.org/0day-ci/archive/20250523/202505230242.8jtn9m5r-...@intel.com/config
On Thu, 22 May 2025, Dmitry Baryshkov wrote:
> On Thu, May 22, 2025 at 01:00:36PM +0300, Jani Nikula wrote:
>> Add a helper to wrap OF-specific calls in drm_panel_add_follower() in
>> preparation for adding an ACPI equivalent in the future. No functional
>> changes.
>>
>> Signed-off-by: Jani Niku
On 5/11/25 11:51 AM, Akhil P Oommen wrote:
> On 5/1/2025 9:23 PM, Konrad Dybcio wrote:
>> On 5/1/25 11:29 AM, Akhil P Oommen wrote:
>>> On 4/30/2025 10:26 PM, neil.armstr...@linaro.org wrote:
On 30/04/2025 18:39, Konrad Dybcio wrote:
> On 4/30/25 6:19 PM, neil.armstr...@linaro.org wrote:
>
Hi Dmitry,
On Thu, 22 May 2025 16:08:43 +0300
Dmitry Baryshkov wrote:
> > What to do? Proposed plan:
> >
> > 1. Louis immediately applies the revert (patch 1)
>
> I can't help but notice that both Louis and you have bootlin.com email
> addresses. Granted the lack of responses, can't you pin
Hi,
On Mon, May 19, 2025 at 01:55:10PM +0300, Cristian Ciocaltea wrote:
> On 5/19/25 11:42 AM, Maxime Ripard wrote:
> > Hi,
> >
> > On Fri, Apr 25, 2025 at 01:27:14PM +0300, Cristian Ciocaltea wrote:
> >> Provide a test to verify that if both driver and screen support RGB and
> >> YUV420 formats,
On Thu, 22 May 2025 10:43:16 +0530, Ayushi Makhija wrote:
> This series enables the support for DSI to DP bridge ports
> (labled as DSI0 and DSI1) of the Qualcomm's SA8775P Ride platform.
>
> SA8775P SoC has DSI controller v2.5.1 and DSI PHY v4.2.
> The Ride platform is having ANX7625 DSI to DP
On Wed, May 21, 2025 at 02:51:22PM +0200, Neil Armstrong wrote:
> On 20/05/2025 23:29, Dmitry Baryshkov wrote:
> > On Tue, May 20, 2025 at 09:57:38AM +0200, neil.armstr...@linaro.org wrote:
> > > On 19/05/2025 18:04, Dmitry Baryshkov wrote:
> > > > From: Dmitry Baryshkov
> > > >
> > > > Continue
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and drop the
DPU_DIM_LAYER feature bit. It is currently unused, but can be replaed
with the core_major_ver >= 4 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
d
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_ACTIVE_CFG feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_
From: Dmitry Baryshkov
Inline the _setup_ctl_ops() function, it makes it easier to handle
different conditions involving CTL configuration.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 98
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_DSPP_SUB_BLOCK_FLUSH feature bit with the core_major_ver >= 7
check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
dri
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_INTF_STATUS_SUPPORTED feature bit with the core_major_ver >= 5
check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_INTF_INPUT_CTRL feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dp
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_VM_CFG feature bit with the core_major_ver >= 7 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/m
From: Dmitry Baryshkov
Stop declaring DPU_DSPP_PCC as a part of the DSPP features, use the
presence of the PCC sblk to check whether PCC is present in the hardware
or not.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_HAS_LAYER_EXT4 feature bit with the core_major_ver >= 9 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/g
From: Dmitry Baryshkov
Inline the _setup_dspp_ops() function, it makes it easier to handle
different conditions involving DSPP configuration.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 10 ++---
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_FETCH_ACTIVE feature bit with the core_major_ver >= 7 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu
From: Dmitry Baryshkov
The INTF_SC7280_MASK is equal to the INTF_SC7180_MASK. Stop defining a
separate symbol and use the INTF_SC7180_MASK instead.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650
From: Dmitry Baryshkov
Inline the _setup_dsc_ops() function, it makes it easier to handle
different conditions involving DSC configuration.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 17 ++--
From: Dmitry Baryshkov
Inline the _setup_mixer_ops() function, it makes it easier to handle
different conditions involving LM configuration.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 24
From: Dmitry Baryshkov
As a preparation to further MDSS-revision cleanups stop passing MDSS
revision to the setup_timing_gen() callback. Instead store a pointer to
it inside struct dpu_hw_intf and use it diretly. It's not that the MDSS
revision can chance between dpu_hw_intf_init() and
dpu_encode
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_MIXER_COMBINED_ALPHA feature bit with the core_major_ver >= 4 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_h
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_MDP_VSYNC_SEL feature bit with the core_major_ver < 5 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_MDP_PERIPH_0_REMOVED feature bit with the core_major_ver >= 8 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catal
From: Dmitry Baryshkov
As features bits are now unused by some of the hardware block
configuration structures, remove the 'features' from the DPU_HW_BLK_INFO
so that it doesn't get included into hw info structures by default and
only include it when necessary.
Signed-off-by: Dmitry Baryshkov
Re
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_DATA_HCTL_EN feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_PINGPONG_DITHER feature bit with the core_major_ver >= 3 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dp
Some time ago we started the process of converting HW blocks to use
revision-based checks instead of having feature bits (which are easy to
miss or to set incorrectly). Then the process of such a conversion was
postponed. (Mostly) finish the conversion. The only blocks which still
have feature bits
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_DSC_HW_REV_1_2 feature bit with the core_major_ver >= 7 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_MDP_AUDIO_SELECT feature bit with the core_major_ver == 4 ||
core_major_ver == 5 check.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_PINGPONG_DSC feature bit with the core_major_ver < 7 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_DSC_OUTPUT_CTRL feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dp
From: Dmitry Baryshkov
All existing PINGPONG feature bits are completely unused. Drop them from
the current codebase.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 12
1 file chang
From: Dmitry Baryshkov
Drop unused MDP TOP features from the current codebase.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 13 -
1 file changed, 13 deletions(-)
diff --git a/driv
From: Dmitry Baryshkov
Drop unused LM features from the current codebase.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a
Hi Jens
On 5/10/2025 5:12 AM, Jens Glathe wrote:
On 06.12.24 05:31, Abhinav Kumar wrote:
base-commit: b166256c1e6ce356fa1404d4c8531830e6f100a8
Hi Abhinav,
I would like to test / play around with this patchset, unfortunately
this base commit is not easy to find. Trying to apply without gives
Code snippets should be wrapped in double backticks to follow
reStructuredText semantics; the use of single backticks uses the
:title-reference: role by default, which isn't quite what we want.
Add double backticks to code snippets to fix this.
Signed-off-by: Jared Kangas
---
Documentation/users
On Thu, 22 May 2025 18:40:29 +
Biju Das wrote:
> Hi Hugo,
>
> Thanks for the patch.
>
> > -Original Message-
> > From: Hugo Villeneuve
> > Sent: 22 May 2025 15:39
> > Subject: [PATCH v3 0/2] drm: rcar-du: rzg2l_mipi_dsi: add MIPI DSI command
> > support
> >
> > From: Hugo Villene
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_SSPP_QOS_8LVL feature bit with the core_major_ver >= 4 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catal
The CMA heap's name in devtmpfs can vary depending on how the heap is
defined. Its name defaults to "reserved", but if a CMA area is defined
in the devicetree, the heap takes on the devicetree node's name, such as
"default-pool" or "linux,cma". To simplify naming, unconditionally name
it "default_c
Hi all,
This patch series is based on a previous discussion around CMA heap
naming. [1] The heap's name depends on the device name, which is
generally "reserved", "linux,cma", or "default-pool", but could be any
arbitrary name given to the default CMA area in the devicetree. For a
consistent users
Prepare for the introduction of a fixed-name CMA heap by replacing the
unused void pointer parameter in __add_cma_heap() with the heap name.
Signed-off-by: Jared Kangas
---
drivers/dma-buf/heaps/cma_heap.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/dr
Hi Rob,
Le lundi 19 mai 2025 à 06:35 -0500, Rob Herring (Arm) a écrit :
>
> On Fri, 16 May 2025 18:53:15 +0200, Tomeu Vizoso wrote:
> > Add the bindings for the Neural Processing Unit IP from Rockchip.
> >
> > v2:
> > - Adapt to new node structure (one node per core, each with its own
> > IOM
Hi Hugo,
> -Original Message-
> From: Hugo Villeneuve
> Sent: 22 May 2025 20:14
> Subject: Re: [PATCH v3 0/2] drm: rcar-du: rzg2l_mipi_dsi: add MIPI DSI
> command support
>
> On Thu, 22 May 2025 18:40:29 +
> Biju Das wrote:
>
> > Hi Hugo,
> >
> > Thanks for the patch.
> >
> > > --
Hi Hugo,
Thanks for the patch.
> -Original Message-
> From: Hugo Villeneuve
> Sent: 22 May 2025 15:39
> Subject: [PATCH v3 0/2] drm: rcar-du: rzg2l_mipi_dsi: add MIPI DSI command
> support
>
> From: Hugo Villeneuve
>
> Hello,
> this patch series add support for sending MIPI DSI comma
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