On Thu, 24 Apr 2025 13:25:47 +0200
Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> When debugfs is disabled, including panthor_gem.h causes warnings
> about a non-static global function defined in a header:
>
> In file included from drivers/gpu/drm/panthor/panthor_drv.c:30:
> drivers/gpu/drm/pa
Refactor the core API of get/unmap/free pages to all operate on
drm_gpusvm_pages. In the next patch we want to export a simplified core
API without needing fully blown svm range etc.
Suggested-by: Matthew Brost
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/drm_gpusvm.c |
Just some minor attempts at improving the readability of
nouveau_fence.c
This series is based on this partially merged series: [1]
Feel free to drop single patches if they are not deemed worth the
effort.
P.
[1] https://lore.kernel.org/dri-devel/20250415121900.55719-3-pha...@kernel.org/
Philip
In nouveau_fence_done(), a fence is checked for being signaled by
manually evaluating the base fence's bits. This can be done in a
canonical manner through dma_fence_is_signaled().
Replace the bit-check with dma_fence_is_signaled().
Signed-off-by: Philipp Stanner
---
drivers/gpu/drm/nouveau/nou
On 4/24/2025 3:45 AM, Alexandre Courbot wrote:
> On Thu Apr 24, 2025 at 12:06 PM JST, Joel Fernandes wrote:
>> On April 24, 2025, 1:18 a.m. UTC
>> Alexandre Courbot wrote:
>>> Since this just renames fields, would you be ok if I squashed this one
>>> into the relevant patch of my series, alongs
On Tue, 2025-04-22 at 10:04 -0700, Matthew Brost wrote:
> Mixing GPU and CPU atomics does not work unless a strict migration
> policy of GPU atomics must be device memory. Enforce a policy of must
> be
> in VRAM with a retry loop of 2 attempts, if retry loop fails abort
> fault.
>
> v2:
> - Only
Hi Matthew,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-xe/drm-xe-next]
[also build test ERROR on next-20250424]
[cannot apply to drm-exynos/exynos-drm-next linus/master drm/drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-misc/drm
Move the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault_types.h header file, and move the associated enum values
into the regs folder under xe_pagefault_desc.h
Since xe_pagefault_desc.h is being initialized here, also move the
xe_guc_pagefault_desc hardware formats to the new file.
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagefaults are saved this way currently, though in
the future, all faults should be tracked by the VM for future reporting.
Additionally, of the pagefaults reported, only failed pagefaults are
saved this
The page fault handler should reject write/atomic access to read only
VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
Signed-off-by: Jonathan Cavitt
Suggested-by: Matthew Brost
Reviewed-by: Shuicheng Lin
---
On Mon, 14 Apr 2025 at 14:51, Thomas Zimmermann wrote:
>
> Instead of testing import_attach for imported GEM buffers, invoke
> drm_gem_is_imported() to do the test. The helper tests the dma_buf
> itself while import_attach is just an artifact of the import. Prepares
> to make import_attach optiona
Hi Matthew,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-xe/drm-xe-next]
[also build test WARNING on next-20250424]
[cannot apply to drm-exynos/exynos-drm-next linus/master drm/drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-misc
On Thu, 24 Apr 2025, Jani Nikula wrote:
>On Thu, 24 Apr 2025, Sebastian Andrzej Siewior
>wrote:
>> On 2025-04-24 14:56:08 [+0800], Junxiao Chang wrote:
>>> MEI GSC interrupt comes from i915. It has top half and bottom half.
>>> Top half is called from i915 interrupt handler. It should be in irq
>
Create master device without partition when
CONFIG_MTD_PARTITIONED_MASTER flag is unset.
This streamlines device tree and allows to anchor
runtime power management on master device in all cases.
Signed-off-by: Alexander Usyskin
---
drivers/mtd/mtdchar.c | 2 +-
drivers/mtd/mtdcore.c
Add auxiliary driver for intel discrete graphics
non-volatile memory device.
CC: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Acked-by: Miquel Raynal
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
MAINTAINERS| 7 ++
dr
Enable access to internal non-volatile memory on DGFX
with GSC/CSC devices via a child device.
The nvm child device is exposed via auxiliary bus.
Reviewed-by: Rodrigo Vivi
Acked-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/
GSC NVM controller HW errors on quad access overlapping 1K border.
Align 64bit read and write to avoid readq/writeq over 1K border.
Acked-by: Miquel Raynal
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd_intel_dg.c | 35 ++
1 file changed, 35 insertions(
Register the on-die nvm device with the mtd subsystem.
Refcount nvm object on _get and _put mtd callbacks.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Acked-by: Miquel Raynal
Co-de
Enable runtime PM in mtd driver to notify graphics driver that
whole card should be kept awake while nvm operations are
performed through this driver.
CC: Lucas De Marchi
Acked-by: Karthik Poosa
Acked-by: Miquel Raynal
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd_intel_dg.c |
Implement read(), erase() and write() functions.
CC: Lucas De Marchi
CC: Rodrigo Vivi
Acked-by: Miquel Raynal
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Co-developed-by: Vitaly Lubart
Signed-off-by: Vitaly Lubart
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mt
Enable access to internal non-volatile memory on
DGFX devices via a child device.
The nvm child device is exposed via auxiliary bus.
CC: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Acked-by: Rodrigo Vivi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyski
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
Acked-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/intel_nvm.c | 25 -
1 file changed, 24 insertio
On Wed, Apr 23, 2025 at 10:29 AM Christian König
wrote:
>
> On 4/22/25 18:26, Deucher, Alexander wrote:
> > [Public]
> >
> >> -Original Message-
> >> From: Alex Deucher
> >> Sent: Tuesday, April 22, 2025 9:46 AM
> >> To: Koenig, Christian
> >> Cc: Denis Arefev ; Deucher, Alexander
> >> ;
From: Reuven Abliyev
Erase command is slow on discrete graphics storage
and may overshot PCI completion timeout.
BMG introduces the ability to have non-posted erase.
Add driver support for non-posted erase with polling
for erase completion.
Reviewed-by: Rodrigo Vivi
Acked-by: Rodrigo Vivi
Sign
Enable support for two-lane configuration which is done by setting the
LANSEL_SW_EN and LANSEL_SW bits in the Pad Control register.
Use the data-lanes device tree parameter to configure the number of lanes.
The default configuration remains set to four lanes.
Signed-off-by: Kory Maincent
---
Ch
Document the compatible value for Saef SFTO340XC panels.
Signed-off-by: Kory Maincent
---
Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml
b/Documentatio
Hi Maxime,
On Tue, 8 Apr 2025 17:51:08 +0200
Maxime Ripard wrote:
> Hi,
>
> On Mon, Apr 07, 2025 at 05:27:39PM +0200, Luca Ceresoli wrote:
> > This is the new API for allocating DRM bridges.
> >
> > The devm lifetime management of this driver is peculiar. The underlying
> > device for the pane
For TI SoC J784S4, the display pipeline looks like:
TIDSS -> CDNS-DSI -> SN65DSI86 -> DisplayConnector -> DisplaySink
This requires HPD to detect connection form the connector.
By default, the HPD is disabled for eDP. So enable it conditionally
based on a new flag 'keep-hpd' as mentioned in the com
On 4/24/25 10:52, Linus Walleij wrote:
On Tue, Apr 8, 2025 at 9:43 AM Bartosz Golaszewski wrote:
From: Bartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Barto
On 2025-04-24 10:53:31 [+], Chang, Junxiao wrote:
> >> This should have a Fixes when generic_handle_irq() was introduced.
>
> If PREEMPT_RT is disabled, original driver works fine. I prefer to not
> add "Fixes:"?
PREEMPT_RT is mainline. It deserves the same fixes as other parts of the
kernel.
On Thu, Apr 24, 2025 at 12:40:14PM +0300, Govindapillai, Vinod wrote:
> Hi,
>
>
> On Thu, 2025-04-24 at 13:52 +0530, Arun R Murthy wrote:
> > Unify the function to calculate the link symbol cycles for both dsc and
> > non-dsc case and export the function so that it can be used in the
> > respecti
The custom definition of PCI vendor ID in video/mach64.h is unused.
Remove it. Note, that the proper one is available in pci_ids.h.
Signed-off-by: Andy Shevchenko
---
include/video/mach64.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/video/mach64.h b/include/video/mach64.h
inde
Hi Matthew,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-xe/drm-xe-next]
[also build test ERROR on next-20250424]
[cannot apply to drm-exynos/exynos-drm-next linus/master drm/drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-misc/drm
On 17.04.2025 16:49, Boris Brezillon wrote:
> Currently, we pick the MMIO offset based on the size of the pgoff_t
> type seen by the process that manipulates the FD, such that a 32-bit
> process can always map the user MMIO ranges. But this approach doesn't
> work well for emulators like FEX, where
On 17.04.2025 16:49, Boris Brezillon wrote:
> drm_panthor_gpu_info::shader_present is currently automatically offset
> by 4 byte to meet Arm's 32-bit/64-bit field alignment rules, but those
> constraints don't stand on 32-bit x86 and cause a mismatch when running
> an x86 binary in a user emulated
Hi, Andy and Daniel!
What is the status of this one? I've noticed it went to archived.
Is it good to go or not? Any further recommendations?
Thank you,
Konstantin
On Thu, Apr 24, 2025, at 13:41, Boris Brezillon wrote:
> On Thu, 24 Apr 2025 13:25:47 +0200
>> +#ifdef CONFIG_DEBUG_FS
>> bo->debugfs.flags = usage_flags |
>> PANTHOR_DEBUGFS_GEM_USAGE_FLAG_INITIALIZED;
>> -}
>> -
>> -#else
>> -void panthor_gem_debugfs_set_usage_flags(struct panthor_gem_objec
Hello Tomi,
On Wed, 16 Apr 2025 15:31:41 +0300
Tomi Valkeinen wrote:
> Hi,
>
> On 07/04/2025 17:23, Luca Ceresoli wrote:
> > This is the new API for allocating DRM bridges.
> >
> > This driver has a peculiar structure. zynqmp_dpsub.c is the actual driver,
> > which delegates to a submodule (zy
On Thu, Apr 24, 2025 at 4:49 AM Marek Marczykowski-Górecki
wrote:
>
> On Fri, Apr 11, 2025 at 12:01:28PM +0200, Marek Marczykowski-Górecki wrote:
> >
> > Hi,
> >
> > On Wed, Apr 02, 2025 at 04:35:05PM +0200, Gergo Koteles wrote:
> > > Hi Dmitry,
> > >
> > > But the code would start to become quite
On 4/24/25 3:02 PM, Philipp Stanner wrote:
In nouveau_fence_done(), a fence is checked for being signaled by
manually evaluating the base fence's bits. This can be done in a
canonical manner through dma_fence_is_signaled().
Replace the bit-check with dma_fence_is_signaled().
Signed-off-by: Phil
nouveau_fence_done() contains an if branch that checks whether a
nouveau_fence has either of the two existing nouveau_fence backend ops,
which will always evaluate to true.
Remove the surplus check.
Signed-off-by: Philipp Stanner
---
drivers/gpu/drm/nouveau/nouveau_fence.c | 24 +++-
On Thu, Apr 24, 2025 at 02:53:18PM +0200, Robert Mader wrote:
> Chris, Javier, Laurent - sorry for the noise, but given you reviewed
> changes in the respective files before, maybe you can help me moving
> this forward? I'd be very happy for any feedback to get this landed,
> thanks! :)
I don't
On Thu, 2025-04-24 at 15:24 +0200, Danilo Krummrich wrote:
> On 4/24/25 3:02 PM, Philipp Stanner wrote:
> > In nouveau_fence_done(), a fence is checked for being signaled by
> > manually evaluating the base fence's bits. This can be done in a
> > canonical manner through dma_fence_is_signaled().
>
(+ drm-misc maintainers)
On Thu, Apr 24, 2025 at 03:25:55PM +0200, Philipp Stanner wrote:
> On Thu, 2025-04-24 at 15:24 +0200, Danilo Krummrich wrote:
> > On 4/24/25 3:02 PM, Philipp Stanner wrote:
> > > In nouveau_fence_done(), a fence is checked for being signaled by
> > > manually evaluating th
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
Acked-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++
drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +
Add driver for access to Intel discrete graphics card
internal NVM device.
Expose device on auxiliary bus by i915 and Xe drivers and
provide mtd driver to register this device with MTD framework.
This is a rewrite of "drm/i915/spi: spi access for discrete graphics"
and "spi: add driver for Intel d
In intel-dg, there is no access to the spi controller,
the information is extracted from the descriptor region.
CC: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Acked-by: Miquel Raynal
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/mtd/
Add support for userspace to request a list of observed faults
from a specified VM.
v2:
- Only allow querying of failed pagefaults (Matt Brost)
v3:
- Remove unnecessary size parameter from helper function, as it
is a property of the arguments. (jcavitt)
- Remove unnecessary copy_from_user (Jain
Add support for Saef Technology Limited SFTO340XC LCD panel.
Signed-off-by: Kory Maincent
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 232 ++
1 file changed, 232 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
b/drivers/gpu/drm/panel/pan
Add support for Saef Technology Limited SFTO340XC LCD panel.
Add alongside the number of lanes configuration in the ili9881c driver
as the board on my desc use the panel with only two lanes.
Faced an issue with panel-common binding. Wrote a fix (first patch) but not
sure it is the right one. If so
Add the data-lanes property to specify the number of DSI lanes used by the
panel. This allows configuring the panel for either two, three or four
lanes.
At the same time, extend the devicetree example with an endpoint node for
better clarity.
Signed-off-by: Kory Maincent
---
Change in v2:
- Use
From: Arnd Bergmann
When debugfs is disabled, including panthor_gem.h causes warnings
about a non-static global function defined in a header:
In file included from drivers/gpu/drm/panthor/panthor_drv.c:30:
drivers/gpu/drm/panthor/panthor_gem.h:222:6: error: no previous prototype for
'panthor_ge
Goal here is cut over to gpusvm and remove xe_hmm, relying instead on
common code. The core facilities we need are get_pages(), unmap_pages()
and free_pages() for a given useptr range, plus a vm level notifier
lock, which is now provided by gpusvm.
v2:
- Reuse the same SVM vm struct we use for f
Export get/unmap/free pages API. We also need to tweak the SVM init to
allow skipping much of the unneeded parts.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Matthew Brost
---
drivers/gpu/drm/drm_gpusvm.c | 66
include/drm/drm_gpusvm.h | 16 +++
Handle the case where the hmm range partially covers a huge page (like
2M), otherwise we can potentially end up doing something nasty like
mapping memory which is outside the range, and maybe not even mapped by
the mm. Fix is based on the xe userptr code, which in a future patch
will directly use g
As a first step to moving userptr handling over to drm, replace the hmm
usage in xe over to gpusvm, which already offers similar functionality. As
some prep steps we also align on some of the missing pieces that were
already handled in xe_hmm.
v2:
- Rework the gpusvm API based on feedback.
- U
If we are only reading the memory then from the device pov the direction
can be DMA_TO_DEVICE. This aligns with the xe-userptr code. Using the
most restrictive data direction to represent the access is normally a
good idea.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Matthew Brost
Revi
On Thu, 24 Apr 2025 14:10:16 +0200
"Arnd Bergmann" wrote:
> On Thu, Apr 24, 2025, at 13:41, Boris Brezillon wrote:
> > On Thu, 24 Apr 2025 13:25:47 +0200
> >> +#ifdef CONFIG_DEBUG_FS
> >>bo->debugfs.flags = usage_flags |
> >> PANTHOR_DEBUGFS_GEM_USAGE_FLAG_INITIALIZED;
> >> -}
> >> -
> >>
Chris, Javier, Laurent - sorry for the noise, but given you reviewed
changes in the respective files before, maybe you can help me moving
this forward? I'd be very happy for any feedback to get this landed,
thanks! :)
On 07.04.25 21:13, Robert Mader wrote:
This adds FOURCCs for 10/12bit YCbCr
On 4/11/25 1:55 AM, Danilo Krummrich wrote:
This is the series for the initial DRM Rust abstractions, including DRM device /
driver, IOCTL, File and GEM object abstractions.
With the changes requested by Alyssa and Lyude, applied to nova-next, thanks!
-Original Message-
From: Lin, Shuicheng
Sent: Wednesday, April 23, 2025 8:49 PM
To: Cavitt, Jonathan ; intel...@lists.freedesktop.org
Cc: Gupta, saurabhg ; Zuo, Alex ;
joonas.lahti...@linux.intel.com; Brost, Matthew ;
Zhang, Jianxun ; dri-devel@lists.freedesktop.org;
Wajdeczko, Michal
On 4/23/2025 10:06 AM, Danilo Krummrich wrote:
[...]
>> +
>> +/// Probe for VBIOS extraction
>> +/// Once the VBIOS object is built, bar0 is not read for vbios purposes
>> anymore.
>> +pub(crate) fn probe(bar0: &Devres) -> Result {
>
> Let's not call it probe(), what about VBios::p
devm_drm_bridge_alloc() is the new API to be used for allocating (and
partially initializing) a private driver struct embedding a struct
drm_bridge.
For many drivers having a simple code flow in the probe function, this
commit does a mass conversion automatically with the following semantic
patch.
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: "Uwe Kleine-König"
Cc: Andy Yan
Cc: Dmitry Baryshkov
Cc: Jani Nikula
Cc: Sui Jingfeng
---
drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: "Rob Herring (Arm)"
Cc: Hsin-Te Yuan
Cc: Jani Nikula
Cc: Pin-yen Lin
Cc: Sui Jingfeng
Cc: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Aradhya Bhatia
Cc: Tomi Valkeinen
---
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
This is the new API for allocating DRM bridges.
Acked-by: Ilpo Järvinen
Signed-off-by: Luca Ceresoli
---
Cc: "Bryan O'Donoghue"
Cc: "Ilpo Järvinen"
Cc: Hans de Goede
---
drivers/platform/arm64/acer-aspire1-ec.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drive
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Alim Akhtar
Cc: Inki Dae
Cc: Kyungmin Park
Cc: Seung-Woo Kim
---
drivers/gpu/drm/exynos/exynos_drm_mic.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/ex
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/bridge/sii902x.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
index
6de61d9fe06487856e8b3c32db3c8d8c
This is the new API for allocating DRM bridges.
Reviewed-by: Herve Codina
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
b/drivers/gpu/drm/bridge/ti-sn65dsi8
This is the new API for allocating DRM bridges.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Ceresoli
---
Cc: Abhinav Kumar
Cc: Bjorn Andersson
Cc: Marijn Suijten
Cc: Rob Clark
Cc: Sean Paul
---
drivers/gpu/drm/msm/dp/dp_drm.c | 9 +
1 file changed, 5 insertions(+), 4 deletio
This is the new API for allocating DRM bridges.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/bridge/display-connector.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/display-connector.c
b/drivers/gpu/drm/bri
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Linus Walleij
---
drivers/gpu/drm/mcde/mcde_dsi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c
index
b302d8ec3a
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Ian Ray
Cc: Martyn Welch
Cc: Peter Senna Tschudin
---
drivers/gpu/drm/bridge/megachips-stdp-ge-b850v3-fw.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/bridge/nxp-ptn3460.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/nxp-ptn3460.c
b/drivers/gpu/drm/bridge/nxp-ptn3460.c
index
25d7c415478b14ef6
This is the new API for allocating DRM bridges.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Ceresoli
---
Cc: Russell King
---
drivers/gpu/drm/bridge/tda998x_drv.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/tda998x_drv.c
b/drivers/g
This is the new API for allocating DRM bridges.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Ceresoli
---
Cc: Abhinav Kumar
Cc: Marijn Suijten
Cc: Rob Clark
Cc: Sean Paul
---
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/dsi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index
91
This is the new API for allocating DRM bridges.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
b/drivers/gpu/drm/brid
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: "Rob Herring (Arm)"
Cc: Helge Deller
Cc: Kuninori Morimoto
Cc: Tomi Valkeinen
---
drivers/gpu/drm/omapdrm/dss/dpi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/dr
This is the new API for allocating DRM bridges.
This driver embeds an array of channels in the main struct, and each
channel embeds a drm_bridge. This prevents dynamic, refcount-based
deallocation of the bridges.
To make the new, dynamic bridge allocation possible:
* change the array of channel
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Alexandre Torgue
Cc: Maxime Coquelin
Cc: Philippe Cornu
Cc: Raphael Gallais-Pou
Cc: Yannick Fertre
---
drivers/gpu/drm/stm/lvds.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a
This is the new API for allocating DRM bridges.
This driver already implements refcounting of the struct vc4_dsi, which
embeds struct drm_bridge. Now this is a duplicate of the refcounting
implemented by the DRM bridge core, so convert the vc4_dsi_get/put() calls
into drm_bridge_get/put() calls an
This is the new API for allocating DRM bridges.
Switching from a non-devm to a devm allocation allows removing the kfree()
in the remove function and in the probe error management code, and as a
consequence to simplify the code flow by removing now unnecessary gotos.
Signed-off-by: Luca Ceresoli
This is the new API for allocating DRM bridges.
This driver has a peculiar structure. zynqmp_dpsub.c is the actual driver,
which delegates to a submodule (zynqmp_dp.c) the allocation of a
sub-structure embedding the drm_bridge and its initialization, however it
does not delegate the drm_bridge_add
This is the new API for allocating DRM bridges.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Ceresoli
---
Cc: Abhinav Kumar
Cc: Marijn Suijten
Cc: Rob Clark
Cc: Sean Paul
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --g
This is the new API for allocating DRM bridges.
Switching from a non-devm to a devm allocation allows removing the kfree()
in the remove function and in the probe error management code, and as a
consequence to simplify the code flow by removing now unnecessary gotos.
Signed-off-by: Luca Ceresoli
This is the new API for allocating DRM bridges.
Switching from a non-devm to a devm allocation allows removing the kfree()
in the remove function and in the probe error management code, and as a
consequence to simplify the code flow by removing now unnecessary gotos.
Signed-off-by: Luca Ceresoli
This is the new API for allocating DRM bridges.
This driver allocates the DRM bridge separately from the main driver
private struct, which prevents using the new devm_drm_bridge_alloc()
API. Simplify the code by replacing the struct drm_bridge pointer with an
embedded struct drm_bridge inside the
This is the new API for allocating DRM bridges.
Signed-off-by: Luca Ceresoli
---
Cc: Kieran Bingham
Cc: Laurent Pinchart
Cc: Tomi Valkeinen
---
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/renesas
This is the new API for allocating DRM bridges.
These two drivers are tangled together by the ldb_add_bridge_helper(), so
they are converted at once.
They also have a similar design, each embedding an array of channels in
their main struct, and each channel embeds a drm_bridge. This prevents
dyna
This is the new API for allocating DRM bridges.
Converting this driver is a bit convoluted because the drm_bridge funcs
pointer differs based on the bridge mode. So the current code does:
* tc_probe()
* devm_kzalloc() private struct embedding drm_bridge
* call tc_probe_bridge_endpoint() wh
Bridges obtained via devm_drm_bridge_alloc(dev, ...) will be put when the
requesting device (@dev) is removed.
However drivers which obtained them may need to put the obtained reference
explicitly. One such case is if they bind the devm removal action to a
different device than the one implemented
This is the new API for allocating DRM bridges.
Switching from a non-devm to a devm allocation allows removing the kfree()
in the remove function and in the probe error management code, and as a
consequence to simplify the code flow by removing now unnecessary gotos.
Signed-off-by: Luca Ceresoli
Signed-off-by: Arun R Murthy
---
Changes in v7:
- EDITME: describe what is new in this series revision.
- EDITME: use bulletpoints and terse descriptions.
- Link to v6:
https://lore.kernel.org/r/20250424-hblank-v6-0-3d10442d9...@intel.com
Changes in v6:
- EDITME: describe what is new in this
On 2025-04-22 10:58, Melissa Wen wrote:
> This reverts commit 272e6aab14bbf98d7a06b2b1cd6308a02d4a10a1.
>
> Applying degamma curve to the cursor by default breaks Linux userspace
> expectation.
>
> On Linux, AMD display manager enables cursor degamma ROM just for
> implict sRGB on HW versions
On 4/24/25 9:59 PM, Luca Ceresoli wrote:
> This is the new API for allocating DRM bridges.
>
> Signed-off-by: Luca Ceresoli
>
> ---
>
> Cc: Cristian Ciocaltea
> ---
> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
Reviewed-by: Cristia
On Wed, Apr 23, 2025 at 05:02:58PM +0200, Danilo Krummrich wrote:
[..]
> > >> +data.extend_with(len, 0, GFP_KERNEL)?;
> > >> +with_bar!(?bar0, |bar0_ref| {
> > >> +let dst = &mut data[current_len..current_len + len];
> > >> +for (idx, chunk) in dst
> > >> +
On Thu, Apr 24, 2025 at 01:18:34PM +0100, Matthew Auld wrote:
> Goal here is cut over to gpusvm and remove xe_hmm, relying instead on
> common code. The core facilities we need are get_pages(), unmap_pages()
> and free_pages() for a given useptr range, plus a vm level notifier
> lock, which is now
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