Hi Huacai,
Tested successfully with `glmark2` on both x86 and Loongson platforms, using
AMD Radeon RX 9070 XT.
---
**Intel i5-10400F Platform:**
- **Board / CPU**: Intel i5-10400F
- **Firmware Vendor**: American Megatrends International, LLC
- **Kernel**:
https://lore.kernel.org/all/202503270
From: Alex Hung
[ Upstream commit ea79068d4073bf303f8203f2625af7d9185a1bc6 ]
[WHAT & HOW]
A denominator cannot be 0, and is checked before used.
This fixes 2 DIVIDE_BY_ZERO issues reported by Coverity.
Reviewed-by: Harry Wentland
Signed-off-by: Jerry Zuo
Signed-off-by: Alex Hung
Tested-by:
On 3/27/2025 6:38 PM, Lizhi Hou wrote:
>
> On 3/26/25 01:06, Jacek Lawrynowicz wrote:
>> Hi,
>>
>> On 3/25/2025 9:50 PM, Lizhi Hou wrote:
>>> On 3/25/25 04:43, Maciej Falkowski wrote:
From: Jacek Lawrynowicz
Fix deadlock in ivpu_ms_cleanup() by preventing runtime resume after
>>
On Thu, 27 Mar 2025 10:55:40 -0400
Anusha Srivatsa wrote:
> Allocate panel via reference counting. Add _get() and _put() helper
> functions to ensure panel allocations are refcounted. Avoid use after
> free by ensuring panel pointer is valid and can be usable till the last
> reference is put.
>
On Thu, 27 Mar 2025 10:55:41 -0400
Anusha Srivatsa wrote:
> Start moving to the new refcounted allocations using
> the new API devm_drm_panel_alloc(). Deprecate any other
> allocation.
>
> v2: make the documentation changes in v1 more precise (Maxime)
Note that the changelog (list of changes si
Hello Anusha,
Thanks for your continued effort.
I have a few minor comments. Nothing big, but since Maxime requested a
change you'll have to send a new iteration, so find my comments below.
On Thu, 27 Mar 2025 10:55:39 -0400
Anusha Srivatsa wrote:
[...]
> diff --git a/include/drm/drm_panel.h
From: Zhang Enpei
Replace the open-code with dev_err_probe() to simplify the code.
Signed-off-by: Zhang Enpei
Signed-off-by: Shao Mingyin
---
drivers/gpu/drm/xlnx/zynqmp_dp.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/g
On Thu, 27 Mar 2025 10:55:42 -0400
Anusha Srivatsa wrote:
> Start using the new helper that does the refcounted
> allocations.
>
> v2: check error condition (Luca)
Here as well, when you resend, move the changelog after the '---' line.
> Signed-off-by: Anusha Srivatsa
Reviewed-by: Luca Ceres
> These both above commented from Dmitry I have addressed in the version 2 of
> patch 7 of the series.
> I have squash patch 8 into patch 7 of version 1 into patch 7 of version 2 of
> the series.
>
>
> Thanks,
> Ayushi
Hi Krzysztof,
I hope this message finds you well. I wanted to follow up on
Hook up the newly added plane function pointer
format_mod_supported_async to populate the modifiers/formats supported
by asynchronous flips.
v5: Correct the if condition for modifier support check (Chaitanya)
v6: Replace uint32_t/uint64_t with u32/u64 (Jani)
v7: Move plannar check from intel_async
create_in_formats creates the list of supported format/modifiers for
synchronous flips, modify the same function so as to take the
format_mod_supported as argument and create list of format/modifier for
async as well.
v5: create_in_formats can return -ve value in failure case, correct the
if condi
On Thu, Mar 27, 2025 at 02:26:09PM -0400, M Henning wrote:
> On Thu, Mar 27, 2025 at 8:56 AM Danilo Krummrich wrote:
> >
> > On Tue, Mar 25, 2025 at 07:40:56PM -0400, M Henning wrote:
> > > Okay, that sounds reasonable since I don't expect this to change very
> > > quickly.
> > >
> > > Since I do
Hi Vignesh,
On Fri, 28 Mar 2025 at 11:03, Vignesh Raman wrote:
> Ensure the repository is not shallow before fetching branches in
> check-patch job. This prevents issues where git merge-base fails
> due to incomplete history. Set the timeout of check-patch job to 1h.
Ouch - an hour is pretty bru
Hi Vignesh,
On Fri, 28 Mar 2025 at 11:03, Vignesh Raman wrote:
> The current s3cp implementation does not work anymore after the
> migration, and instead of fixing it and propagating the fix down to us,
> it's simpler to directly use curl. Uprev mesa [1][2] to adapt these
> changes. Also replace
The function pointer can_async_flip() checks for async supported
modifier, add format support check also in the same function.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 4 ++--
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 11 ++-
drive
On Fri, Mar 28, 2025 at 05:07:05PM +0800, shao.ming...@zte.com.cn wrote:
> From: Tang Dongxing
>
> Replace the open-code with device_match_of_node().
>
> Signed-off-by: Tang Dongxing
> Signed-off-by: Shao Mingyin
> ---
> drivers/gpu/drm/adp/adp_drv.c | 2 +-
> 1 file changed, 1 insertion(+),
Hi Daniel,
On 28/03/25 17:05, Daniel Stone wrote:
Hi Vignesh,
On Fri, 28 Mar 2025 at 11:03, Vignesh Raman wrote:
Ensure the repository is not shallow before fetching branches in
check-patch job. This prevents issues where git merge-base fails
due to incomplete history. Set the timeout of chec
++ dri-devel
On 28-03-2025 15:57, Aravind Iddamsetty wrote:
> Hi,
>
> Based on the discussions around using Netlink for RAS purposes, as
> summarized in this blog post [1] by Dave Airlie. I had proposed a series
> regarding RAS infrastructure in DRM [2].
>
> I came across your work, which appears
The vmwgfx driver has a number of DRM_UT_* debugs, make them
controllable when CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg
that the module uses them.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/vmwgf
The python-artifacts job has a timeout of 10 minutes, which causes
build failures as it was unable to clone the repository within the
specified limits. Set GIT_DEPTH to 10 to speed up cloning and avoid
build failures due to timeouts when fetching the full repository.
Signed-off-by: Vignesh Raman
Documentation/devicetree/bindings/graph.txt content has move directly to
the dt-schema repo.
Point to the YAML of the official repo instead of the old file.
Signed-off-by: Raphael Gallais-Pou
---
drivers/gpu/drm/drm_of.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a
On Fri, Mar 21, 2025 at 5:22 PM Kieran Bingham
wrote:
>
> From: Kieran Bingham
>
> The RZ/G2L driver utilises the VSPD to read data from input sources.
>
> The rzg2l_du_kms component lists a restricted subset of the capabilities
> of the VSPd which prevents additional formats from being used for
On Fri, 28 Mar 2025 at 16:22, Krzysztof Kozlowski wrote:
>
> On 28/03/2025 13:45, Dmitry Baryshkov wrote:
> > On Fri, Mar 28, 2025 at 03:13:57PM +0530, Ayushi Makhija wrote:
> >>> These both above commented from Dmitry I have addressed in the version 2
> >>> of patch 7 of the series.
> >>> I have
On Fri, Mar 21, 2025 at 10:46 AM Laurent Pinchart
wrote:
>
> The rz-du driver uses GEM DMA helpers, but does not implement the
> drm_driver .gem_prime_import_sg_table operation. This prevents
> importing dmabufs. Fix it by implementing the missing operation using
> the DRM_GEM_DMA_DRIVER_OPS_WITH
On Mon, Mar 24, 2025 at 10:06:02PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Building the xe driver for i386 results in a link time warning:
>
> x86_64-linux-ld: drivers/gpu/drm/xe/xe_migrate.o: in function
> `xe_migrate_vram':
> xe_migrate.c:(.text+0x1e15): undefined reference to `
On 3/28/25 09:16, Jeff Hugo wrote:
On 3/25/2025 2:01 PM, Lizhi Hou wrote:
Add amdxdna_gem_prime_export() and amdxdna_gem_prime_import() for BO
import and export. Register mmu notifier for imported BO as well. When
MMU_NOTIFIER_UNMAP event is received, queue work to remove the notifier.
The sa
Hook up the newly added plane function pointer
format_mod_supported_async to populate the modifiers/formats supported
by asynchronous flips.
v5: Correct the if condition for modifier support check (Chaitanya)
v6: Replace uint32_t/uint64_t with u32/u64 (Jani)
v7: Move plannar check from intel_async
Align with 20250326165751.72881-1-jonathan.cav...@intel.com
Add initial declarations for the xe_vm_get_property_ioctl call, including
necessary structures and IOCTL macros.
Signed-off-by: Jonathan Cavitt
---
include/drm-uapi/xe_drm.h | 78 +++
1 file changed,
On Thu, Mar 27, 2025 at 05:28:27PM +0800, Huan Yang wrote:
> Bingbu reported an issue in [1] that udmabuf vmap failed and in [2], we
> discussed the scenario of folio vmap due to the misuse of vmap_pfn
> in udmabuf.
>
> We reached the conclusion that vmap_pfn prohibits the use of page-based
> PFNs
Hi Maxime,
On 20/03/25 15:03, Maxime Ripard wrote:
Hi,
On Wed, Mar 19, 2025 at 02:39:59PM -0300, Helen Koike wrote:
Hi Maxime,
On 19/03/2025 11:11, Maxime Ripard wrote:
Hi,
At last Plumbers, we agreed with Dave that a good first step to ramp up
CI for DRM trees would be to enable build and
On Fri, Mar 28, 2025 at 4:34 AM Luca Ceresoli
wrote:
> Hello Anusha,
>
> Thanks for your continued effort.
>
> I have a few minor comments. Nothing big, but since Maxime requested a
> change you'll have to send a new iteration, so find my comments below.
>
> On Thu, 27 Mar 2025 10:55:39 -0400
> A
For ease of implementation, existing line-conversion functions
for 8-bit formats write each pixel individually. Optimize the
performance by writing multiple pixels in a single 32-bit store.
v2:
- simplify address calculation (Jani)
- fix typo in commit message (Jocelyn)
Signed-off-by: Thomas Zimm
On Wed, 26 Mar 2025, Ilpo Järvinen wrote:
> On Thu, 20 Mar 2025, Michał Winiarski wrote:
>
> > When the resource representing VF MMIO BAR reservation is created, its
> > size is always large enough to accommodate the BAR of all SR-IOV Virtual
> > Functions that can potentially be created (total V
We can avoid one of the two temporary allocations if we read the userspace
supplied timeline points as we go along.
The only new complication is to unwind unused fence chains on the error
path, but even that code was already present in the function.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Maí
Running the Cyberpunk 2077 benchmark we can observe that the lookup helper
is relatively hot, but the 97% of the calls are for a single object. (~3%
for two points, and never more than three points. While a more trivial
workload like vkmark under Plasma is even more skewed to single point
lookups.)
A small set of drm_syncobj optimisations which should make things a tiny bit
more efficient on the CPU side of things.
Improvement seems to be around 1.5%* more FPS if observed with "vkgears
-present-mailbox" on a Steam Deck Plasma desktop, but I am reluctant to make a
definitive claim on the numb
Helper which fails to consolidate the code and instead just forks into two
copies of the code based on a boolean parameter is not very helpful or
readable. Lets just remove it and proof in the pudding is the net smaller
code.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Maíra Canal
---
v2:
* Assi
When waiting on syncobjs the current code allocates a temporary array only
to fill it up with all zeros.
We can avoid that by relying on the allocated entry array already being
zero allocated.
For the timeline mode we can fetch the timeline point values as we
populate the entries array so also do
We have only one GGTT for all IOV functions, with each VF having assigned
a range of addresses for its use. After migration, a VF can receive a
different range of addresses than it had initially.
This implements shifting GGTT addresses within drm_mm nodes, so that
VMAs stay valid after migration.
Move the helper arrays xe_to_user_engine_class and
user_to_xe_engine_class to xe_hw_engine_types.h, making them available
to more of the xe kernel. This is done for user_to_xe_engine_class to
reduce duplication, and xe_to_user_engine_class can and will be used in
more than one place in the future.
Move the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault_types.h header file, and move the associated enum values
into the regs folder under xe_pagefault_desc.h
Since xe_pagefault_desc.h is being initialized here, also move the
xe_guc_pagefault_desc hardware formats to the new file.
The page fault handler should reject write/atomic access to read only
VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
Signed-off-by: Jonathan Cavitt
Suggested-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_gt_p
Add support for userspace to request a list of observed faults
from a specified VM.
v2:
- Only allow querying of failed pagefaults (Matt Brost)
v3:
- Remove unnecessary size parameter from helper function, as it
is a property of the arguments. (jcavitt)
- Remove unnecessary copy_from_user (Jain
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagefaults are saved this way currently, though in
the future, all faults should be tracked by the VM for future reporting.
Additionally, of the pagefaults reported, only failed pagefaults are
saved this
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagefaults are saved this way currently, though in
the future, all faults should be tracked by the VM for future reporting.
Additionally, of the pagefaults reported, only failed pagefaults are
saved this
Add a helper function, xe_vm_get_property, that calls the
drm_xe_vm_get_property ioctl. Since the ioctl behaves similarly to an
xe_query in that it needs to be called once to get the size of the
return data and again to save the data, the helper function takes the
ioctl structure as a parameter.
Add a test to xe_vm that determines if pagefaults are correctly tracked
and reported by the DRM_IOCTL_XE_VM_GET_PROPERTY.
Signed-off-by: Jonathan Cavitt
Suggested-by: Jianxun Zhang
Suggested-by: Stuart Summers
---
tests/intel/xe_vm.c | 162 +++-
1 file c
Add tests that exercise the new drm_xe_vm_get_property uapi,
specifically for ioctl input validation and for determining that
pagefaults are correctly tracked and returned by the reporter.
Signed-off-by: Jonathan Cavitt
Suggested-by: Joonas Lahtinen
Suggested-by: Matthew Brost
Suggested-by: Zha
Add tests to xe_vm that exercise the new DRM_IOCTL_XE_VM_GET_PROPERTY
ioctl. Specifically, add input validation tests that exercise the
return values for improperly formatted ioctl structures.
Signed-off-by: Jonathan Cavitt
---
tests/intel/xe_vm.c | 82 ++
Hi
Am 28.03.25 um 09:42 schrieb Lee Jones:
On Mon, 24 Mar 2025, Thomas Zimmermann wrote:
Hi
Am 21.03.25 um 12:27 schrieb Daniel Thompson:
On Fri, Mar 21, 2025 at 10:54:01AM +0100, Thomas Zimmermann wrote:
Remove support for fb events from the lcd subsystem. Provide the
helper lcd_notify_bla
On Wed, Mar 26, 2025 at 11:46:54AM +0100, Danilo Krummrich wrote:
> On Wed, Mar 26, 2025 at 10:24:43AM +0100, Maxime Ripard wrote:
> > Hi,
> >
> > On Wed, Mar 26, 2025 at 12:54:32AM +0100, Danilo Krummrich wrote:
> > > Implement the DRM driver `Registration`.
> > >
> > > The `Registration` struct
Running the Cyberpunk 2077 benchmark we can observe that waiting on DRM
sycobjs is relatively hot, but the 96% of the calls are for a single
object. (~4% for two points, and never more than three points. While
a more trivial workload like vkmark under Plasma is even more skewed
to single point wait
On Fri, 28 Mar 2025 at 11:25, Dmitry Baryshkov
wrote:
>
> On Thu, 27 Mar 2025 at 20:19, Christopher Obbard
> wrote:
> >
> > Hi Dmitry,
> >
> > On Thu, 27 Mar 2025 at 17:40, Dmitry Baryshkov
> > wrote:
> > >
> > > On 27/03/2025 19:25, Christopher Obbard wrote:
> > > > According to the eDP specifi
The function pointer can_async_flip() checks for async supported
modifier, add format support check also in the same function.
v11: Move filtering Indexed 8bit to a separate patch
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 4 ++--
drivers/gpu/drm/i915
There exists a property IN_FORMATS which exposes the plane supported
modifiers/formats to the user. In some platforms when asynchronous flip
are used all of modifiers/formats mentioned in IN_FORMATS are not
supported. This patch adds a new plane property IN_FORMATS_ASYNC to
expose the async flip su
create_in_formats creates the list of supported format/modifiers for
synchronous flips, modify the same function so as to take the
format_mod_supported as argument and create list of format/modifier for
async as well.
v5: create_in_formats can return -ve value in failure case, correct the
if condi
This is still very preliminary work, and is mostly designed to show how
register fields can be turned into safe types that force us to handle
invalid values.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs| 2 +-
drivers/gpu/nova-core/falcon.rs| 618 +++
On Fri, Mar 28, 2025 at 03:13:57PM +0530, Ayushi Makhija wrote:
> > These both above commented from Dmitry I have addressed in the version 2 of
> > patch 7 of the series.
> > I have squash patch 8 into patch 7 of version 1 into patch 7 of version 2
> > of the series.
> >
> >
> > Thanks,
> > Ayu
Am 28.03.25 um 12:01 schrieb Danilo Krummrich:
> On Wed, Mar 26, 2025 at 01:10:58PM +, Chris Bainbridge wrote:
>> Edit the comments on correct usage of drm_prime_gem_destroy to note
>> that, if using TTM, drm_prime_gem_destroy must be called in the
>> ttm_buffer_object.destroy hook, to avoid th
Hello Aradhya,
On Wed, Feb 26, 2025 at 11:42:56PM +0530, Aradhya Bhatia wrote:
> The AM62Px SoC has 2 OLDI TXes like AM62x SoC. However, the AM62Px SoC also
> has
> 2 separate DSSes. The 2 OLDI TXes can now be shared between the 2 VPs of the 2
> DSSes.
Do we have support for 2 independent single
On 3/25/2025 2:01 PM, Lizhi Hou wrote:
Add amdxdna_gem_prime_export() and amdxdna_gem_prime_import() for BO
import and export. Register mmu notifier for imported BO as well. When
MMU_NOTIFIER_UNMAP event is received, queue work to remove the notifier.
The same BO could be mapped multiple times i
On Fri, Mar 28, 2025 at 09:52:18AM -0600, Gustavo A. R. Silva wrote:
> -Wflex-array-member-not-at-end was introduced in GCC-14, and we are
> getting ready to enable it, globally.
>
> Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
> a flexible structure where the size of the flexi
On 3/13/25 16:05, Andrew Morton wrote:
On Thu, 13 Mar 2025 11:31:12 -0700 Guenter Roeck wrote:
On Thu, Mar 13, 2025 at 06:24:25PM +0100, Maxime Ripard wrote:
Yeah, as with my prior review, I'm a fan of this. It makes a bunch of my
very noisy tests much easier to deal with.
And for the reco
On Wed, 2025-03-26 at 00:54 +0100, Danilo Krummrich wrote:
> diff --git a/rust/kernel/drm/driver.rs b/rust/kernel/drm/driver.rs
> new file mode 100644
> index ..1ac770482ae0
> --- /dev/null
> +++ b/rust/kernel/drm/driver.rs
> @@ -0,0 +1,143 @@
> +// SPDX-License-Identifier: GPL-2.0 OR M
On Thu, 27 Mar 2025 at 19:53, Dave Airlie wrote:
>
> This is the main drm pull request for 6.15. Bit late, but my wife was
> away getting a PhD and kids took over my writing summaries time, and
> fd.o was offline last week which slowed me down a small bit.
Grr. I did the pull, resolved the (trivi
On Fri, Mar 28, 2025 at 06:00:11PM -0400, Lyude Paul wrote:
> On Wed, 2025-03-26 at 00:54 +0100, Danilo Krummrich wrote:
> > diff --git a/rust/kernel/drm/driver.rs b/rust/kernel/drm/driver.rs
> > new file mode 100644
> > index ..1ac770482ae0
> > --- /dev/null
> > +++ b/rust/kernel/drm/d
Hi Amirreza,
kernel test robot noticed the following build warnings:
[auto build test WARNING on db8da9da41bced445077925f8a886c776a47440c]
url:
https://github.com/intel-lab-lkp/linux/commits/Amirreza-Zarrabi/tee-allow-a-driver-to-allocate-a-tee_device-without-a-pool/20250328-104950
base
Refactor the core API of get/unmap/free pages to all operate on
drm_gpusvm_pages. In the next patch we want to export a simplified core
API without needing fully blown svm range etc.
Suggested-by: Matthew Brost
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/drm_gpusvm.c |
On 3/28/25 01:23, Jacek Lawrynowicz wrote:
On 3/27/2025 6:38 PM, Lizhi Hou wrote:
On 3/26/25 01:06, Jacek Lawrynowicz wrote:
Hi,
On 3/25/2025 9:50 PM, Lizhi Hou wrote:
On 3/25/25 04:43, Maciej Falkowski wrote:
From: Jacek Lawrynowicz
Fix deadlock in ivpu_ms_cleanup() by preventing runti
On Sun, Mar 23, 2025 at 03:34:50PM -0300, Maíra Canal wrote:
> Hi Maxime,
>
> On 18/03/25 11:17, Maxime Ripard wrote:
> > vc4_mock_atomic_add_output() and vc4_mock_atomic_del_output() public but
>
> Nit: s/public/are public
Good catch, thanks!
> > aren't documented. Let's provide the documentat
On Fri, Mar 28, 2025 at 08:56:25AM -0600, Gustavo A. R. Silva wrote:
> -Wflex-array-member-not-at-end was introduced in GCC-14, and we are
> getting ready to enable it, globally.
>
> Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
> a flexible structure where the size of the flexi
On Sun, Mar 23, 2025 at 03:48:17PM -0300, Maíra Canal wrote:
> Hi Maxime,
>
> On 18/03/25 11:17, Maxime Ripard wrote:
> > The vc4-pv-muxing-combinations and vc5-pv-muxing-combinations test
> > suites use a common test init function which, in part, allocates the
> > drm atomic state the test will u
On 3/25/25 04:43, Maciej Falkowski wrote:
From: Jacek Lawrynowicz
Prevent runtime resume/suspend while MS IOCTLs are in progress.
Failed suspend will call ivpu_ms_cleanup() that would try to acquire
file_priv->ms_lock, which is already held by the IOCTLs.
Fixes: cdfad4db7756 ("accel/ivpu: Ad
On 28/03/25 09:05, Danilo Krummrich wrote:
On Fri, Mar 28, 2025 at 08:45:32AM -0600, Gustavo A. R. Silva wrote:
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are
getting ready to enable it, globally.
Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
a flexibl
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are
getting ready to enable it, globally.
Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
a flexible structure where the size of the flexible-array member
is known at compile-time, and refactor the rest of the code,
a
> On Fri, Mar 28, 2025 at 06:15:37PM +0530, Arun R Murthy wrote:
> > The function pointer can_async_flip() checks for async supported
> > modifier, add format support check also in the same function.
>
> You are changing intel_plane_can_async_flip(), not the
> .can_async_flip() vfunc. So this comm
The function intel_plane_can_async_flip() checks for async supported
modifier, add format support check also in the same function.
Note: on ADL the surface base addr is required to be 16k aligned and if
not might generate DMAR and GGTT faults leading to glitches.
v11: Move filtering Indexed 8bit
Hook up the newly added plane function pointer
format_mod_supported_async to populate the modifiers/formats supported
by asynchronous flips.
v5: Correct the if condition for modifier support check (Chaitanya)
v6: Replace uint32_t/uint64_t with u32/u64 (Jani)
v7: Move plannar check from intel_async
create_in_formats creates the list of supported format/modifiers for
synchronous flips, modify the same function so as to take the
format_mod_supported as argument and create list of format/modifier for
async as well.
v5: create_in_formats can return -ve value in failure case, correct the
if condi
On Thu, Mar 20, 2025 at 09:32:36AM -0300, Helen Koike wrote:
> Hi Maxime,
>
> Thanks for your reply.
>
> On 20/03/2025 06:33, Maxime Ripard wrote:
> > Hi,
> >
> > On Wed, Mar 19, 2025 at 02:39:59PM -0300, Helen Koike wrote:
> > > Hi Maxime,
> > >
> > > On 19/03/2025 11:11, Maxime Ripard wrote:
There exists a property IN_FORMATS which exposes the plane supported
modifiers/formats to the user. In some platforms when asynchronous flip
are used all of modifiers/formats mentioned in IN_FORMATS are not
supported. This patch adds a new plane property IN_FORMATS_ASYNC to
expose the async flip su
Async flip is not supported with Indexed 8 bit format as it depends on
LUT and can't be updated atomically.
Signed-off-by: Arun R Murthy
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers
On Fri, Mar 28, 2025 at 08:45:32AM -0600, Gustavo A. R. Silva wrote:
> -Wflex-array-member-not-at-end was introduced in GCC-14, and we are
> getting ready to enable it, globally.
>
> Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
> a flexible structure where the size of the flexi
On Thu, Mar 27, 2025 at 09:31:12PM +0530, Vignesh Raman wrote:
> Add jobs to run KUnit tests using tools/testing/kunit/kunit.py tool.
>
> Signed-off-by: Vignesh Raman
> ---
> drivers/gpu/drm/ci/gitlab-ci.yml | 1 +
> drivers/gpu/drm/ci/kunit.sh | 34
> driv
The driver check if "DPI(HFP) > DSI(HSS+HSA+HSE+HBP)", and rejects the
mode if not.
However, testing shows that this doesn't hold at all. I can set the hfp
to very small values, with no errors. The feedback from the HW team also
was that the check is not right, although it's not clear if there's a
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are
getting ready to enable it, globally.
Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
a flexible structure where the size of the flexible-array member
is known at compile-time, and refactor the rest of the code,
a
On Fri, Mar 28, 2025 at 03:28:04PM +0100, Maxime Ripard wrote:
> On Wed, Mar 26, 2025 at 11:46:54AM +0100, Danilo Krummrich wrote:
> > On Wed, Mar 26, 2025 at 10:24:43AM +0100, Maxime Ripard wrote:
> > > On Wed, Mar 26, 2025 at 12:54:32AM +0100, Danilo Krummrich wrote:
>
> > > drm_dev_unregister a
On Wed, Mar 26, 2025 at 12:54:35AM +0100, Danilo Krummrich wrote:
> Add the DRM Rust source files to the DRM DRIVERS maintainers entry.
>
> Signed-off-by: Danilo Krummrich
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index de46acc247c3
On Fri, Mar 28, 2025 at 03:49:20PM +0100, Maxime Ripard wrote:
> On Wed, Mar 26, 2025 at 12:54:35AM +0100, Danilo Krummrich wrote:
> > Add the DRM Rust source files to the DRM DRIVERS maintainers entry.
> >
> > Signed-off-by: Danilo Krummrich
> > ---
> > MAINTAINERS | 1 +
> > 1 file changed, 1
-Wflex-array-member-not-at-end was introduced in GCC-14, and we are
getting ready to enable it, globally.
Use the `DEFINE_RAW_FLEX()` helper for an on-stack definition of
a flexible structure where the size of the flexible-array member
is known at compile-time, and refactor the rest of the code,
a
On Fri, Mar 28, 2025 at 06:15:37PM +0530, Arun R Murthy wrote:
> The function pointer can_async_flip() checks for async supported
> modifier, add format support check also in the same function.
You are changing intel_plane_can_async_flip(), not the
.can_async_flip() vfunc. So this commit message d
On Fri, Mar 28, 2025 at 06:15:39PM +0530, Arun R Murthy wrote:
> Async flip is not supported with Indexed 8 bit format as it depends on
> LUT and can't be updated atomically.
>
> Signed-off-by: Arun R Murthy
Seems OK to me.
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/inte
Add helpers for converting the pixel format of scanline. This used
to be implemented for each format individually, but only the per-pixel
code is really different among formats.
Patch 1 moves the per-pixel format helpers from drm_draw.c to an
internal header. These functions have equivalents in th
Add drm_fb_xfrm_line_32to32() to implement conversion from 32-bit
pixels to 32-bit pixels. The pixel-conversion is specified by the
given callback parameter. Mark the helper as always_inline to avoid
overhead from function calls.
Then implement all existing line-conversion functions with the new
g
Add drm_fb_xfrm_line_32to8() to implement conversion from 32-bit
pixels to 8-bit pixels. The pixel-conversion is specified by the
given callback parameter. Mark the helper as always_inline to avoid
overhead from function calls.
Then implement all existing line-conversion functions with the new
gen
a bunch of my
> > > very noisy tests much easier to deal with.
> >
> > And for the record, we're also affected by this in DRM and would very
> > much like to get it merged in one shape or another.
>
> Here is another case:
> https://lore.kernel.org/all/20250328.a
Add drm_fb_xfrm_line_32to16() to implement conversion from 32-bit
pixels to 16-bit pixels. The pixel-conversion is specified by the
given callback parameter. Mark the helper as always_inline to avoid
overhead from function calls.
Then implement all existing line-conversion functions with the new
g
For ease of implementation, existing line-conversion functions
for 16-bit formats write each pixel individually. Optimize the
performance by writing multiple pixels in single 64-bit and 32-bit
stores.
v2:
- simplify address calculation (Jani)
- fix typo in commit message (Jocelyn)
Signed-off-by:
On 28/03/2025 13:45, Dmitry Baryshkov wrote:
> On Fri, Mar 28, 2025 at 03:13:57PM +0530, Ayushi Makhija wrote:
>>> These both above commented from Dmitry I have addressed in the version 2 of
>>> patch 7 of the series.
>>> I have squash patch 8 into patch 7 of version 1 into patch 7 of version 2
>
For ease of implementation, existing line-conversion functions
for 24-bit formats write each byte individually. Optimize the
performance by writing 4 pixels in 3 32-bit stores.
v2:
- simplify address calculation (Jani)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
---
drivers/g
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